diff --git a/test/prima3.tcl b/test/prima3.tcl
index c04dc722..b2e20eab 100644
--- a/test/prima3.tcl
+++ b/test/prima3.tcl
@@ -1,7 +1,5 @@
 # prima reg1 asap7
-read_liberty asap7_invbuf.lib.gz
-read_liberty asap7_seq.lib.gz
-read_liberty asap7_simple.lib.gz
+read_liberty asap7_small.lib.gz
 read_verilog reg1_asap7.v
 link_design top
 create_clock -name clk -period 500 {clk1 clk2 clk3}