O VNB $end
-$var wire 1 ?O VPB $end
-$var wire 1 @O VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_988 $end
-$var wire 1 AO VGND $end
-$var wire 1 BO VNB $end
-$var wire 1 CO VPB $end
-$var wire 1 DO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_989 $end
-$var wire 1 EO VGND $end
-$var wire 1 FO VNB $end
-$var wire 1 GO VPB $end
-$var wire 1 HO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_99 $end
-$var wire 1 IO VGND $end
-$var wire 1 JO VNB $end
-$var wire 1 KO VPB $end
-$var wire 1 LO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_990 $end
-$var wire 1 MO VGND $end
-$var wire 1 NO VNB $end
-$var wire 1 OO VPB $end
-$var wire 1 PO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_991 $end
-$var wire 1 QO VGND $end
-$var wire 1 RO VNB $end
-$var wire 1 SO VPB $end
-$var wire 1 TO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_992 $end
-$var wire 1 UO VGND $end
-$var wire 1 VO VNB $end
-$var wire 1 WO VPB $end
-$var wire 1 XO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_993 $end
-$var wire 1 YO VGND $end
-$var wire 1 ZO VNB $end
-$var wire 1 [O VPB $end
-$var wire 1 \O VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_994 $end
-$var wire 1 ]O VGND $end
-$var wire 1 ^O VNB $end
-$var wire 1 _O VPB $end
-$var wire 1 `O VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_995 $end
-$var wire 1 aO VGND $end
-$var wire 1 bO VNB $end
-$var wire 1 cO VPB $end
-$var wire 1 dO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_996 $end
-$var wire 1 eO VGND $end
-$var wire 1 fO VNB $end
-$var wire 1 gO VPB $end
-$var wire 1 hO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_997 $end
-$var wire 1 iO VGND $end
-$var wire 1 jO VNB $end
-$var wire 1 kO VPB $end
-$var wire 1 lO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_998 $end
-$var wire 1 mO VGND $end
-$var wire 1 nO VNB $end
-$var wire 1 oO VPB $end
-$var wire 1 pO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module TAP_999 $end
-$var wire 1 qO VGND $end
-$var wire 1 rO VNB $end
-$var wire 1 sO VPB $end
-$var wire 1 tO VPWR $end
-$scope module base $end
-$upscope $end
-$upscope $end
-$scope module _197_ $end
-$var wire 1 uO VGND $end
-$var wire 1 vO VNB $end
-$var wire 1 wO VPB $end
-$var wire 1 xO VPWR $end
-$var wire 1 9# Y $end
-$var wire 1 S B $end
-$var wire 1 C A $end
-$scope module base $end
-$var wire 1 9# Y $end
-$var wire 1 yO xnor0_out_Y $end
-$var wire 1 S B $end
-$var wire 1 C A $end
-$upscope $end
-$upscope $end
-$scope module _198_ $end
-$var wire 1 zO VGND $end
-$var wire 1 {O VNB $end
-$var wire 1 |O VPB $end
-$var wire 1 }O VPWR $end
-$var wire 1 8# Y $end
-$var wire 1 D B_N $end
-$var wire 1 T A $end
-$scope module base $end
-$var wire 1 8# Y $end
-$var wire 1 ~O and0_out_Y $end
-$var wire 1 !P not0_out $end
-$var wire 1 D B_N $end
-$var wire 1 T A $end
-$upscope $end
-$upscope $end
-$scope module _199_ $end
-$var wire 1 "P VGND $end
-$var wire 1 #P VNB $end
-$var wire 1 $P VPB $end
-$var wire 1 %P VPWR $end
-$var wire 1 7# Y $end
-$var wire 1 U B $end
-$var wire 1 E A $end
-$scope module base $end
-$var wire 1 7# Y $end
-$var wire 1 &P xnor0_out_Y $end
-$var wire 1 U B $end
-$var wire 1 E A $end
-$upscope $end
-$upscope $end
-$scope module _200_ $end
-$var wire 1 'P VGND $end
-$var wire 1 (P VNB $end
-$var wire 1 )P VPB $end
-$var wire 1 *P VPWR $end
-$var wire 1 6# Y $end
-$var wire 1 F B $end
-$var wire 1 V A_N $end
-$scope module base $end
-$var wire 1 6# Y $end
-$var wire 1 +P not0_out $end
-$var wire 1 ,P or0_out_Y $end
-$var wire 1 F B $end
-$var wire 1 V A_N $end
-$upscope $end
-$upscope $end
-$scope module _201_ $end
-$var wire 1 -P VGND $end
-$var wire 1 .P VNB $end
-$var wire 1 /P VPB $end
-$var wire 1 0P VPWR $end
-$var wire 1 5# Y $end
-$var wire 1 W B $end
-$var wire 1 G A $end
-$scope module base $end
-$var wire 1 5# Y $end
-$var wire 1 1P xnor0_out_Y $end
-$var wire 1 W B $end
-$var wire 1 G A $end
-$upscope $end
-$upscope $end
-$scope module _202_ $end
-$var wire 1 5# A $end
-$var wire 1 2P VGND $end
-$var wire 1 3P VNB $end
-$var wire 1 4P VPB $end
-$var wire 1 5P VPWR $end
-$var wire 1 4# Y $end
-$scope module base $end
-$var wire 1 5# A $end
-$var wire 1 4# Y $end
-$var wire 1 6P not0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _203_ $end
-$var wire 1 7P VGND $end
-$var wire 1 8P VNB $end
-$var wire 1 9P VPB $end
-$var wire 1 :P VPWR $end
-$var wire 1 3# Y $end
-$var wire 1 9 B_N $end
-$var wire 1 I A $end
-$scope module base $end
-$var wire 1 3# Y $end
-$var wire 1 ;P and0_out_Y $end
-$var wire 1 P VNB $end
-$var wire 1 ?P VPB $end
-$var wire 1 @P VPWR $end
-$var wire 1 2# Y $end
-$var wire 1 J B $end
-$var wire 1 : A $end
-$scope module base $end
-$var wire 1 2# Y $end
-$var wire 1 AP xnor0_out_Y $end
-$var wire 1 J B $end
-$var wire 1 : A $end
-$upscope $end
-$upscope $end
-$scope module _205_ $end
-$var wire 1 BP VGND $end
-$var wire 1 CP VNB $end
-$var wire 1 DP VPB $end
-$var wire 1 EP VPWR $end
-$var wire 1 1# Y $end
-$var wire 1 K A $end
-$scope module base $end
-$var wire 1 1# Y $end
-$var wire 1 FP not0_out_Y $end
-$var wire 1 K A $end
-$upscope $end
-$upscope $end
-$scope module _206_ $end
-$var wire 1 1# B $end
-$var wire 1 GP VGND $end
-$var wire 1 HP VNB $end
-$var wire 1 IP VPB $end
-$var wire 1 JP VPWR $end
-$var wire 1 0# Y $end
-$var wire 1 ; A $end
-$scope module base $end
-$var wire 1 1# B $end
-$var wire 1 0# Y $end
-$var wire 1 KP nand0_out_Y $end
-$var wire 1 ; A $end
-$upscope $end
-$upscope $end
-$scope module _207_ $end
-$var wire 1 LP VGND $end
-$var wire 1 MP VNB $end
-$var wire 1 NP VPB $end
-$var wire 1 OP VPWR $end
-$var wire 1 /# Y $end
-$var wire 1 L B $end
-$var wire 1 < A $end
-$scope module base $end
-$var wire 1 /# Y $end
-$var wire 1 PP xnor0_out_Y $end
-$var wire 1 L B $end
-$var wire 1 < A $end
-$upscope $end
-$upscope $end
-$scope module _208_ $end
-$var wire 1 /# A $end
-$var wire 1 QP VGND $end
-$var wire 1 RP VNB $end
-$var wire 1 SP VPB $end
-$var wire 1 TP VPWR $end
-$var wire 1 .# Y $end
-$scope module base $end
-$var wire 1 /# A $end
-$var wire 1 .# Y $end
-$var wire 1 UP not0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _209_ $end
-$var wire 1 VP VGND $end
-$var wire 1 WP VNB $end
-$var wire 1 XP VPB $end
-$var wire 1 YP VPWR $end
-$var wire 1 -# Y $end
-$var wire 1 M A $end
-$scope module base $end
-$var wire 1 -# Y $end
-$var wire 1 ZP not0_out_Y $end
-$var wire 1 M A $end
-$upscope $end
-$upscope $end
-$scope module _210_ $end
-$var wire 1 [P VGND $end
-$var wire 1 \P VNB $end
-$var wire 1 ]P VPB $end
-$var wire 1 ^P VPWR $end
-$var wire 1 ,# Y $end
-$var wire 1 N A $end
-$scope module base $end
-$var wire 1 ,# Y $end
-$var wire 1 _P not0_out_Y $end
-$var wire 1 N A $end
-$upscope $end
-$upscope $end
-$scope module _211_ $end
-$var wire 1 `P VGND $end
-$var wire 1 aP VNB $end
-$var wire 1 bP VPB $end
-$var wire 1 cP VPWR $end
-$var wire 1 +# Y $end
-$var wire 1 O A $end
-$scope module base $end
-$var wire 1 +# Y $end
-$var wire 1 dP not0_out_Y $end
-$var wire 1 O A $end
-$upscope $end
-$upscope $end
-$scope module _212_ $end
-$var wire 1 eP VGND $end
-$var wire 1 fP VNB $end
-$var wire 1 gP VPB $end
-$var wire 1 hP VPWR $end
-$var wire 1 *# Y $end
-$var wire 1 P A $end
-$scope module base $end
-$var wire 1 *# Y $end
-$var wire 1 iP not0_out_Y $end
-$var wire 1 P A $end
-$upscope $end
-$upscope $end
-$scope module _213_ $end
-$var wire 1 jP VGND $end
-$var wire 1 kP VNB $end
-$var wire 1 lP VPB $end
-$var wire 1 mP VPWR $end
-$var wire 1 )# Y $end
-$var wire 1 Q A $end
-$scope module base $end
-$var wire 1 )# Y $end
-$var wire 1 nP not0_out_Y $end
-$var wire 1 Q A $end
-$upscope $end
-$upscope $end
-$scope module _214_ $end
-$var wire 1 oP VGND $end
-$var wire 1 pP VNB $end
-$var wire 1 qP VPB $end
-$var wire 1 rP VPWR $end
-$var wire 1 (# Y $end
-$var wire 1 H B_N $end
-$var wire 1 X A $end
-$scope module base $end
-$var wire 1 (# Y $end
-$var wire 1 sP and0_out_Y $end
-$var wire 1 tP not0_out $end
-$var wire 1 H B_N $end
-$var wire 1 X A $end
-$upscope $end
-$upscope $end
-$scope module _215_ $end
-$var wire 1 )# B $end
-$var wire 1 (# C $end
-$var wire 1 uP VGND $end
-$var wire 1 vP VNB $end
-$var wire 1 wP VPB $end
-$var wire 1 xP VPWR $end
-$var wire 1 '# X $end
-$var wire 1 A A $end
-$scope module base $end
-$var wire 1 )# B $end
-$var wire 1 (# C $end
-$var wire 1 '# X $end
-$var wire 1 yP and0_out $end
-$var wire 1 zP and1_out $end
-$var wire 1 {P or0_out $end
-$var wire 1 |P or1_out_X $end
-$var wire 1 A A $end
-$upscope $end
-$upscope $end
-$scope module _216_ $end
-$var wire 1 *# B $end
-$var wire 1 '# C $end
-$var wire 1 }P VGND $end
-$var wire 1 ~P VNB $end
-$var wire 1 !Q VPB $end
-$var wire 1 "Q VPWR $end
-$var wire 1 X $end
-$var wire 1 @ A $end
-$scope module base $end
-$var wire 1 *# B $end
-$var wire 1 '# C $end
-$var wire 1 X $end
-$var wire 1 #Q and0_out $end
-$var wire 1 $Q and1_out $end
-$var wire 1 %Q or0_out $end
-$var wire 1 &Q or1_out_X $end
-$var wire 1 @ A $end
-$upscope $end
-$upscope $end
-$scope module _217_ $end
-$var wire 1 +# B $end
-$var wire 1 C $end
-$var wire 1 'Q VGND $end
-$var wire 1 (Q VNB $end
-$var wire 1 )Q VPB $end
-$var wire 1 *Q VPWR $end
-$var wire 1 %# X $end
-$var wire 1 ? A $end
-$scope module base $end
-$var wire 1 +# B $end
-$var wire 1 C $end
-$var wire 1 %# X $end
-$var wire 1 +Q and0_out $end
-$var wire 1 ,Q and1_out $end
-$var wire 1 -Q or0_out $end
-$var wire 1 .Q or1_out_X $end
-$var wire 1 ? A $end
-$upscope $end
-$upscope $end
-$scope module _218_ $end
-$var wire 1 ,# B $end
-$var wire 1 %# C $end
-$var wire 1 /Q VGND $end
-$var wire 1 0Q VNB $end
-$var wire 1 1Q VPB $end
-$var wire 1 2Q VPWR $end
-$var wire 1 $# X $end
-$var wire 1 > A $end
-$scope module base $end
-$var wire 1 ,# B $end
-$var wire 1 %# C $end
-$var wire 1 $# X $end
-$var wire 1 3Q and0_out $end
-$var wire 1 4Q and1_out $end
-$var wire 1 5Q or0_out $end
-$var wire 1 6Q or1_out_X $end
-$var wire 1 > A $end
-$upscope $end
-$upscope $end
-$scope module _219_ $end
-$var wire 1 -# B $end
-$var wire 1 $# C $end
-$var wire 1 7Q VGND $end
-$var wire 1 8Q VNB $end
-$var wire 1 9Q VPB $end
-$var wire 1 :Q VPWR $end
-$var wire 1 ## X $end
-$var wire 1 = A $end
-$scope module base $end
-$var wire 1 -# B $end
-$var wire 1 $# C $end
-$var wire 1 ## X $end
-$var wire 1 ;Q and0_out $end
-$var wire 1 Q or1_out_X $end
-$var wire 1 = A $end
-$upscope $end
-$upscope $end
-$scope module _220_ $end
-$var wire 1 ?Q VGND $end
-$var wire 1 @Q VNB $end
-$var wire 1 AQ VPB $end
-$var wire 1 BQ VPWR $end
-$var wire 1 "# Y $end
-$var wire 1 K B $end
-$var wire 1 ; A_N $end
-$scope module base $end
-$var wire 1 "# Y $end
-$var wire 1 CQ not0_out $end
-$var wire 1 DQ or0_out_Y $end
-$var wire 1 K B $end
-$var wire 1 ; A_N $end
-$upscope $end
-$upscope $end
-$scope module _221_ $end
-$var wire 1 EQ VGND $end
-$var wire 1 FQ VNB $end
-$var wire 1 GQ VPB $end
-$var wire 1 HQ VPWR $end
-$var wire 1 !# Y $end
-$var wire 1 L B $end
-$var wire 1 < A_N $end
-$scope module base $end
-$var wire 1 !# Y $end
-$var wire 1 IQ not0_out $end
-$var wire 1 JQ or0_out_Y $end
-$var wire 1 L B $end
-$var wire 1 < A_N $end
-$upscope $end
-$upscope $end
-$scope module _222_ $end
-$var wire 1 .# A1 $end
-$var wire 1 ## A2 $end
-$var wire 1 "# B1 $end
-$var wire 1 !# C1 $end
-$var wire 1 KQ VGND $end
-$var wire 1 LQ VNB $end
-$var wire 1 MQ VPB $end
-$var wire 1 NQ VPWR $end
-$var wire 1 ~" Y $end
-$scope module base $end
-$var wire 1 .# A1 $end
-$var wire 1 ## A2 $end
-$var wire 1 "# B1 $end
-$var wire 1 !# C1 $end
-$var wire 1 ~" Y $end
-$var wire 1 OQ nand0_out_Y $end
-$var wire 1 PQ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _223_ $end
-$var wire 1 QQ VGND $end
-$var wire 1 RQ VNB $end
-$var wire 1 SQ VPB $end
-$var wire 1 TQ VPWR $end
-$var wire 1 }" Y $end
-$var wire 1 J B_N $end
-$var wire 1 : A $end
-$scope module base $end
-$var wire 1 }" Y $end
-$var wire 1 UQ and0_out_Y $end
-$var wire 1 VQ not0_out $end
-$var wire 1 J B_N $end
-$var wire 1 : A $end
-$upscope $end
-$upscope $end
-$scope module _224_ $end
-$var wire 1 WQ VGND $end
-$var wire 1 XQ VNB $end
-$var wire 1 YQ VPB $end
-$var wire 1 ZQ VPWR $end
-$var wire 1 |" Y $end
-$var wire 1 I B_N $end
-$var wire 1 9 A $end
-$scope module base $end
-$var wire 1 |" Y $end
-$var wire 1 [Q and0_out_Y $end
-$var wire 1 \Q not0_out $end
-$var wire 1 I B_N $end
-$var wire 1 9 A $end
-$upscope $end
-$upscope $end
-$scope module _225_ $end
-$var wire 1 2# A1 $end
-$var wire 1 0# A2 $end
-$var wire 1 ~" A3 $end
-$var wire 1 }" B1 $end
-$var wire 1 |" C1 $end
-$var wire 1 ]Q VGND $end
-$var wire 1 ^Q VNB $end
-$var wire 1 _Q VPB $end
-$var wire 1 `Q VPWR $end
-$var wire 1 {" Y $end
-$scope module base $end
-$var wire 1 2# A1 $end
-$var wire 1 0# A2 $end
-$var wire 1 ~" A3 $end
-$var wire 1 }" B1 $end
-$var wire 1 |" C1 $end
-$var wire 1 {" Y $end
-$var wire 1 aQ and0_out $end
-$var wire 1 bQ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _226_ $end
-$var wire 1 cQ VGND $end
-$var wire 1 dQ VNB $end
-$var wire 1 eQ VPB $end
-$var wire 1 fQ VPWR $end
-$var wire 1 z" Y $end
-$var wire 1 W B $end
-$var wire 1 G A_N $end
-$scope module base $end
-$var wire 1 z" Y $end
-$var wire 1 gQ not0_out $end
-$var wire 1 hQ or0_out_Y $end
-$var wire 1 W B $end
-$var wire 1 G A_N $end
-$upscope $end
-$upscope $end
-$scope module _227_ $end
-$var wire 1 iQ VGND $end
-$var wire 1 jQ VNB $end
-$var wire 1 kQ VPB $end
-$var wire 1 lQ VPWR $end
-$var wire 1 y" Y $end
-$var wire 1 V B $end
-$var wire 1 F A_N $end
-$scope module base $end
-$var wire 1 y" Y $end
-$var wire 1 mQ not0_out $end
-$var wire 1 nQ or0_out_Y $end
-$var wire 1 V B $end
-$var wire 1 F A_N $end
-$upscope $end
-$upscope $end
-$scope module _228_ $end
-$var wire 1 4# A1 $end
-$var wire 1 3# A2 $end
-$var wire 1 {" A3 $end
-$var wire 1 z" B1 $end
-$var wire 1 y" C1 $end
-$var wire 1 oQ VGND $end
-$var wire 1 pQ VNB $end
-$var wire 1 qQ VPB $end
-$var wire 1 rQ VPWR $end
-$var wire 1 x" Y $end
-$scope module base $end
-$var wire 1 4# A1 $end
-$var wire 1 3# A2 $end
-$var wire 1 {" A3 $end
-$var wire 1 z" B1 $end
-$var wire 1 y" C1 $end
-$var wire 1 x" Y $end
-$var wire 1 sQ nand0_out_Y $end
-$var wire 1 tQ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _229_ $end
-$var wire 1 uQ VGND $end
-$var wire 1 vQ VNB $end
-$var wire 1 wQ VPB $end
-$var wire 1 xQ VPWR $end
-$var wire 1 w" Y $end
-$var wire 1 U B_N $end
-$var wire 1 E A $end
-$scope module base $end
-$var wire 1 w" Y $end
-$var wire 1 yQ and0_out_Y $end
-$var wire 1 zQ not0_out $end
-$var wire 1 U B_N $end
-$var wire 1 E A $end
-$upscope $end
-$upscope $end
-$scope module _230_ $end
-$var wire 1 {Q VGND $end
-$var wire 1 |Q VNB $end
-$var wire 1 }Q VPB $end
-$var wire 1 ~Q VPWR $end
-$var wire 1 v" Y $end
-$var wire 1 T B_N $end
-$var wire 1 D A $end
-$scope module base $end
-$var wire 1 v" Y $end
-$var wire 1 !R and0_out_Y $end
-$var wire 1 "R not0_out $end
-$var wire 1 T B_N $end
-$var wire 1 D A $end
-$upscope $end
-$upscope $end
-$scope module _231_ $end
-$var wire 1 7# A1 $end
-$var wire 1 6# A2 $end
-$var wire 1 x" A3 $end
-$var wire 1 w" B1 $end
-$var wire 1 v" C1 $end
-$var wire 1 #R VGND $end
-$var wire 1 $R VNB $end
-$var wire 1 %R VPB $end
-$var wire 1 &R VPWR $end
-$var wire 1 u" Y $end
-$scope module base $end
-$var wire 1 7# A1 $end
-$var wire 1 6# A2 $end
-$var wire 1 x" A3 $end
-$var wire 1 w" B1 $end
-$var wire 1 v" C1 $end
-$var wire 1 u" Y $end
-$var wire 1 'R and0_out $end
-$var wire 1 (R nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _232_ $end
-$var wire 1 8# A $end
-$var wire 1 u" B $end
-$var wire 1 )R VGND $end
-$var wire 1 *R VNB $end
-$var wire 1 +R VPB $end
-$var wire 1 ,R VPWR $end
-$var wire 1 t" Y $end
-$scope module base $end
-$var wire 1 8# A $end
-$var wire 1 u" B $end
-$var wire 1 t" Y $end
-$var wire 1 -R nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _233_ $end
-$var wire 1 .R VGND $end
-$var wire 1 /R VNB $end
-$var wire 1 0R VPB $end
-$var wire 1 1R VPWR $end
-$var wire 1 s" Y $end
-$var wire 1 S B $end
-$var wire 1 C A_N $end
-$scope module base $end
-$var wire 1 s" Y $end
-$var wire 1 2R not0_out $end
-$var wire 1 3R or0_out_Y $end
-$var wire 1 S B $end
-$var wire 1 C A_N $end
-$upscope $end
-$upscope $end
-$scope module _234_ $end
-$var wire 1 9# A1 $end
-$var wire 1 t" A2 $end
-$var wire 1 s" B1_N $end
-$var wire 1 4R VGND $end
-$var wire 1 5R VNB $end
-$var wire 1 6R VPB $end
-$var wire 1 7R VPWR $end
-$var wire 1 r" Y $end
-$scope module base $end
-$var wire 1 9# A1 $end
-$var wire 1 t" A2 $end
-$var wire 1 s" B1_N $end
-$var wire 1 r" Y $end
-$var wire 1 8R and0_out $end
-$var wire 1 9R b $end
-$var wire 1 :R nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _235_ $end
-$var wire 1 ;R VGND $end
-$var wire 1 R VPWR $end
-$var wire 1 q" Y $end
-$var wire 1 B B_N $end
-$var wire 1 R A $end
-$scope module base $end
-$var wire 1 q" Y $end
-$var wire 1 ?R and0_out_Y $end
-$var wire 1 @R not0_out $end
-$var wire 1 B B_N $end
-$var wire 1 R A $end
-$upscope $end
-$upscope $end
-$scope module _236_ $end
-$var wire 1 AR VGND $end
-$var wire 1 BR VNB $end
-$var wire 1 CR VPB $end
-$var wire 1 DR VPWR $end
-$var wire 1 p" Y $end
-$var wire 1 R B $end
-$var wire 1 B A_N $end
-$scope module base $end
-$var wire 1 p" Y $end
-$var wire 1 ER not0_out $end
-$var wire 1 FR or0_out_Y $end
-$var wire 1 R B $end
-$var wire 1 B A_N $end
-$upscope $end
-$upscope $end
-$scope module _237_ $end
-$var wire 1 q" A $end
-$var wire 1 p" B_N $end
-$var wire 1 GR VGND $end
-$var wire 1 HR VNB $end
-$var wire 1 IR VPB $end
-$var wire 1 JR VPWR $end
-$var wire 1 o" Y $end
-$scope module base $end
-$var wire 1 q" A $end
-$var wire 1 p" B_N $end
-$var wire 1 o" Y $end
-$var wire 1 KR and0_out_Y $end
-$var wire 1 LR not0_out $end
-$upscope $end
-$upscope $end
-$scope module _238_ $end
-$var wire 1 r" A $end
-$var wire 1 o" B $end
-$var wire 1 MR VGND $end
-$var wire 1 NR VNB $end
-$var wire 1 OR VPB $end
-$var wire 1 PR VPWR $end
-$var wire 1 QR Y $end
-$scope module base $end
-$var wire 1 r" A $end
-$var wire 1 o" B $end
-$var wire 1 QR Y $end
-$var wire 1 RR xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _239_ $end
-$var wire 1 SR VGND $end
-$var wire 1 TR VNB $end
-$var wire 1 UR VPB $end
-$var wire 1 VR VPWR $end
-$var wire 1 n" Y $end
-$var wire 1 Q B $end
-$var wire 1 A A $end
-$scope module base $end
-$var wire 1 n" Y $end
-$var wire 1 WR xnor0_out_Y $end
-$var wire 1 Q B $end
-$var wire 1 A A $end
-$upscope $end
-$upscope $end
-$scope module _240_ $end
-$var wire 1 n" B $end
-$var wire 1 XR VGND $end
-$var wire 1 YR VNB $end
-$var wire 1 ZR VPB $end
-$var wire 1 [R VPWR $end
-$var wire 1 \R Y $end
-$var wire 1 7 A $end
-$scope module base $end
-$var wire 1 n" B $end
-$var wire 1 \R Y $end
-$var wire 1 ]R xnor0_out_Y $end
-$var wire 1 7 A $end
-$upscope $end
-$upscope $end
-$scope module _241_ $end
-$var wire 1 ^R VGND $end
-$var wire 1 _R VNB $end
-$var wire 1 `R VPB $end
-$var wire 1 aR VPWR $end
-$var wire 1 m" Y $end
-$var wire 1 P B $end
-$var wire 1 @ A $end
-$scope module base $end
-$var wire 1 m" Y $end
-$var wire 1 bR xnor0_out_Y $end
-$var wire 1 P B $end
-$var wire 1 @ A $end
-$upscope $end
-$upscope $end
-$scope module _242_ $end
-$var wire 1 m" A $end
-$var wire 1 cR VGND $end
-$var wire 1 dR VNB $end
-$var wire 1 eR VPB $end
-$var wire 1 fR VPWR $end
-$var wire 1 gR Y $end
-$var wire 1 2 B $end
-$scope module base $end
-$var wire 1 m" A $end
-$var wire 1 gR Y $end
-$var wire 1 hR xnor0_out_Y $end
-$var wire 1 2 B $end
-$upscope $end
-$upscope $end
-$scope module _243_ $end
-$var wire 1 iR VGND $end
-$var wire 1 jR VNB $end
-$var wire 1 kR VPB $end
-$var wire 1 lR VPWR $end
-$var wire 1 l" Y $end
-$var wire 1 O B $end
-$var wire 1 ? A $end
-$scope module base $end
-$var wire 1 l" Y $end
-$var wire 1 mR xnor0_out_Y $end
-$var wire 1 O B $end
-$var wire 1 ? A $end
-$upscope $end
-$upscope $end
-$scope module _244_ $end
-$var wire 1 l" B $end
-$var wire 1 nR VGND $end
-$var wire 1 oR VNB $end
-$var wire 1 pR VPB $end
-$var wire 1 qR VPWR $end
-$var wire 1 rR Y $end
-$var wire 1 1 A $end
-$scope module base $end
-$var wire 1 l" B $end
-$var wire 1 rR Y $end
-$var wire 1 sR xnor0_out_Y $end
-$var wire 1 1 A $end
-$upscope $end
-$upscope $end
-$scope module _245_ $end
-$var wire 1 tR VGND $end
-$var wire 1 uR VNB $end
-$var wire 1 vR VPB $end
-$var wire 1 wR VPWR $end
-$var wire 1 k" Y $end
-$var wire 1 N B $end
-$var wire 1 > A $end
-$scope module base $end
-$var wire 1 k" Y $end
-$var wire 1 xR xnor0_out_Y $end
-$var wire 1 N B $end
-$var wire 1 > A $end
-$upscope $end
-$upscope $end
-$scope module _246_ $end
-$var wire 1 k" A $end
-$var wire 1 %# B $end
-$var wire 1 yR VGND $end
-$var wire 1 zR VNB $end
-$var wire 1 {R VPB $end
-$var wire 1 |R VPWR $end
-$var wire 1 }R Y $end
-$scope module base $end
-$var wire 1 k" A $end
-$var wire 1 %# B $end
-$var wire 1 }R Y $end
-$var wire 1 ~R xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _247_ $end
-$var wire 1 !S VGND $end
-$var wire 1 "S VNB $end
-$var wire 1 #S VPB $end
-$var wire 1 $S VPWR $end
-$var wire 1 j" Y $end
-$var wire 1 M B $end
-$var wire 1 = A $end
-$scope module base $end
-$var wire 1 j" Y $end
-$var wire 1 %S xnor0_out_Y $end
-$var wire 1 M B $end
-$var wire 1 = A $end
-$upscope $end
-$upscope $end
-$scope module _248_ $end
-$var wire 1 j" B $end
-$var wire 1 &S VGND $end
-$var wire 1 'S VNB $end
-$var wire 1 (S VPB $end
-$var wire 1 )S VPWR $end
-$var wire 1 *S Y $end
-$var wire 1 5 A $end
-$scope module base $end
-$var wire 1 j" B $end
-$var wire 1 *S Y $end
-$var wire 1 +S xnor0_out_Y $end
-$var wire 1 5 A $end
-$upscope $end
-$upscope $end
-$scope module _249_ $end
-$var wire 1 /# A $end
-$var wire 1 ## B $end
-$var wire 1 ,S VGND $end
-$var wire 1 -S VNB $end
-$var wire 1 .S VPB $end
-$var wire 1 /S VPWR $end
-$var wire 1 0S Y $end
-$scope module base $end
-$var wire 1 /# A $end
-$var wire 1 ## B $end
-$var wire 1 0S Y $end
-$var wire 1 1S xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _250_ $end
-$var wire 1 .# A1 $end
-$var wire 1 ## A2 $end
-$var wire 1 !# B1 $end
-$var wire 1 2S VGND $end
-$var wire 1 3S VNB $end
-$var wire 1 4S VPB $end
-$var wire 1 5S VPWR $end
-$var wire 1 i" X $end
-$scope module base $end
-$var wire 1 .# A1 $end
-$var wire 1 ## A2 $end
-$var wire 1 !# B1 $end
-$var wire 1 i" X $end
-$var wire 1 6S and0_out_X $end
-$var wire 1 7S or0_out $end
-$upscope $end
-$upscope $end
-$scope module _251_ $end
-$var wire 1 "# A $end
-$var wire 1 0# B $end
-$var wire 1 8S VGND $end
-$var wire 1 9S VNB $end
-$var wire 1 :S VPB $end
-$var wire 1 ;S VPWR $end
-$var wire 1 h" X $end
-$scope module base $end
-$var wire 1 "# A $end
-$var wire 1 0# B $end
-$var wire 1 h" X $end
-$var wire 1 S VNB $end
-$var wire 1 ?S VPB $end
-$var wire 1 @S VPWR $end
-$var wire 1 AS Y $end
-$scope module base $end
-$var wire 1 i" A $end
-$var wire 1 h" B $end
-$var wire 1 AS Y $end
-$var wire 1 BS xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _253_ $end
-$var wire 1 0# A $end
-$var wire 1 ~" B $end
-$var wire 1 CS VGND $end
-$var wire 1 DS VNB $end
-$var wire 1 ES VPB $end
-$var wire 1 FS VPWR $end
-$var wire 1 g" Y $end
-$scope module base $end
-$var wire 1 0# A $end
-$var wire 1 ~" B $end
-$var wire 1 g" Y $end
-$var wire 1 GS nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _254_ $end
-$var wire 1 2# A $end
-$var wire 1 g" B $end
-$var wire 1 HS VGND $end
-$var wire 1 IS VNB $end
-$var wire 1 JS VPB $end
-$var wire 1 KS VPWR $end
-$var wire 1 LS Y $end
-$scope module base $end
-$var wire 1 2# A $end
-$var wire 1 g" B $end
-$var wire 1 LS Y $end
-$var wire 1 MS xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _255_ $end
-$var wire 1 2# A1 $end
-$var wire 1 0# A2 $end
-$var wire 1 ~" A3 $end
-$var wire 1 }" B1 $end
-$var wire 1 NS VGND $end
-$var wire 1 OS VNB $end
-$var wire 1 PS VPB $end
-$var wire 1 QS VPWR $end
-$var wire 1 f" X $end
-$scope module base $end
-$var wire 1 2# A1 $end
-$var wire 1 0# A2 $end
-$var wire 1 ~" A3 $end
-$var wire 1 }" B1 $end
-$var wire 1 f" X $end
-$var wire 1 RS and0_out $end
-$var wire 1 SS or0_out_X $end
-$upscope $end
-$upscope $end
-$scope module _256_ $end
-$var wire 1 |" A $end
-$var wire 1 3# B $end
-$var wire 1 TS VGND $end
-$var wire 1 US VNB $end
-$var wire 1 VS VPB $end
-$var wire 1 WS VPWR $end
-$var wire 1 e" Y $end
-$scope module base $end
-$var wire 1 |" A $end
-$var wire 1 3# B $end
-$var wire 1 e" Y $end
-$var wire 1 XS nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _257_ $end
-$var wire 1 f" A $end
-$var wire 1 e" B $end
-$var wire 1 YS VGND $end
-$var wire 1 ZS VNB $end
-$var wire 1 [S VPB $end
-$var wire 1 \S VPWR $end
-$var wire 1 ]S X $end
-$scope module base $end
-$var wire 1 f" A $end
-$var wire 1 e" B $end
-$var wire 1 ]S X $end
-$var wire 1 ^S xor0_out_X $end
-$upscope $end
-$upscope $end
-$scope module _258_ $end
-$var wire 1 4# A $end
-$var wire 1 3# B $end
-$var wire 1 {" C $end
-$var wire 1 _S VGND $end
-$var wire 1 `S VNB $end
-$var wire 1 aS VPB $end
-$var wire 1 bS VPWR $end
-$var wire 1 d" Y $end
-$scope module base $end
-$var wire 1 4# A $end
-$var wire 1 3# B $end
-$var wire 1 {" C $end
-$var wire 1 d" Y $end
-$var wire 1 cS nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _259_ $end
-$var wire 1 3# A1 $end
-$var wire 1 {" A2 $end
-$var wire 1 4# B1 $end
-$var wire 1 dS VGND $end
-$var wire 1 eS VNB $end
-$var wire 1 fS VPB $end
-$var wire 1 gS VPWR $end
-$var wire 1 c" Y $end
-$scope module base $end
-$var wire 1 3# A1 $end
-$var wire 1 {" A2 $end
-$var wire 1 4# B1 $end
-$var wire 1 c" Y $end
-$var wire 1 hS nand0_out_Y $end
-$var wire 1 iS or0_out $end
-$upscope $end
-$upscope $end
-$scope module _260_ $end
-$var wire 1 d" A $end
-$var wire 1 c" B_N $end
-$var wire 1 jS VGND $end
-$var wire 1 kS VNB $end
-$var wire 1 lS VPB $end
-$var wire 1 mS VPWR $end
-$var wire 1 nS Y $end
-$scope module base $end
-$var wire 1 d" A $end
-$var wire 1 c" B_N $end
-$var wire 1 nS Y $end
-$var wire 1 oS and0_out_Y $end
-$var wire 1 pS not0_out $end
-$upscope $end
-$upscope $end
-$scope module _261_ $end
-$var wire 1 4# A1 $end
-$var wire 1 3# A2 $end
-$var wire 1 z" B1 $end
-$var wire 1 qS VGND $end
-$var wire 1 rS VNB $end
-$var wire 1 sS VPB $end
-$var wire 1 tS VPWR $end
-$var wire 1 b" Y $end
-$var wire 1 4 A3 $end
-$scope module base $end
-$var wire 1 4# A1 $end
-$var wire 1 3# A2 $end
-$var wire 1 z" B1 $end
-$var wire 1 b" Y $end
-$var wire 1 uS nand0_out_Y $end
-$var wire 1 vS or0_out $end
-$var wire 1 4 A3 $end
-$upscope $end
-$upscope $end
-$scope module _262_ $end
-$var wire 1 6# A $end
-$var wire 1 y" B $end
-$var wire 1 wS VGND $end
-$var wire 1 xS VNB $end
-$var wire 1 yS VPB $end
-$var wire 1 zS VPWR $end
-$var wire 1 a" Y $end
-$scope module base $end
-$var wire 1 6# A $end
-$var wire 1 y" B $end
-$var wire 1 a" Y $end
-$var wire 1 {S nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _263_ $end
-$var wire 1 b" A $end
-$var wire 1 a" B $end
-$var wire 1 |S VGND $end
-$var wire 1 }S VNB $end
-$var wire 1 ~S VPB $end
-$var wire 1 !T VPWR $end
-$var wire 1 "T Y $end
-$scope module base $end
-$var wire 1 b" A $end
-$var wire 1 a" B $end
-$var wire 1 "T Y $end
-$var wire 1 #T xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _264_ $end
-$var wire 1 6# A $end
-$var wire 1 x" B $end
-$var wire 1 $T VGND $end
-$var wire 1 %T VNB $end
-$var wire 1 &T VPB $end
-$var wire 1 'T VPWR $end
-$var wire 1 `" Y $end
-$scope module base $end
-$var wire 1 6# A $end
-$var wire 1 x" B $end
-$var wire 1 `" Y $end
-$var wire 1 (T nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _265_ $end
-$var wire 1 7# A $end
-$var wire 1 `" B $end
-$var wire 1 )T VGND $end
-$var wire 1 *T VNB $end
-$var wire 1 +T VPB $end
-$var wire 1 ,T VPWR $end
-$var wire 1 -T Y $end
-$scope module base $end
-$var wire 1 7# A $end
-$var wire 1 `" B $end
-$var wire 1 -T Y $end
-$var wire 1 .T xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _266_ $end
-$var wire 1 7# A1 $end
-$var wire 1 6# A2 $end
-$var wire 1 w" B1 $end
-$var wire 1 /T VGND $end
-$var wire 1 0T VNB $end
-$var wire 1 1T VPB $end
-$var wire 1 2T VPWR $end
-$var wire 1 _" Y $end
-$var wire 1 6 A3 $end
-$scope module base $end
-$var wire 1 7# A1 $end
-$var wire 1 6# A2 $end
-$var wire 1 w" B1 $end
-$var wire 1 _" Y $end
-$var wire 1 3T and0_out $end
-$var wire 1 4T nor0_out_Y $end
-$var wire 1 6 A3 $end
-$upscope $end
-$upscope $end
-$scope module _267_ $end
-$var wire 1 v" A $end
-$var wire 1 8# B $end
-$var wire 1 5T VGND $end
-$var wire 1 6T VNB $end
-$var wire 1 7T VPB $end
-$var wire 1 8T VPWR $end
-$var wire 1 ^" Y $end
-$scope module base $end
-$var wire 1 v" A $end
-$var wire 1 8# B $end
-$var wire 1 ^" Y $end
-$var wire 1 9T nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _268_ $end
-$var wire 1 _" A $end
-$var wire 1 ^" B $end
-$var wire 1 :T VGND $end
-$var wire 1 ;T VNB $end
-$var wire 1 T Y $end
-$scope module base $end
-$var wire 1 _" A $end
-$var wire 1 ^" B $end
-$var wire 1 >T Y $end
-$var wire 1 ?T xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _269_ $end
-$var wire 1 9# A $end
-$var wire 1 @T VGND $end
-$var wire 1 AT VNB $end
-$var wire 1 BT VPB $end
-$var wire 1 CT VPWR $end
-$var wire 1 ]" Y $end
-$scope module base $end
-$var wire 1 9# A $end
-$var wire 1 ]" Y $end
-$var wire 1 DT not0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _270_ $end
-$var wire 1 ]" A $end
-$var wire 1 t" B $end
-$var wire 1 ET VGND $end
-$var wire 1 FT VNB $end
-$var wire 1 GT VPB $end
-$var wire 1 HT VPWR $end
-$var wire 1 IT Y $end
-$scope module base $end
-$var wire 1 ]" A $end
-$var wire 1 t" B $end
-$var wire 1 IT Y $end
-$var wire 1 JT xnor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _271_ $end
-$var wire 1 KT VGND $end
-$var wire 1 LT VNB $end
-$var wire 1 MT VPB $end
-$var wire 1 NT VPWR $end
-$var wire 1 OT X $end
-$var wire 1 0 B $end
-$var wire 1 X A $end
-$scope module base $end
-$var wire 1 OT X $end
-$var wire 1 PT xor0_out_X $end
-$var wire 1 0 B $end
-$var wire 1 X A $end
-$upscope $end
-$upscope $end
-$scope module _272_ $end
-$var wire 1 QT VGND $end
-$var wire 1 RT VNB $end
-$var wire 1 ST VPB $end
-$var wire 1 TT VPWR $end
-$var wire 1 \" Y $end
-$var wire 1 C B $end
-$var wire 1 D A $end
-$scope module base $end
-$var wire 1 \" Y $end
-$var wire 1 UT nor0_out_Y $end
-$var wire 1 C B $end
-$var wire 1 D A $end
-$upscope $end
-$upscope $end
-$scope module _273_ $end
-$var wire 1 VT VGND $end
-$var wire 1 WT VNB $end
-$var wire 1 XT VPB $end
-$var wire 1 YT VPWR $end
-$var wire 1 [" Y $end
-$var wire 1 B D $end
-$var wire 1 G C $end
-$var wire 1 > B $end
-$var wire 1 ? A $end
-$scope module base $end
-$var wire 1 [" Y $end
-$var wire 1 ZT nor0_out_Y $end
-$var wire 1 B D $end
-$var wire 1 G C $end
-$var wire 1 > B $end
-$var wire 1 ? A $end
-$upscope $end
-$upscope $end
-$scope module _274_ $end
-$var wire 1 [T VGND $end
-$var wire 1 \T VNB $end
-$var wire 1 ]T VPB $end
-$var wire 1 ^T VPWR $end
-$var wire 1 Z" Y $end
-$var wire 1 A D $end
-$var wire 1 3 C $end
-$var wire 1 ; B $end
-$var wire 1 < A $end
-$scope module base $end
-$var wire 1 Z" Y $end
-$var wire 1 _T nor0_out_Y $end
-$var wire 1 A D $end
-$var wire 1 3 C $end
-$var wire 1 ; B $end
-$var wire 1 < A $end
-$upscope $end
-$upscope $end
-$scope module _275_ $end
-$var wire 1 \" A $end
-$var wire 1 [" B $end
-$var wire 1 Z" C $end
-$var wire 1 `T VGND $end
-$var wire 1 aT VNB $end
-$var wire 1 bT VPB $end
-$var wire 1 cT VPWR $end
-$var wire 1 Y" Y $end
-$scope module base $end
-$var wire 1 \" A $end
-$var wire 1 [" B $end
-$var wire 1 Z" C $end
-$var wire 1 Y" Y $end
-$var wire 1 dT nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _276_ $end
-$var wire 1 eT VGND $end
-$var wire 1 fT VNB $end
-$var wire 1 gT VPB $end
-$var wire 1 hT VPWR $end
-$var wire 1 X" X $end
-$var wire 1 9 D $end
-$var wire 1 : C $end
-$var wire 1 = B $end
-$var wire 1 @ A $end
-$scope module base $end
-$var wire 1 X" X $end
-$var wire 1 iT or0_out_X $end
-$var wire 1 9 D $end
-$var wire 1 : C $end
-$var wire 1 = B $end
-$var wire 1 @ A $end
-$upscope $end
-$upscope $end
-$scope module _277_ $end
-$var wire 1 Y" C $end
-$var wire 1 X" D $end
-$var wire 1 jT VGND $end
-$var wire 1 kT VNB $end
-$var wire 1 lT VPB $end
-$var wire 1 mT VPWR $end
-$var wire 1 W" Y $end
-$var wire 1 E B $end
-$var wire 1 F A $end
-$scope module base $end
-$var wire 1 Y" C $end
-$var wire 1 X" D $end
-$var wire 1 W" Y $end
-$var wire 1 nT nor0_out_Y $end
-$var wire 1 E B $end
-$var wire 1 F A $end
-$upscope $end
-$upscope $end
-$scope module _278_ $end
-$var wire 1 + A $end
-$var wire 1 oT VGND $end
-$var wire 1 pT VNB $end
-$var wire 1 qT VPB $end
-$var wire 1 rT VPWR $end
-$var wire 1 V" Y $end
-$scope module base $end
-$var wire 1 + A $end
-$var wire 1 V" Y $end
-$var wire 1 sT not0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _279_ $end
-$var wire 1 V" B $end
-$var wire 1 tT VGND $end
-$var wire 1 uT VNB $end
-$var wire 1 vT VPB $end
-$var wire 1 wT VPWR $end
-$var wire 1 U" Y $end
-$var wire 1 Y A $end
-$scope module base $end
-$var wire 1 V" B $end
-$var wire 1 U" Y $end
-$var wire 1 xT nand0_out_Y $end
-$var wire 1 Y A $end
-$upscope $end
-$upscope $end
-$scope module _282_ $end
-$var wire 1 * B $end
-$var wire 1 yT VGND $end
-$var wire 1 zT VNB $end
-$var wire 1 {T VPB $end
-$var wire 1 |T VPWR $end
-$var wire 1 T" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 * B $end
-$var wire 1 T" Y $end
-$var wire 1 }T nand0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _283_ $end
-$var wire 1 W" A1 $end
-$var wire 1 U" A2 $end
-$var wire 1 T" B1 $end
-$var wire 1 + B2 $end
-$var wire 1 ~T VGND $end
-$var wire 1 !U VNB $end
-$var wire 1 "U VPB $end
-$var wire 1 #U VPWR $end
-$var wire 1 Z# Y $end
-$scope module base $end
-$var wire 1 W" A1 $end
-$var wire 1 U" A2 $end
-$var wire 1 T" B1 $end
-$var wire 1 + B2 $end
-$var wire 1 Z# Y $end
-$var wire 1 $U nor0_out $end
-$var wire 1 %U nor1_out $end
-$var wire 1 &U or0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _284_ $end
-$var wire 1 'U VGND $end
-$var wire 1 (U VNB $end
-$var wire 1 )U VPB $end
-$var wire 1 *U VPWR $end
-$var wire 1 S" Y $end
-$var wire 1 # B $end
-$var wire 1 Y A $end
-$scope module base $end
-$var wire 1 S" Y $end
-$var wire 1 +U nor0_out_Y $end
-$var wire 1 # B $end
-$var wire 1 Y A $end
-$upscope $end
-$upscope $end
-$scope module _285_ $end
-$var wire 1 S" B $end
-$var wire 1 ,U VGND $end
-$var wire 1 -U VNB $end
-$var wire 1 .U VPB $end
-$var wire 1 /U VPWR $end
-$var wire 1 ! X $end
-$var wire 1 Z A $end
-$scope module base $end
-$var wire 1 S" B $end
-$var wire 1 ! X $end
-$var wire 1 0U and0_out_X $end
-$var wire 1 Z A $end
-$upscope $end
-$upscope $end
-$scope module _286_ $end
-$var wire 1 1U VGND $end
-$var wire 1 2U VNB $end
-$var wire 1 3U VPB $end
-$var wire 1 4U VPWR $end
-$var wire 1 R" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 R" Y $end
-$var wire 1 5U not0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _288_ $end
-$var wire 1 , A1 $end
-$var wire 1 ! A2 $end
-$var wire 1 + B1 $end
-$var wire 1 6U VGND $end
-$var wire 1 7U VNB $end
-$var wire 1 8U VPB $end
-$var wire 1 9U VPWR $end
-$var wire 1 Q" Y $end
-$scope module base $end
-$var wire 1 , A1 $end
-$var wire 1 ! A2 $end
-$var wire 1 + B1 $end
-$var wire 1 Q" Y $end
-$var wire 1 :U and0_out $end
-$var wire 1 ;U nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _289_ $end
-$var wire 1 R" A1 $end
-$var wire 1 * A2 $end
-$var wire 1 Q" B1 $end
-$var wire 1 U VPB $end
-$var wire 1 ?U VPWR $end
-$var wire 1 \# Y $end
-$scope module base $end
-$var wire 1 R" A1 $end
-$var wire 1 * A2 $end
-$var wire 1 Q" B1 $end
-$var wire 1 \# Y $end
-$var wire 1 @U nand0_out_Y $end
-$var wire 1 AU or0_out $end
-$upscope $end
-$upscope $end
-$scope module _290_ $end
-$var wire 1 V" A2 $end
-$var wire 1 W" A3 $end
-$var wire 1 Q" B1 $end
-$var wire 1 BU VGND $end
-$var wire 1 CU VNB $end
-$var wire 1 DU VPB $end
-$var wire 1 EU VPWR $end
-$var wire 1 [# X $end
-$var wire 1 Z B2 $end
-$var wire 1 Y A1 $end
-$scope module base $end
-$var wire 1 V" A2 $end
-$var wire 1 W" A3 $end
-$var wire 1 Q" B1 $end
-$var wire 1 [# X $end
-$var wire 1 FU and0_out $end
-$var wire 1 GU and1_out $end
-$var wire 1 HU or0_out_X $end
-$var wire 1 Z B2 $end
-$var wire 1 Y A1 $end
-$upscope $end
-$upscope $end
-$scope module _291_ $end
-$var wire 1 IU B $end
-$var wire 1 JU VGND $end
-$var wire 1 KU VNB $end
-$var wire 1 LU VPB $end
-$var wire 1 MU VPWR $end
-$var wire 1 P" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 IU B $end
-$var wire 1 P" Y $end
-$var wire 1 NU nand0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _292_ $end
-$var wire 1 ]" A1 $end
-$var wire 1 8# A2 $end
-$var wire 1 u" A3 $end
-$var wire 1 p" B1 $end
-$var wire 1 s" C1 $end
-$var wire 1 OU VGND $end
-$var wire 1 PU VNB $end
-$var wire 1 QU VPB $end
-$var wire 1 RU VPWR $end
-$var wire 1 O" X $end
-$scope module base $end
-$var wire 1 ]" A1 $end
-$var wire 1 8# A2 $end
-$var wire 1 u" A3 $end
-$var wire 1 p" B1 $end
-$var wire 1 s" C1 $end
-$var wire 1 O" X $end
-$var wire 1 SU and0_out_X $end
-$var wire 1 TU or0_out $end
-$upscope $end
-$upscope $end
-$scope module _293_ $end
-$var wire 1 UU VGND $end
-$var wire 1 VU VNB $end
-$var wire 1 WU VPB $end
-$var wire 1 XU VPWR $end
-$var wire 1 N" X $end
-$var wire 1 # B $end
-$var wire 1 Y A $end
-$scope module base $end
-$var wire 1 N" X $end
-$var wire 1 YU or0_out_X $end
-$var wire 1 # B $end
-$var wire 1 Y A $end
-$upscope $end
-$upscope $end
-$scope module _295_ $end
-$var wire 1 q" A2 $end
-$var wire 1 O" A3 $end
-$var wire 1 N" B1 $end
-$var wire 1 ZU VGND $end
-$var wire 1 [U VNB $end
-$var wire 1 \U VPB $end
-$var wire 1 ]U VPWR $end
-$var wire 1 M" Y $end
-$var wire 1 # A1 $end
-$scope module base $end
-$var wire 1 q" A2 $end
-$var wire 1 O" A3 $end
-$var wire 1 N" B1 $end
-$var wire 1 M" Y $end
-$var wire 1 ^U nand0_out_Y $end
-$var wire 1 _U or0_out $end
-$var wire 1 # A1 $end
-$upscope $end
-$upscope $end
-$scope module _297_ $end
-$var wire 1 R" B $end
-$var wire 1 `U VGND $end
-$var wire 1 aU VNB $end
-$var wire 1 bU VPB $end
-$var wire 1 cU VPWR $end
-$var wire 1 L" Y $end
-$var wire 1 Y A $end
-$scope module base $end
-$var wire 1 R" B $end
-$var wire 1 L" Y $end
-$var wire 1 dU nand0_out_Y $end
-$var wire 1 Y A $end
-$upscope $end
-$upscope $end
-$scope module _298_ $end
-$var wire 1 q" A1 $end
-$var wire 1 O" A2 $end
-$var wire 1 L" B1_N $end
-$var wire 1 eU VGND $end
-$var wire 1 fU VNB $end
-$var wire 1 gU VPB $end
-$var wire 1 hU VPWR $end
-$var wire 1 K" X $end
-$scope module base $end
-$var wire 1 q" A1 $end
-$var wire 1 O" A2 $end
-$var wire 1 L" B1_N $end
-$var wire 1 K" X $end
-$var wire 1 iU nor0_out $end
-$var wire 1 jU nor1_out_X $end
-$upscope $end
-$upscope $end
-$scope module _301_ $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 kU VGND $end
-$var wire 1 lU VNB $end
-$var wire 1 mU VPB $end
-$var wire 1 nU VPWR $end
-$var wire 1 J" Y $end
-$var wire 1 X B2 $end
-$var wire 1 0 A1 $end
-$scope module base $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 J" Y $end
-$var wire 1 oU and0_out_Y $end
-$var wire 1 pU nand0_out $end
-$var wire 1 qU nand1_out $end
-$var wire 1 X B2 $end
-$var wire 1 0 A1 $end
-$upscope $end
-$upscope $end
-$scope module _302_ $end
-$var wire 1 P" A $end
-$var wire 1 J" B $end
-$var wire 1 rU VGND $end
-$var wire 1 sU VNB $end
-$var wire 1 tU VPB $end
-$var wire 1 uU VPWR $end
-$var wire 1 Y# Y $end
-$scope module base $end
-$var wire 1 P" A $end
-$var wire 1 J" B $end
-$var wire 1 Y# Y $end
-$var wire 1 vU nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _303_ $end
-$var wire 1 wU B $end
-$var wire 1 xU VGND $end
-$var wire 1 yU VNB $end
-$var wire 1 zU VPB $end
-$var wire 1 {U VPWR $end
-$var wire 1 I" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 wU B $end
-$var wire 1 I" Y $end
-$var wire 1 |U nand0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _304_ $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 }U VGND $end
-$var wire 1 ~U VNB $end
-$var wire 1 !V VPB $end
-$var wire 1 "V VPWR $end
-$var wire 1 H" Y $end
-$var wire 1 Q B2 $end
-$var wire 1 A A1 $end
-$scope module base $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 H" Y $end
-$var wire 1 #V and0_out_Y $end
-$var wire 1 $V nand0_out $end
-$var wire 1 %V nand1_out $end
-$var wire 1 Q B2 $end
-$var wire 1 A A1 $end
-$upscope $end
-$upscope $end
-$scope module _305_ $end
-$var wire 1 I" A $end
-$var wire 1 H" B $end
-$var wire 1 &V VGND $end
-$var wire 1 'V VNB $end
-$var wire 1 (V VPB $end
-$var wire 1 )V VPWR $end
-$var wire 1 X# Y $end
-$scope module base $end
-$var wire 1 I" A $end
-$var wire 1 H" B $end
-$var wire 1 X# Y $end
-$var wire 1 *V nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _307_ $end
-$var wire 1 +V VGND $end
-$var wire 1 ,V VNB $end
-$var wire 1 -V VPB $end
-$var wire 1 .V VPWR $end
-$var wire 1 G" Y $end
-$var wire 1 8 B $end
-$var wire 1 @ A $end
-$scope module base $end
-$var wire 1 G" Y $end
-$var wire 1 /V nand0_out_Y $end
-$var wire 1 8 B $end
-$var wire 1 @ A $end
-$upscope $end
-$upscope $end
-$scope module _308_ $end
-$var wire 1 0V A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 1V VGND $end
-$var wire 1 2V VNB $end
-$var wire 1 3V VPB $end
-$var wire 1 4V VPWR $end
-$var wire 1 F" Y $end
-$var wire 1 P B2 $end
-$var wire 1 # A1 $end
-$scope module base $end
-$var wire 1 0V A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 F" Y $end
-$var wire 1 5V and0_out_Y $end
-$var wire 1 6V nand0_out $end
-$var wire 1 7V nand1_out $end
-$var wire 1 P B2 $end
-$var wire 1 # A1 $end
-$upscope $end
-$upscope $end
-$scope module _309_ $end
-$var wire 1 G" A $end
-$var wire 1 F" B $end
-$var wire 1 8V VGND $end
-$var wire 1 9V VNB $end
-$var wire 1 :V VPB $end
-$var wire 1 ;V VPWR $end
-$var wire 1 W# Y $end
-$scope module base $end
-$var wire 1 G" A $end
-$var wire 1 F" B $end
-$var wire 1 W# Y $end
-$var wire 1 V VGND $end
-$var wire 1 ?V VNB $end
-$var wire 1 @V VPB $end
-$var wire 1 AV VPWR $end
-$var wire 1 E" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 =V B $end
-$var wire 1 E" Y $end
-$var wire 1 BV nand0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _311_ $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 CV VGND $end
-$var wire 1 DV VNB $end
-$var wire 1 EV VPB $end
-$var wire 1 FV VPWR $end
-$var wire 1 D" Y $end
-$var wire 1 O B2 $end
-$var wire 1 ? A1 $end
-$scope module base $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 D" Y $end
-$var wire 1 GV and0_out_Y $end
-$var wire 1 HV nand0_out $end
-$var wire 1 IV nand1_out $end
-$var wire 1 O B2 $end
-$var wire 1 ? A1 $end
-$upscope $end
-$upscope $end
-$scope module _312_ $end
-$var wire 1 E" A $end
-$var wire 1 D" B $end
-$var wire 1 JV VGND $end
-$var wire 1 KV VNB $end
-$var wire 1 LV VPB $end
-$var wire 1 MV VPWR $end
-$var wire 1 V# Y $end
-$scope module base $end
-$var wire 1 E" A $end
-$var wire 1 D" B $end
-$var wire 1 V# Y $end
-$var wire 1 NV nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _313_ $end
-$var wire 1 OV VGND $end
-$var wire 1 PV VNB $end
-$var wire 1 QV VPB $end
-$var wire 1 RV VPWR $end
-$var wire 1 C" Y $end
-$var wire 1 > A $end
-$scope module base $end
-$var wire 1 C" Y $end
-$var wire 1 SV not0_out_Y $end
-$var wire 1 > A $end
-$upscope $end
-$upscope $end
-$scope module _315_ $end
-$var wire 1 R" A $end
-$var wire 1 TV B $end
-$var wire 1 UV VGND $end
-$var wire 1 VV VNB $end
-$var wire 1 WV VPB $end
-$var wire 1 XV VPWR $end
-$var wire 1 B" Y $end
-$scope module base $end
-$var wire 1 R" A $end
-$var wire 1 TV B $end
-$var wire 1 B" Y $end
-$var wire 1 YV nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _316_ $end
-$var wire 1 C" A1 $end
-$var wire 1 K" B1 $end
-$var wire 1 ,# B2 $end
-$var wire 1 B" C1 $end
-$var wire 1 ZV VGND $end
-$var wire 1 [V VNB $end
-$var wire 1 \V VPB $end
-$var wire 1 ]V VPWR $end
-$var wire 1 U# Y $end
-$var wire 1 8 A2 $end
-$scope module base $end
-$var wire 1 C" A1 $end
-$var wire 1 K" B1 $end
-$var wire 1 ,# B2 $end
-$var wire 1 B" C1 $end
-$var wire 1 U# Y $end
-$var wire 1 ^V and0_out $end
-$var wire 1 _V and1_out $end
-$var wire 1 `V nor0_out_Y $end
-$var wire 1 8 A2 $end
-$upscope $end
-$upscope $end
-$scope module _317_ $end
-$var wire 1 aV A1 $end
-$var wire 1 bV VGND $end
-$var wire 1 cV VNB $end
-$var wire 1 dV VPB $end
-$var wire 1 eV VPWR $end
-$var wire 1 A" Y $end
-$var wire 1 # S $end
-$var wire 1 M A0 $end
-$scope module base $end
-$var wire 1 aV A1 $end
-$var wire 1 A" Y $end
-$var wire 1 fV mux_2to1_n0_out_Y $end
-$var wire 1 # S $end
-$var wire 1 M A0 $end
-$upscope $end
-$upscope $end
-$scope module _318_ $end
-$var wire 1 gV VGND $end
-$var wire 1 hV VNB $end
-$var wire 1 iV VPB $end
-$var wire 1 jV VPWR $end
-$var wire 1 @" Y $end
-$var wire 1 8 B $end
-$var wire 1 = A $end
-$scope module base $end
-$var wire 1 @" Y $end
-$var wire 1 kV nand0_out_Y $end
-$var wire 1 8 B $end
-$var wire 1 = A $end
-$upscope $end
-$upscope $end
-$scope module _319_ $end
-$var wire 1 A" A2 $end
-$var wire 1 @" B1 $end
-$var wire 1 lV VGND $end
-$var wire 1 mV VNB $end
-$var wire 1 nV VPB $end
-$var wire 1 oV VPWR $end
-$var wire 1 T# Y $end
-$var wire 1 8 A1 $end
-$scope module base $end
-$var wire 1 A" A2 $end
-$var wire 1 @" B1 $end
-$var wire 1 T# Y $end
-$var wire 1 pV nand0_out_Y $end
-$var wire 1 qV or0_out $end
-$var wire 1 8 A1 $end
-$upscope $end
-$upscope $end
-$scope module _320_ $end
-$var wire 1 rV B $end
-$var wire 1 sV VGND $end
-$var wire 1 tV VNB $end
-$var wire 1 uV VPB $end
-$var wire 1 vV VPWR $end
-$var wire 1 ?" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 rV B $end
-$var wire 1 ?" Y $end
-$var wire 1 wV nand0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _321_ $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 xV VGND $end
-$var wire 1 yV VNB $end
-$var wire 1 zV VPB $end
-$var wire 1 {V VPWR $end
-$var wire 1 >" Y $end
-$var wire 1 L B2 $end
-$var wire 1 < A1 $end
-$scope module base $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 >" Y $end
-$var wire 1 |V and0_out_Y $end
-$var wire 1 }V nand0_out $end
-$var wire 1 ~V nand1_out $end
-$var wire 1 L B2 $end
-$var wire 1 < A1 $end
-$upscope $end
-$upscope $end
-$scope module _322_ $end
-$var wire 1 ?" A $end
-$var wire 1 >" B $end
-$var wire 1 !W VGND $end
-$var wire 1 "W VNB $end
-$var wire 1 #W VPB $end
-$var wire 1 $W VPWR $end
-$var wire 1 S# Y $end
-$scope module base $end
-$var wire 1 ?" A $end
-$var wire 1 >" B $end
-$var wire 1 S# Y $end
-$var wire 1 %W nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _323_ $end
-$var wire 1 &W B $end
-$var wire 1 'W VGND $end
-$var wire 1 (W VNB $end
-$var wire 1 )W VPB $end
-$var wire 1 *W VPWR $end
-$var wire 1 =" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 &W B $end
-$var wire 1 =" Y $end
-$var wire 1 +W nand0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _324_ $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 ,W VGND $end
-$var wire 1 -W VNB $end
-$var wire 1 .W VPB $end
-$var wire 1 /W VPWR $end
-$var wire 1 <" Y $end
-$var wire 1 K B2 $end
-$var wire 1 ; A1 $end
-$scope module base $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 <" Y $end
-$var wire 1 0W and0_out_Y $end
-$var wire 1 1W nand0_out $end
-$var wire 1 2W nand1_out $end
-$var wire 1 K B2 $end
-$var wire 1 ; A1 $end
-$upscope $end
-$upscope $end
-$scope module _325_ $end
-$var wire 1 =" A $end
-$var wire 1 <" B $end
-$var wire 1 3W VGND $end
-$var wire 1 4W VNB $end
-$var wire 1 5W VPB $end
-$var wire 1 6W VPWR $end
-$var wire 1 R# Y $end
-$scope module base $end
-$var wire 1 =" A $end
-$var wire 1 <" B $end
-$var wire 1 R# Y $end
-$var wire 1 7W nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _326_ $end
-$var wire 1 8W A1 $end
-$var wire 1 9W VGND $end
-$var wire 1 :W VNB $end
-$var wire 1 ;W VPB $end
-$var wire 1 W VGND $end
-$var wire 1 ?W VNB $end
-$var wire 1 @W VPB $end
-$var wire 1 AW VPWR $end
-$var wire 1 :" Y $end
-$var wire 1 8 B $end
-$var wire 1 : A $end
-$scope module base $end
-$var wire 1 :" Y $end
-$var wire 1 BW nand0_out_Y $end
-$var wire 1 8 B $end
-$var wire 1 : A $end
-$upscope $end
-$upscope $end
-$scope module _328_ $end
-$var wire 1 M" A1 $end
-$var wire 1 ;" A2 $end
-$var wire 1 :" B1 $end
-$var wire 1 CW VGND $end
-$var wire 1 DW VNB $end
-$var wire 1 EW VPB $end
-$var wire 1 FW VPWR $end
-$var wire 1 Q# Y $end
-$scope module base $end
-$var wire 1 M" A1 $end
-$var wire 1 ;" A2 $end
-$var wire 1 :" B1 $end
-$var wire 1 Q# Y $end
-$var wire 1 GW nand0_out_Y $end
-$var wire 1 HW or0_out $end
-$upscope $end
-$upscope $end
-$scope module _329_ $end
-$var wire 1 IW A1 $end
-$var wire 1 JW VGND $end
-$var wire 1 KW VNB $end
-$var wire 1 LW VPB $end
-$var wire 1 MW VPWR $end
-$var wire 1 9" Y $end
-$var wire 1 # S $end
-$var wire 1 I A0 $end
-$scope module base $end
-$var wire 1 IW A1 $end
-$var wire 1 9" Y $end
-$var wire 1 NW mux_2to1_n0_out_Y $end
-$var wire 1 # S $end
-$var wire 1 I A0 $end
-$upscope $end
-$upscope $end
-$scope module _330_ $end
-$var wire 1 OW VGND $end
-$var wire 1 PW VNB $end
-$var wire 1 QW VPB $end
-$var wire 1 RW VPWR $end
-$var wire 1 8" Y $end
-$var wire 1 8 B $end
-$var wire 1 9 A $end
-$scope module base $end
-$var wire 1 8" Y $end
-$var wire 1 SW nand0_out_Y $end
-$var wire 1 8 B $end
-$var wire 1 9 A $end
-$upscope $end
-$upscope $end
-$scope module _331_ $end
-$var wire 1 9" A2 $end
-$var wire 1 8" B1 $end
-$var wire 1 TW VGND $end
-$var wire 1 UW VNB $end
-$var wire 1 VW VPB $end
-$var wire 1 WW VPWR $end
-$var wire 1 P# Y $end
-$var wire 1 8 A1 $end
-$scope module base $end
-$var wire 1 9" A2 $end
-$var wire 1 8" B1 $end
-$var wire 1 P# Y $end
-$var wire 1 XW nand0_out_Y $end
-$var wire 1 YW or0_out $end
-$var wire 1 8 A1 $end
-$upscope $end
-$upscope $end
-$scope module _332_ $end
-$var wire 1 ZW A1 $end
-$var wire 1 [W VGND $end
-$var wire 1 \W VNB $end
-$var wire 1 ]W VPB $end
-$var wire 1 ^W VPWR $end
-$var wire 1 7" X $end
-$var wire 1 # S $end
-$var wire 1 W A0 $end
-$scope module base $end
-$var wire 1 ZW A1 $end
-$var wire 1 7" X $end
-$var wire 1 _W mux_2to10_out_X $end
-$var wire 1 # S $end
-$var wire 1 W A0 $end
-$upscope $end
-$upscope $end
-$scope module _333_ $end
-$var wire 1 7" A0 $end
-$var wire 1 M" S $end
-$var wire 1 `W VGND $end
-$var wire 1 aW VNB $end
-$var wire 1 bW VPB $end
-$var wire 1 cW VPWR $end
-$var wire 1 O# X $end
-$var wire 1 G A1 $end
-$scope module base $end
-$var wire 1 7" A0 $end
-$var wire 1 M" S $end
-$var wire 1 O# X $end
-$var wire 1 dW mux_2to10_out_X $end
-$var wire 1 G A1 $end
-$upscope $end
-$upscope $end
-$scope module _334_ $end
-$var wire 1 eW B $end
-$var wire 1 fW VGND $end
-$var wire 1 gW VNB $end
-$var wire 1 hW VPB $end
-$var wire 1 iW VPWR $end
-$var wire 1 6" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 eW B $end
-$var wire 1 6" Y $end
-$var wire 1 jW nand0_out_Y $end
-$var wire 1 # A $end
-$upscope $end
-$upscope $end
-$scope module _335_ $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 kW VGND $end
-$var wire 1 lW VNB $end
-$var wire 1 mW VPB $end
-$var wire 1 nW VPWR $end
-$var wire 1 5" Y $end
-$var wire 1 V B2 $end
-$var wire 1 F A1 $end
-$scope module base $end
-$var wire 1 M" A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 5" Y $end
-$var wire 1 oW and0_out_Y $end
-$var wire 1 pW nand0_out $end
-$var wire 1 qW nand1_out $end
-$var wire 1 V B2 $end
-$var wire 1 F A1 $end
-$upscope $end
-$upscope $end
-$scope module _336_ $end
-$var wire 1 6" A $end
-$var wire 1 5" B $end
-$var wire 1 rW VGND $end
-$var wire 1 sW VNB $end
-$var wire 1 tW VPB $end
-$var wire 1 uW VPWR $end
-$var wire 1 N# Y $end
-$scope module base $end
-$var wire 1 6" A $end
-$var wire 1 5" B $end
-$var wire 1 N# Y $end
-$var wire 1 vW nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _337_ $end
-$var wire 1 wW VGND $end
-$var wire 1 xW VNB $end
-$var wire 1 yW VPB $end
-$var wire 1 zW VPWR $end
-$var wire 1 4" Y $end
-$var wire 1 8 B $end
-$var wire 1 E A $end
-$scope module base $end
-$var wire 1 4" Y $end
-$var wire 1 {W nand0_out_Y $end
-$var wire 1 8 B $end
-$var wire 1 E A $end
-$upscope $end
-$upscope $end
-$scope module _338_ $end
-$var wire 1 |W A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 }W VGND $end
-$var wire 1 ~W VNB $end
-$var wire 1 !X VPB $end
-$var wire 1 "X VPWR $end
-$var wire 1 3" Y $end
-$var wire 1 U B2 $end
-$var wire 1 # A1 $end
-$scope module base $end
-$var wire 1 |W A2 $end
-$var wire 1 K" B1 $end
-$var wire 1 3" Y $end
-$var wire 1 #X and0_out_Y $end
-$var wire 1 $X nand0_out $end
-$var wire 1 %X nand1_out $end
-$var wire 1 U B2 $end
-$var wire 1 # A1 $end
-$upscope $end
-$upscope $end
-$scope module _339_ $end
-$var wire 1 4" A $end
-$var wire 1 3" B $end
-$var wire 1 &X VGND $end
-$var wire 1 'X VNB $end
-$var wire 1 (X VPB $end
-$var wire 1 )X VPWR $end
-$var wire 1 M# Y $end
-$scope module base $end
-$var wire 1 4" A $end
-$var wire 1 3" B $end
-$var wire 1 M# Y $end
-$var wire 1 *X nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _340_ $end
-$var wire 1 +X A1 $end
-$var wire 1 ,X VGND $end
-$var wire 1 -X VNB $end
-$var wire 1 .X VPB $end
-$var wire 1 /X VPWR $end
-$var wire 1 2" Y $end
-$var wire 1 # S $end
-$var wire 1 T A0 $end
-$scope module base $end
-$var wire 1 +X A1 $end
-$var wire 1 2" Y $end
-$var wire 1 0X mux_2to1_n0_out_Y $end
-$var wire 1 # S $end
-$var wire 1 T A0 $end
-$upscope $end
-$upscope $end
-$scope module _341_ $end
-$var wire 1 1X VGND $end
-$var wire 1 2X VNB $end
-$var wire 1 3X VPB $end
-$var wire 1 4X VPWR $end
-$var wire 1 1" Y $end
-$var wire 1 8 B $end
-$var wire 1 D A $end
-$scope module base $end
-$var wire 1 1" Y $end
-$var wire 1 5X nand0_out_Y $end
-$var wire 1 8 B $end
-$var wire 1 D A $end
-$upscope $end
-$upscope $end
-$scope module _342_ $end
-$var wire 1 2" A2 $end
-$var wire 1 1" B1 $end
-$var wire 1 6X VGND $end
-$var wire 1 7X VNB $end
-$var wire 1 8X VPB $end
-$var wire 1 9X VPWR $end
-$var wire 1 L# Y $end
-$var wire 1 8 A1 $end
-$scope module base $end
-$var wire 1 2" A2 $end
-$var wire 1 1" B1 $end
-$var wire 1 L# Y $end
-$var wire 1 :X nand0_out_Y $end
-$var wire 1 ;X or0_out $end
-$var wire 1 8 A1 $end
-$upscope $end
-$upscope $end
-$scope module _343_ $end
-$var wire 1 X VNB $end
-$var wire 1 ?X VPB $end
-$var wire 1 @X VPWR $end
-$var wire 1 0" Y $end
-$var wire 1 # A $end
-$scope module base $end
-$var wire 1 Y B2 $end
-$var wire 1 ?Y VGND $end
-$var wire 1 @Y VNB $end
-$var wire 1 AY VPB $end
-$var wire 1 BY VPWR $end
-$var wire 1 %" Y $end
-$var wire 1 @ A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 >Y B2 $end
-$var wire 1 %" Y $end
-$var wire 1 CY and0_out_Y $end
-$var wire 1 DY nand0_out $end
-$var wire 1 EY nand1_out $end
-$var wire 1 @ A1 $end
-$upscope $end
-$upscope $end
-$scope module _362_ $end
-$var wire 1 *# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 &" B1 $end
-$var wire 1 %" B2 $end
-$var wire 1 FY VGND $end
-$var wire 1 GY VNB $end
-$var wire 1 HY VPB $end
-$var wire 1 IY VPWR $end
-$var wire 1 G# Y $end
-$scope module base $end
-$var wire 1 *# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 &" B1 $end
-$var wire 1 %" B2 $end
-$var wire 1 G# Y $end
-$var wire 1 JY and0_out_Y $end
-$var wire 1 KY nand0_out $end
-$var wire 1 LY nand1_out $end
-$upscope $end
-$upscope $end
-$scope module _363_ $end
-$var wire 1 MY A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 NY VGND $end
-$var wire 1 OY VNB $end
-$var wire 1 PY VPB $end
-$var wire 1 QY VPWR $end
-$var wire 1 $" Y $end
-$scope module base $end
-$var wire 1 MY A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 $" Y $end
-$var wire 1 RY nand0_out_Y $end
-$var wire 1 SY or0_out $end
-$upscope $end
-$upscope $end
-$scope module _364_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 TY B2 $end
-$var wire 1 UY VGND $end
-$var wire 1 VY VNB $end
-$var wire 1 WY VPB $end
-$var wire 1 XY VPWR $end
-$var wire 1 #" Y $end
-$var wire 1 ? A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 TY B2 $end
-$var wire 1 #" Y $end
-$var wire 1 YY and0_out_Y $end
-$var wire 1 ZY nand0_out $end
-$var wire 1 [Y nand1_out $end
-$var wire 1 ? A1 $end
-$upscope $end
-$upscope $end
-$scope module _365_ $end
-$var wire 1 +# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 $" B1 $end
-$var wire 1 #" B2 $end
-$var wire 1 \Y VGND $end
-$var wire 1 ]Y VNB $end
-$var wire 1 ^Y VPB $end
-$var wire 1 _Y VPWR $end
-$var wire 1 F# Y $end
-$scope module base $end
-$var wire 1 +# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 $" B1 $end
-$var wire 1 #" B2 $end
-$var wire 1 F# Y $end
-$var wire 1 `Y and0_out_Y $end
-$var wire 1 aY nand0_out $end
-$var wire 1 bY nand1_out $end
-$upscope $end
-$upscope $end
-$scope module _366_ $end
-$var wire 1 K" B $end
-$var wire 1 cY VGND $end
-$var wire 1 dY VNB $end
-$var wire 1 eY VPB $end
-$var wire 1 fY VPWR $end
-$var wire 1 "" Y $end
-$var wire 1 > A $end
-$scope module base $end
-$var wire 1 K" B $end
-$var wire 1 "" Y $end
-$var wire 1 gY nand0_out_Y $end
-$var wire 1 > A $end
-$upscope $end
-$upscope $end
-$scope module _367_ $end
-$var wire 1 hY A1 $end
-$var wire 1 iY B1 $end
-$var wire 1 +" B2 $end
-$var wire 1 S" C1 $end
-$var wire 1 jY VGND $end
-$var wire 1 kY VNB $end
-$var wire 1 lY VPB $end
-$var wire 1 mY VPWR $end
-$var wire 1 !" Y $end
-$var wire 1 # A2 $end
-$scope module base $end
-$var wire 1 hY A1 $end
-$var wire 1 iY B1 $end
-$var wire 1 +" B2 $end
-$var wire 1 S" C1 $end
-$var wire 1 !" Y $end
-$var wire 1 nY and0_out $end
-$var wire 1 oY and1_out $end
-$var wire 1 pY nor0_out_Y $end
-$var wire 1 # A2 $end
-$upscope $end
-$upscope $end
-$scope module _368_ $end
-$var wire 1 ,# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 "" B1 $end
-$var wire 1 !" B2 $end
-$var wire 1 qY VGND $end
-$var wire 1 rY VNB $end
-$var wire 1 sY VPB $end
-$var wire 1 tY VPWR $end
-$var wire 1 E# Y $end
-$scope module base $end
-$var wire 1 ,# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 "" B1 $end
-$var wire 1 !" B2 $end
-$var wire 1 E# Y $end
-$var wire 1 uY and0_out_Y $end
-$var wire 1 vY nand0_out $end
-$var wire 1 wY nand1_out $end
-$upscope $end
-$upscope $end
-$scope module _369_ $end
-$var wire 1 xY A $end
-$var wire 1 +" B $end
-$var wire 1 yY VGND $end
-$var wire 1 zY VNB $end
-$var wire 1 {Y VPB $end
-$var wire 1 |Y VPWR $end
-$var wire 1 ~ Y $end
-$scope module base $end
-$var wire 1 xY A $end
-$var wire 1 +" B $end
-$var wire 1 ~ Y $end
-$var wire 1 }Y nand0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _370_ $end
-$var wire 1 ~Y A1 $end
-$var wire 1 K" B1 $end
-$var wire 1 S" C1 $end
-$var wire 1 !Z VGND $end
-$var wire 1 "Z VNB $end
-$var wire 1 #Z VPB $end
-$var wire 1 $Z VPWR $end
-$var wire 1 } Y $end
-$var wire 1 = B2 $end
-$var wire 1 # A2 $end
-$scope module base $end
-$var wire 1 ~Y A1 $end
-$var wire 1 K" B1 $end
-$var wire 1 S" C1 $end
-$var wire 1 } Y $end
-$var wire 1 %Z and0_out $end
-$var wire 1 &Z and1_out $end
-$var wire 1 'Z nor0_out_Y $end
-$var wire 1 = B2 $end
-$var wire 1 # A2 $end
-$upscope $end
-$upscope $end
-$scope module _371_ $end
-$var wire 1 -# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 ~ B1 $end
-$var wire 1 } B2 $end
-$var wire 1 (Z VGND $end
-$var wire 1 )Z VNB $end
-$var wire 1 *Z VPB $end
-$var wire 1 +Z VPWR $end
-$var wire 1 D# Y $end
-$scope module base $end
-$var wire 1 -# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 ~ B1 $end
-$var wire 1 } B2 $end
-$var wire 1 D# Y $end
-$var wire 1 ,Z and0_out_Y $end
-$var wire 1 -Z nand0_out $end
-$var wire 1 .Z nand1_out $end
-$upscope $end
-$upscope $end
-$scope module _372_ $end
-$var wire 1 /Z A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 0Z VGND $end
-$var wire 1 1Z VNB $end
-$var wire 1 2Z VPB $end
-$var wire 1 3Z VPWR $end
-$var wire 1 | Y $end
-$scope module base $end
-$var wire 1 /Z A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 | Y $end
-$var wire 1 4Z nand0_out_Y $end
-$var wire 1 5Z or0_out $end
-$upscope $end
-$upscope $end
-$scope module _373_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 6Z B2 $end
-$var wire 1 7Z VGND $end
-$var wire 1 8Z VNB $end
-$var wire 1 9Z VPB $end
-$var wire 1 :Z VPWR $end
-$var wire 1 { Y $end
-$var wire 1 < A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 6Z B2 $end
-$var wire 1 { Y $end
-$var wire 1 ;Z and0_out_Y $end
-$var wire 1 Z VGND $end
-$var wire 1 ?Z VNB $end
-$var wire 1 @Z VPB $end
-$var wire 1 AZ VPWR $end
-$var wire 1 C# Y $end
-$var wire 1 L A1_N $end
-$scope module base $end
-$var wire 1 N" A2_N $end
-$var wire 1 | B1 $end
-$var wire 1 { B2 $end
-$var wire 1 C# Y $end
-$var wire 1 BZ and0_out $end
-$var wire 1 CZ nor0_out $end
-$var wire 1 DZ nor1_out_Y $end
-$var wire 1 L A1_N $end
-$upscope $end
-$upscope $end
-$scope module _375_ $end
-$var wire 1 EZ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 FZ VGND $end
-$var wire 1 GZ VNB $end
-$var wire 1 HZ VPB $end
-$var wire 1 IZ VPWR $end
-$var wire 1 z Y $end
-$scope module base $end
-$var wire 1 EZ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 z Y $end
-$var wire 1 JZ nand0_out_Y $end
-$var wire 1 KZ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _376_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 LZ B2 $end
-$var wire 1 MZ VGND $end
-$var wire 1 NZ VNB $end
-$var wire 1 OZ VPB $end
-$var wire 1 PZ VPWR $end
-$var wire 1 y Y $end
-$var wire 1 ; A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 LZ B2 $end
-$var wire 1 y Y $end
-$var wire 1 QZ and0_out_Y $end
-$var wire 1 RZ nand0_out $end
-$var wire 1 SZ nand1_out $end
-$var wire 1 ; A1 $end
-$upscope $end
-$upscope $end
-$scope module _377_ $end
-$var wire 1 1# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 z B1 $end
-$var wire 1 y B2 $end
-$var wire 1 TZ VGND $end
-$var wire 1 UZ VNB $end
-$var wire 1 VZ VPB $end
-$var wire 1 WZ VPWR $end
-$var wire 1 B# Y $end
-$scope module base $end
-$var wire 1 1# A1 $end
-$var wire 1 S" A2 $end
-$var wire 1 z B1 $end
-$var wire 1 y B2 $end
-$var wire 1 B# Y $end
-$var wire 1 XZ and0_out_Y $end
-$var wire 1 YZ nand0_out $end
-$var wire 1 ZZ nand1_out $end
-$upscope $end
-$upscope $end
-$scope module _378_ $end
-$var wire 1 [Z A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 \Z VGND $end
-$var wire 1 ]Z VNB $end
-$var wire 1 ^Z VPB $end
-$var wire 1 _Z VPWR $end
-$var wire 1 x Y $end
-$scope module base $end
-$var wire 1 [Z A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 x Y $end
-$var wire 1 `Z nand0_out_Y $end
-$var wire 1 aZ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _379_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 bZ B2 $end
-$var wire 1 cZ VGND $end
-$var wire 1 dZ VNB $end
-$var wire 1 eZ VPB $end
-$var wire 1 fZ VPWR $end
-$var wire 1 w Y $end
-$var wire 1 : A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 bZ B2 $end
-$var wire 1 w Y $end
-$var wire 1 gZ and0_out_Y $end
-$var wire 1 hZ nand0_out $end
-$var wire 1 iZ nand1_out $end
-$var wire 1 : A1 $end
-$upscope $end
-$upscope $end
-$scope module _380_ $end
-$var wire 1 N" B $end
-$var wire 1 jZ VGND $end
-$var wire 1 kZ VNB $end
-$var wire 1 lZ VPB $end
-$var wire 1 mZ VPWR $end
-$var wire 1 v Y $end
-$var wire 1 J A $end
-$scope module base $end
-$var wire 1 N" B $end
-$var wire 1 v Y $end
-$var wire 1 nZ nor0_out_Y $end
-$var wire 1 J A $end
-$upscope $end
-$upscope $end
-$scope module _381_ $end
-$var wire 1 x A1 $end
-$var wire 1 w A2 $end
-$var wire 1 v B1 $end
-$var wire 1 oZ VGND $end
-$var wire 1 pZ VNB $end
-$var wire 1 qZ VPB $end
-$var wire 1 rZ VPWR $end
-$var wire 1 A# Y $end
-$scope module base $end
-$var wire 1 x A1 $end
-$var wire 1 w A2 $end
-$var wire 1 v B1 $end
-$var wire 1 A# Y $end
-$var wire 1 sZ and0_out $end
-$var wire 1 tZ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _382_ $end
-$var wire 1 uZ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 vZ VGND $end
-$var wire 1 wZ VNB $end
-$var wire 1 xZ VPB $end
-$var wire 1 yZ VPWR $end
-$var wire 1 u Y $end
-$scope module base $end
-$var wire 1 uZ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 u Y $end
-$var wire 1 zZ nand0_out_Y $end
-$var wire 1 {Z or0_out $end
-$upscope $end
-$upscope $end
-$scope module _383_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 |Z B2 $end
-$var wire 1 }Z VGND $end
-$var wire 1 ~Z VNB $end
-$var wire 1 ![ VPB $end
-$var wire 1 "[ VPWR $end
-$var wire 1 t Y $end
-$var wire 1 9 A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 |Z B2 $end
-$var wire 1 t Y $end
-$var wire 1 #[ and0_out_Y $end
-$var wire 1 $[ nand0_out $end
-$var wire 1 %[ nand1_out $end
-$var wire 1 9 A1 $end
-$upscope $end
-$upscope $end
-$scope module _384_ $end
-$var wire 1 N" B $end
-$var wire 1 &[ VGND $end
-$var wire 1 '[ VNB $end
-$var wire 1 ([ VPB $end
-$var wire 1 )[ VPWR $end
-$var wire 1 s Y $end
-$var wire 1 I A $end
-$scope module base $end
-$var wire 1 N" B $end
-$var wire 1 s Y $end
-$var wire 1 *[ nor0_out_Y $end
-$var wire 1 I A $end
-$upscope $end
-$upscope $end
-$scope module _385_ $end
-$var wire 1 u A1 $end
-$var wire 1 t A2 $end
-$var wire 1 s B1 $end
-$var wire 1 +[ VGND $end
-$var wire 1 ,[ VNB $end
-$var wire 1 -[ VPB $end
-$var wire 1 .[ VPWR $end
-$var wire 1 @# Y $end
-$scope module base $end
-$var wire 1 u A1 $end
-$var wire 1 t A2 $end
-$var wire 1 s B1 $end
-$var wire 1 @# Y $end
-$var wire 1 /[ and0_out $end
-$var wire 1 0[ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _386_ $end
-$var wire 1 K" B $end
-$var wire 1 1[ VGND $end
-$var wire 1 2[ VNB $end
-$var wire 1 3[ VPB $end
-$var wire 1 4[ VPWR $end
-$var wire 1 r Y $end
-$var wire 1 G A $end
-$scope module base $end
-$var wire 1 K" B $end
-$var wire 1 r Y $end
-$var wire 1 5[ nand0_out_Y $end
-$var wire 1 G A $end
-$upscope $end
-$upscope $end
-$scope module _387_ $end
-$var wire 1 6[ A1 $end
-$var wire 1 7[ B1 $end
-$var wire 1 +" B2 $end
-$var wire 1 S" C1 $end
-$var wire 1 8[ VGND $end
-$var wire 1 9[ VNB $end
-$var wire 1 :[ VPB $end
-$var wire 1 ;[ VPWR $end
-$var wire 1 q Y $end
-$var wire 1 # A2 $end
-$scope module base $end
-$var wire 1 6[ A1 $end
-$var wire 1 7[ B1 $end
-$var wire 1 +" B2 $end
-$var wire 1 S" C1 $end
-$var wire 1 q Y $end
-$var wire 1 <[ and0_out $end
-$var wire 1 =[ and1_out $end
-$var wire 1 >[ nor0_out_Y $end
-$var wire 1 # A2 $end
-$upscope $end
-$upscope $end
-$scope module _388_ $end
-$var wire 1 N" B $end
-$var wire 1 ?[ VGND $end
-$var wire 1 @[ VNB $end
-$var wire 1 A[ VPB $end
-$var wire 1 B[ VPWR $end
-$var wire 1 p Y $end
-$var wire 1 W A $end
-$scope module base $end
-$var wire 1 N" B $end
-$var wire 1 p Y $end
-$var wire 1 C[ nor0_out_Y $end
-$var wire 1 W A $end
-$upscope $end
-$upscope $end
-$scope module _389_ $end
-$var wire 1 r A1 $end
-$var wire 1 q A2 $end
-$var wire 1 p B1 $end
-$var wire 1 D[ VGND $end
-$var wire 1 E[ VNB $end
-$var wire 1 F[ VPB $end
-$var wire 1 G[ VPWR $end
-$var wire 1 ?# Y $end
-$scope module base $end
-$var wire 1 r A1 $end
-$var wire 1 q A2 $end
-$var wire 1 p B1 $end
-$var wire 1 ?# Y $end
-$var wire 1 H[ and0_out $end
-$var wire 1 I[ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _390_ $end
-$var wire 1 J[ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 K[ VGND $end
-$var wire 1 L[ VNB $end
-$var wire 1 M[ VPB $end
-$var wire 1 N[ VPWR $end
-$var wire 1 o Y $end
-$scope module base $end
-$var wire 1 J[ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 o Y $end
-$var wire 1 O[ nand0_out_Y $end
-$var wire 1 P[ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _391_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 Q[ B2 $end
-$var wire 1 R[ VGND $end
-$var wire 1 S[ VNB $end
-$var wire 1 T[ VPB $end
-$var wire 1 U[ VPWR $end
-$var wire 1 n Y $end
-$var wire 1 F A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 Q[ B2 $end
-$var wire 1 n Y $end
-$var wire 1 V[ and0_out_Y $end
-$var wire 1 W[ nand0_out $end
-$var wire 1 X[ nand1_out $end
-$var wire 1 F A1 $end
-$upscope $end
-$upscope $end
-$scope module _392_ $end
-$var wire 1 N" B $end
-$var wire 1 Y[ VGND $end
-$var wire 1 Z[ VNB $end
-$var wire 1 [[ VPB $end
-$var wire 1 \[ VPWR $end
-$var wire 1 m Y $end
-$var wire 1 V A $end
-$scope module base $end
-$var wire 1 N" B $end
-$var wire 1 m Y $end
-$var wire 1 ][ nor0_out_Y $end
-$var wire 1 V A $end
-$upscope $end
-$upscope $end
-$scope module _393_ $end
-$var wire 1 o A1 $end
-$var wire 1 n A2 $end
-$var wire 1 m B1 $end
-$var wire 1 ^[ VGND $end
-$var wire 1 _[ VNB $end
-$var wire 1 `[ VPB $end
-$var wire 1 a[ VPWR $end
-$var wire 1 ># Y $end
-$scope module base $end
-$var wire 1 o A1 $end
-$var wire 1 n A2 $end
-$var wire 1 m B1 $end
-$var wire 1 ># Y $end
-$var wire 1 b[ and0_out $end
-$var wire 1 c[ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _394_ $end
-$var wire 1 d[ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 e[ VGND $end
-$var wire 1 f[ VNB $end
-$var wire 1 g[ VPB $end
-$var wire 1 h[ VPWR $end
-$var wire 1 l Y $end
-$scope module base $end
-$var wire 1 d[ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 l Y $end
-$var wire 1 i[ nand0_out_Y $end
-$var wire 1 j[ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _395_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 k[ B2 $end
-$var wire 1 l[ VGND $end
-$var wire 1 m[ VNB $end
-$var wire 1 n[ VPB $end
-$var wire 1 o[ VPWR $end
-$var wire 1 k Y $end
-$var wire 1 E A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 k[ B2 $end
-$var wire 1 k Y $end
-$var wire 1 p[ and0_out_Y $end
-$var wire 1 q[ nand0_out $end
-$var wire 1 r[ nand1_out $end
-$var wire 1 E A1 $end
-$upscope $end
-$upscope $end
-$scope module _396_ $end
-$var wire 1 N" B $end
-$var wire 1 s[ VGND $end
-$var wire 1 t[ VNB $end
-$var wire 1 u[ VPB $end
-$var wire 1 v[ VPWR $end
-$var wire 1 j Y $end
-$var wire 1 U A $end
-$scope module base $end
-$var wire 1 N" B $end
-$var wire 1 j Y $end
-$var wire 1 w[ nor0_out_Y $end
-$var wire 1 U A $end
-$upscope $end
-$upscope $end
-$scope module _397_ $end
-$var wire 1 l A1 $end
-$var wire 1 k A2 $end
-$var wire 1 j B1 $end
-$var wire 1 x[ VGND $end
-$var wire 1 y[ VNB $end
-$var wire 1 z[ VPB $end
-$var wire 1 {[ VPWR $end
-$var wire 1 =# Y $end
-$scope module base $end
-$var wire 1 l A1 $end
-$var wire 1 k A2 $end
-$var wire 1 j B1 $end
-$var wire 1 =# Y $end
-$var wire 1 |[ and0_out $end
-$var wire 1 }[ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _398_ $end
-$var wire 1 ~[ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 !\ VGND $end
-$var wire 1 "\ VNB $end
-$var wire 1 #\ VPB $end
-$var wire 1 $\ VPWR $end
-$var wire 1 i Y $end
-$scope module base $end
-$var wire 1 ~[ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 i Y $end
-$var wire 1 %\ nand0_out_Y $end
-$var wire 1 &\ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _399_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 '\ B2 $end
-$var wire 1 (\ VGND $end
-$var wire 1 )\ VNB $end
-$var wire 1 *\ VPB $end
-$var wire 1 +\ VPWR $end
-$var wire 1 h Y $end
-$var wire 1 D A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 '\ B2 $end
-$var wire 1 h Y $end
-$var wire 1 ,\ and0_out_Y $end
-$var wire 1 -\ nand0_out $end
-$var wire 1 .\ nand1_out $end
-$var wire 1 D A1 $end
-$upscope $end
-$upscope $end
-$scope module _400_ $end
-$var wire 1 N" B $end
-$var wire 1 /\ VGND $end
-$var wire 1 0\ VNB $end
-$var wire 1 1\ VPB $end
-$var wire 1 2\ VPWR $end
-$var wire 1 g Y $end
-$var wire 1 T A $end
-$scope module base $end
-$var wire 1 N" B $end
-$var wire 1 g Y $end
-$var wire 1 3\ nor0_out_Y $end
-$var wire 1 T A $end
-$upscope $end
-$upscope $end
-$scope module _401_ $end
-$var wire 1 i A1 $end
-$var wire 1 h A2 $end
-$var wire 1 g B1 $end
-$var wire 1 4\ VGND $end
-$var wire 1 5\ VNB $end
-$var wire 1 6\ VPB $end
-$var wire 1 7\ VPWR $end
-$var wire 1 <# Y $end
-$scope module base $end
-$var wire 1 i A1 $end
-$var wire 1 h A2 $end
-$var wire 1 g B1 $end
-$var wire 1 <# Y $end
-$var wire 1 8\ and0_out $end
-$var wire 1 9\ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _402_ $end
-$var wire 1 :\ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 ;\ VGND $end
-$var wire 1 <\ VNB $end
-$var wire 1 =\ VPB $end
-$var wire 1 >\ VPWR $end
-$var wire 1 f Y $end
-$scope module base $end
-$var wire 1 :\ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 f Y $end
-$var wire 1 ?\ nand0_out_Y $end
-$var wire 1 @\ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _403_ $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 A\ B2 $end
-$var wire 1 B\ VGND $end
-$var wire 1 C\ VNB $end
-$var wire 1 D\ VPB $end
-$var wire 1 E\ VPWR $end
-$var wire 1 e Y $end
-$var wire 1 C A1 $end
-$scope module base $end
-$var wire 1 K" A2 $end
-$var wire 1 +" B1 $end
-$var wire 1 A\ B2 $end
-$var wire 1 e Y $end
-$var wire 1 F\ and0_out_Y $end
-$var wire 1 G\ nand0_out $end
-$var wire 1 H\ nand1_out $end
-$var wire 1 C A1 $end
-$upscope $end
-$upscope $end
-$scope module _404_ $end
-$var wire 1 N" B $end
-$var wire 1 I\ VGND $end
-$var wire 1 J\ VNB $end
-$var wire 1 K\ VPB $end
-$var wire 1 L\ VPWR $end
-$var wire 1 d Y $end
-$var wire 1 S A $end
-$scope module base $end
-$var wire 1 N" B $end
-$var wire 1 d Y $end
-$var wire 1 M\ nor0_out_Y $end
-$var wire 1 S A $end
-$upscope $end
-$upscope $end
-$scope module _405_ $end
-$var wire 1 f A1 $end
-$var wire 1 e A2 $end
-$var wire 1 d B1 $end
-$var wire 1 N\ VGND $end
-$var wire 1 O\ VNB $end
-$var wire 1 P\ VPB $end
-$var wire 1 Q\ VPWR $end
-$var wire 1 ;# Y $end
-$scope module base $end
-$var wire 1 f A1 $end
-$var wire 1 e A2 $end
-$var wire 1 d B1 $end
-$var wire 1 ;# Y $end
-$var wire 1 R\ and0_out $end
-$var wire 1 S\ nor0_out_Y $end
-$upscope $end
-$upscope $end
-$scope module _406_ $end
-$var wire 1 K" B $end
-$var wire 1 T\ VGND $end
-$var wire 1 U\ VNB $end
-$var wire 1 V\ VPB $end
-$var wire 1 W\ VPWR $end
-$var wire 1 c Y $end
-$var wire 1 B A $end
-$scope module base $end
-$var wire 1 K" B $end
-$var wire 1 c Y $end
-$var wire 1 X\ nand0_out_Y $end
-$var wire 1 B A $end
-$upscope $end
-$upscope $end
-$scope module _407_ $end
-$var wire 1 Y\ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 Z\ VGND $end
-$var wire 1 [\ VNB $end
-$var wire 1 \\ VPB $end
-$var wire 1 ]\ VPWR $end
-$var wire 1 b Y $end
-$scope module base $end
-$var wire 1 Y\ A1 $end
-$var wire 1 R" A2 $end
-$var wire 1 L" B1 $end
-$var wire 1 b Y $end
-$var wire 1 ^\ nand0_out_Y $end
-$var wire 1 _\ or0_out $end
-$upscope $end
-$upscope $end
-$scope module _408_ $end
-$var wire 1 `\ VGND $end
-$var wire 1 a\ VNB $end
-$var wire 1 b\ VPB $end
-$var wire 1 c\ VPWR $end
-$var wire 1 a Y $end
-$var wire 1 R A $end
-$scope module base $end
-$var wire 1 a Y $end
-$var wire 1 d\ not0_out_Y $end
-$var wire 1 R A $end
-$upscope $end
-$upscope $end
-$scope module _409_ $end
-$var wire 1 a B $end
-$var wire 1 r" C $end
-$var wire 1 L" D $end
-$var wire 1 e\ VGND $end
-$var wire 1 f\ VNB $end
-$var wire 1 g\ VPB $end
-$var wire 1 h\ VPWR $end
-$var wire 1 ` X $end
-$var wire 1 B A $end
-$scope module base $end
-$var wire 1 a B $end
-$var wire 1 r" C $end
-$var wire 1 L" D $end
-$var wire 1 ` X $end
-$var wire 1 i\ or0_out_X $end
-$var wire 1 B A $end
-$upscope $end
-$upscope $end
-$scope module _410_ $end
-$var wire 1 c A1 $end
-$var wire 1 b A2 $end
-$var wire 1 ` A3 $end
-$var wire 1 S" B1 $end
-$var wire 1 a B2 $end
-$var wire 1 j\ VGND $end
-$var wire 1 k\ VNB $end
-$var wire 1 l\ VPB $end
-$var wire 1 m\ VPWR $end
-$var wire 1 :# Y $end
-$scope module base $end
-$var wire 1 c A1 $end
-$var wire 1 b A2 $end
-$var wire 1 ` A3 $end
-$var wire 1 S" B1 $end
-$var wire 1 a B2 $end
-$var wire 1 :# Y $end
-$var wire 1 n\ and0_out_Y $end
-$var wire 1 o\ nand0_out $end
-$var wire 1 p\ nand1_out $end
-$upscope $end
-$upscope $end
-$scope module _411_ $end
-$var wire 1 \# D $end
-$var wire 1 q\ VGND $end
-$var wire 1 r\ VNB $end
-$var wire 1 s\ VPB $end
-$var wire 1 t\ VPWR $end
-$var wire 1 # Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 \# D $end
-$var wire 1 # Q $end
-$var wire 1 u\ buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _412_ $end
-$var wire 1 [# D $end
-$var wire 1 v\ VGND $end
-$var wire 1 w\ VNB $end
-$var wire 1 x\ VPB $end
-$var wire 1 y\ VPWR $end
-$var wire 1 Z Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 [# D $end
-$var wire 1 Z Q $end
-$var wire 1 z\ buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _413_ $end
-$var wire 1 Z# D $end
-$var wire 1 {\ VGND $end
-$var wire 1 |\ VNB $end
-$var wire 1 }\ VPB $end
-$var wire 1 ~\ VPWR $end
-$var wire 1 Y Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 Z# D $end
-$var wire 1 Y Q $end
-$var wire 1 !] buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _414_ $end
-$var wire 1 Y# D $end
-$var wire 1 "] VGND $end
-$var wire 1 #] VNB $end
-$var wire 1 $] VPB $end
-$var wire 1 %] VPWR $end
-$var wire 1 H Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 Y# D $end
-$var wire 1 H Q $end
-$var wire 1 &] buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _415_ $end
-$var wire 1 X# D $end
-$var wire 1 '] VGND $end
-$var wire 1 (] VNB $end
-$var wire 1 )] VPB $end
-$var wire 1 *] VPWR $end
-$var wire 1 A Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 X# D $end
-$var wire 1 A Q $end
-$var wire 1 +] buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _416_ $end
-$var wire 1 W# D $end
-$var wire 1 ,] VGND $end
-$var wire 1 -] VNB $end
-$var wire 1 .] VPB $end
-$var wire 1 /] VPWR $end
-$var wire 1 @ Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 W# D $end
-$var wire 1 @ Q $end
-$var wire 1 0] buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _417_ $end
-$var wire 1 V# D $end
-$var wire 1 1] VGND $end
-$var wire 1 2] VNB $end
-$var wire 1 3] VPB $end
-$var wire 1 4] VPWR $end
-$var wire 1 ? Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 V# D $end
-$var wire 1 ? Q $end
-$var wire 1 5] buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _418_ $end
-$var wire 1 U# D $end
-$var wire 1 6] VGND $end
-$var wire 1 7] VNB $end
-$var wire 1 8] VPB $end
-$var wire 1 9] VPWR $end
-$var wire 1 > Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 U# D $end
-$var wire 1 > Q $end
-$var wire 1 :] buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _419_ $end
-$var wire 1 T# D $end
-$var wire 1 ;] VGND $end
-$var wire 1 <] VNB $end
-$var wire 1 =] VPB $end
-$var wire 1 >] VPWR $end
-$var wire 1 = Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 T# D $end
-$var wire 1 = Q $end
-$var wire 1 ?] buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _420_ $end
-$var wire 1 S# D $end
-$var wire 1 @] VGND $end
-$var wire 1 A] VNB $end
-$var wire 1 B] VPB $end
-$var wire 1 C] VPWR $end
-$var wire 1 < Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 S# D $end
-$var wire 1 < Q $end
-$var wire 1 D] buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _421_ $end
-$var wire 1 R# D $end
-$var wire 1 E] VGND $end
-$var wire 1 F] VNB $end
-$var wire 1 G] VPB $end
-$var wire 1 H] VPWR $end
-$var wire 1 ; Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 R# D $end
-$var wire 1 ; Q $end
-$var wire 1 I] buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _422_ $end
-$var wire 1 Q# D $end
-$var wire 1 J] VGND $end
-$var wire 1 K] VNB $end
-$var wire 1 L] VPB $end
-$var wire 1 M] VPWR $end
-$var wire 1 : Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 Q# D $end
-$var wire 1 : Q $end
-$var wire 1 N] buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _423_ $end
-$var wire 1 P# D $end
-$var wire 1 O] VGND $end
-$var wire 1 P] VNB $end
-$var wire 1 Q] VPB $end
-$var wire 1 R] VPWR $end
-$var wire 1 9 Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 P# D $end
-$var wire 1 9 Q $end
-$var wire 1 S] buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _424_ $end
-$var wire 1 O# D $end
-$var wire 1 T] VGND $end
-$var wire 1 U] VNB $end
-$var wire 1 V] VPB $end
-$var wire 1 W] VPWR $end
-$var wire 1 G Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 O# D $end
-$var wire 1 G Q $end
-$var wire 1 X] buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _425_ $end
-$var wire 1 N# D $end
-$var wire 1 Y] VGND $end
-$var wire 1 Z] VNB $end
-$var wire 1 [] VPB $end
-$var wire 1 \] VPWR $end
-$var wire 1 F Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 N# D $end
-$var wire 1 F Q $end
-$var wire 1 ]] buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _426_ $end
-$var wire 1 M# D $end
-$var wire 1 ^] VGND $end
-$var wire 1 _] VNB $end
-$var wire 1 `] VPB $end
-$var wire 1 a] VPWR $end
-$var wire 1 E Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 M# D $end
-$var wire 1 E Q $end
-$var wire 1 b] buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _427_ $end
-$var wire 1 L# D $end
-$var wire 1 c] VGND $end
-$var wire 1 d] VNB $end
-$var wire 1 e] VPB $end
-$var wire 1 f] VPWR $end
-$var wire 1 D Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 L# D $end
-$var wire 1 D Q $end
-$var wire 1 g] buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _428_ $end
-$var wire 1 K# D $end
-$var wire 1 h] VGND $end
-$var wire 1 i] VNB $end
-$var wire 1 j] VPB $end
-$var wire 1 k] VPWR $end
-$var wire 1 C Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 K# D $end
-$var wire 1 C Q $end
-$var wire 1 l] buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _429_ $end
-$var wire 1 J# D $end
-$var wire 1 m] VGND $end
-$var wire 1 n] VNB $end
-$var wire 1 o] VPB $end
-$var wire 1 p] VPWR $end
-$var wire 1 B Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 J# D $end
-$var wire 1 B Q $end
-$var wire 1 q] buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _430_ $end
-$var wire 1 I# D $end
-$var wire 1 r] VGND $end
-$var wire 1 s] VNB $end
-$var wire 1 t] VPB $end
-$var wire 1 u] VPWR $end
-$var wire 1 X Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 I# D $end
-$var wire 1 X Q $end
-$var wire 1 v] buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _431_ $end
-$var wire 1 H# D $end
-$var wire 1 w] VGND $end
-$var wire 1 x] VNB $end
-$var wire 1 y] VPB $end
-$var wire 1 z] VPWR $end
-$var wire 1 Q Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 H# D $end
-$var wire 1 Q Q $end
-$var wire 1 {] buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _432_ $end
-$var wire 1 G# D $end
-$var wire 1 |] VGND $end
-$var wire 1 }] VNB $end
-$var wire 1 ~] VPB $end
-$var wire 1 !^ VPWR $end
-$var wire 1 P Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 G# D $end
-$var wire 1 P Q $end
-$var wire 1 "^ buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _433_ $end
-$var wire 1 F# D $end
-$var wire 1 #^ VGND $end
-$var wire 1 $^ VNB $end
-$var wire 1 %^ VPB $end
-$var wire 1 &^ VPWR $end
-$var wire 1 O Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 F# D $end
-$var wire 1 O Q $end
-$var wire 1 '^ buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _434_ $end
-$var wire 1 E# D $end
-$var wire 1 (^ VGND $end
-$var wire 1 )^ VNB $end
-$var wire 1 *^ VPB $end
-$var wire 1 +^ VPWR $end
-$var wire 1 N Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 E# D $end
-$var wire 1 N Q $end
-$var wire 1 ,^ buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _435_ $end
-$var wire 1 D# D $end
-$var wire 1 -^ VGND $end
-$var wire 1 .^ VNB $end
-$var wire 1 /^ VPB $end
-$var wire 1 0^ VPWR $end
-$var wire 1 M Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 D# D $end
-$var wire 1 M Q $end
-$var wire 1 1^ buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _436_ $end
-$var wire 1 C# D $end
-$var wire 1 2^ VGND $end
-$var wire 1 3^ VNB $end
-$var wire 1 4^ VPB $end
-$var wire 1 5^ VPWR $end
-$var wire 1 L Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 C# D $end
-$var wire 1 L Q $end
-$var wire 1 6^ buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _437_ $end
-$var wire 1 B# D $end
-$var wire 1 7^ VGND $end
-$var wire 1 8^ VNB $end
-$var wire 1 9^ VPB $end
-$var wire 1 :^ VPWR $end
-$var wire 1 K Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 B# D $end
-$var wire 1 K Q $end
-$var wire 1 ;^ buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _438_ $end
-$var wire 1 A# D $end
-$var wire 1 <^ VGND $end
-$var wire 1 =^ VNB $end
-$var wire 1 >^ VPB $end
-$var wire 1 ?^ VPWR $end
-$var wire 1 J Q $end
-$var wire 1 ] CLK $end
-$scope module base $end
-$var wire 1 A# D $end
-$var wire 1 J Q $end
-$var wire 1 @^ buf_Q $end
-$var wire 1 ] CLK $end
-$upscope $end
-$upscope $end
-$scope module _439_ $end
-$var wire 1 @# D $end
-$var wire 1 A^ VGND $end
-$var wire 1 B^ VNB $end
-$var wire 1 C^ VPB $end
-$var wire 1 D^ VPWR $end
-$var wire 1 I Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 @# D $end
-$var wire 1 I Q $end
-$var wire 1 E^ buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _440_ $end
-$var wire 1 ?# D $end
-$var wire 1 F^ VGND $end
-$var wire 1 G^ VNB $end
-$var wire 1 H^ VPB $end
-$var wire 1 I^ VPWR $end
-$var wire 1 W Q $end
-$var wire 1 [ CLK $end
-$scope module base $end
-$var wire 1 ?# D $end
-$var wire 1 W Q $end
-$var wire 1 J^ buf_Q $end
-$var wire 1 [ CLK $end
-$upscope $end
-$upscope $end
-$scope module _441_ $end
-$var wire 1 ># D $end
-$var wire 1 K^ VGND $end
-$var wire 1 L^ VNB $end
-$var wire 1 M^ VPB $end
-$var wire 1 N^ VPWR $end
-$var wire 1 V Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 ># D $end
-$var wire 1 V Q $end
-$var wire 1 O^ buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _442_ $end
-$var wire 1 =# D $end
-$var wire 1 P^ VGND $end
-$var wire 1 Q^ VNB $end
-$var wire 1 R^ VPB $end
-$var wire 1 S^ VPWR $end
-$var wire 1 U Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 =# D $end
-$var wire 1 U Q $end
-$var wire 1 T^ buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _443_ $end
-$var wire 1 <# D $end
-$var wire 1 U^ VGND $end
-$var wire 1 V^ VNB $end
-$var wire 1 W^ VPB $end
-$var wire 1 X^ VPWR $end
-$var wire 1 T Q $end
-$var wire 1 \ CLK $end
-$scope module base $end
-$var wire 1 <# D $end
-$var wire 1 T Q $end
-$var wire 1 Y^ buf_Q $end
-$var wire 1 \ CLK $end
-$upscope $end
-$upscope $end
-$scope module _444_ $end
-$var wire 1 ;# D $end
-$var wire 1 Z^ VGND $end
-$var wire 1 [^ VNB $end
-$var wire 1 \^ VPB $end
-$var wire 1 ]^ VPWR $end
-$var wire 1 S Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 ;# D $end
-$var wire 1 S Q $end
-$var wire 1 ^^ buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module _445_ $end
-$var wire 1 :# D $end
-$var wire 1 _^ VGND $end
-$var wire 1 `^ VNB $end
-$var wire 1 a^ VPB $end
-$var wire 1 b^ VPWR $end
-$var wire 1 R Q $end
-$var wire 1 ^ CLK $end
-$scope module base $end
-$var wire 1 :# D $end
-$var wire 1 R Q $end
-$var wire 1 c^ buf_Q $end
-$var wire 1 ^ CLK $end
-$upscope $end
-$upscope $end
-$scope module clkbuf_0_clk $end
-$var wire 1 ) A $end
-$var wire 1 d^ VGND $end
-$var wire 1 e^ VNB $end
-$var wire 1 f^ VPB $end
-$var wire 1 g^ VPWR $end
-$var wire 1 _ X $end
-$scope module base $end
-$var wire 1 ) A $end
-$var wire 1 _ X $end
-$var wire 1 h^ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module clkbuf_2_0__f_clk $end
-$var wire 1 _ A $end
-$var wire 1 i^ VGND $end
-$var wire 1 j^ VNB $end
-$var wire 1 k^ VPB $end
-$var wire 1 l^ VPWR $end
-$var wire 1 ^ X $end
-$scope module base $end
-$var wire 1 _ A $end
-$var wire 1 ^ X $end
-$var wire 1 m^ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module clkbuf_2_1__f_clk $end
-$var wire 1 _ A $end
-$var wire 1 n^ VGND $end
-$var wire 1 o^ VNB $end
-$var wire 1 p^ VPB $end
-$var wire 1 q^ VPWR $end
-$var wire 1 ] X $end
-$scope module base $end
-$var wire 1 _ A $end
-$var wire 1 ] X $end
-$var wire 1 r^ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module clkbuf_2_2__f_clk $end
-$var wire 1 _ A $end
-$var wire 1 s^ VGND $end
-$var wire 1 t^ VNB $end
-$var wire 1 u^ VPB $end
-$var wire 1 v^ VPWR $end
-$var wire 1 \ X $end
-$scope module base $end
-$var wire 1 _ A $end
-$var wire 1 \ X $end
-$var wire 1 w^ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module clkbuf_2_3__f_clk $end
-$var wire 1 _ A $end
-$var wire 1 x^ VGND $end
-$var wire 1 y^ VNB $end
-$var wire 1 z^ VPB $end
-$var wire 1 {^ VPWR $end
-$var wire 1 [ X $end
-$scope module base $end
-$var wire 1 _ A $end
-$var wire 1 [ X $end
-$var wire 1 |^ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer10 $end
-$var wire 1 (# A $end
-$var wire 1 }^ VGND $end
-$var wire 1 ~^ VNB $end
-$var wire 1 !_ VPB $end
-$var wire 1 "_ VPWR $end
-$var wire 1 7 X $end
-$scope module base $end
-$var wire 1 (# A $end
-$var wire 1 7 X $end
-$var wire 1 #_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer2 $end
-$var wire 1 x" A $end
-$var wire 1 $_ VGND $end
-$var wire 1 %_ VNB $end
-$var wire 1 &_ VPB $end
-$var wire 1 '_ VPWR $end
-$var wire 1 6 X $end
-$scope module base $end
-$var wire 1 x" A $end
-$var wire 1 6 X $end
-$var wire 1 (_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer3 $end
-$var wire 1 $# A $end
-$var wire 1 )_ VGND $end
-$var wire 1 *_ VNB $end
-$var wire 1 +_ VPB $end
-$var wire 1 ,_ VPWR $end
-$var wire 1 5 X $end
-$scope module base $end
-$var wire 1 $# A $end
-$var wire 1 5 X $end
-$var wire 1 -_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer4 $end
-$var wire 1 {" A $end
-$var wire 1 ._ VGND $end
-$var wire 1 /_ VNB $end
-$var wire 1 0_ VPB $end
-$var wire 1 1_ VPWR $end
-$var wire 1 4 X $end
-$scope module base $end
-$var wire 1 {" A $end
-$var wire 1 4 X $end
-$var wire 1 2_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer5 $end
-$var wire 1 H A $end
-$var wire 1 3_ VGND $end
-$var wire 1 4_ VNB $end
-$var wire 1 5_ VPB $end
-$var wire 1 6_ VPWR $end
-$var wire 1 3 X $end
-$scope module base $end
-$var wire 1 H A $end
-$var wire 1 3 X $end
-$var wire 1 7_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer6 $end
-$var wire 1 '# A $end
-$var wire 1 8_ VGND $end
-$var wire 1 9_ VNB $end
-$var wire 1 :_ VPB $end
-$var wire 1 ;_ VPWR $end
-$var wire 1 2 X $end
-$scope module base $end
-$var wire 1 '# A $end
-$var wire 1 2 X $end
-$var wire 1 <_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer7 $end
-$var wire 1 A $end
-$var wire 1 =_ VGND $end
-$var wire 1 >_ VNB $end
-$var wire 1 ?_ VPB $end
-$var wire 1 @_ VPWR $end
-$var wire 1 1 X $end
-$scope module base $end
-$var wire 1 A $end
-$var wire 1 1 X $end
-$var wire 1 A_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer8 $end
-$var wire 1 H A $end
-$var wire 1 B_ VGND $end
-$var wire 1 C_ VNB $end
-$var wire 1 D_ VPB $end
-$var wire 1 E_ VPWR $end
-$var wire 1 0 X $end
-$scope module base $end
-$var wire 1 H A $end
-$var wire 1 0 X $end
-$var wire 1 F_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module rebuffer9 $end
-$var wire 1 0 A $end
-$var wire 1 G_ VGND $end
-$var wire 1 H_ VNB $end
-$var wire 1 I_ VPB $end
-$var wire 1 J_ VPWR $end
-$var wire 1 / X $end
-$scope module base $end
-$var wire 1 0 A $end
-$var wire 1 / X $end
-$var wire 1 K_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$scope module split1 $end
-$var wire 1 M" A $end
-$var wire 1 L_ VGND $end
-$var wire 1 M_ VNB $end
-$var wire 1 N_ VPB $end
-$var wire 1 O_ VPWR $end
-$var wire 1 8 X $end
-$scope module base $end
-$var wire 1 M" A $end
-$var wire 1 8 X $end
-$var wire 1 P_ buf0_out_X $end
-$upscope $end
-$upscope $end
-$upscope $end
-$upscope $end
-$enddefinitions $end
-$comment Show the parameter values. $end
-$dumpall
-r2.5 &
-r5 %
-$end
-#0
-$dumpvars
-xP_
-1O_
-1N_
-0M_
-0L_
-xK_
-1J_
-1I_
-0H_
-0G_
-xF_
-1E_
-1D_
-0C_
-0B_
-xA_
-1@_
-1?_
-0>_
-0=_
-x<_
-1;_
-1:_
-09_
-08_
-x7_
-16_
-15_
-04_
-03_
-x2_
-11_
-10_
-0/_
-0._
-x-_
-1,_
-1+_
-0*_
-0)_
-x(_
-1'_
-1&_
-0%_
-0$_
-x#_
-1"_
-1!_
-0~^
-0}^
-0|^
-1{^
-1z^
-0y^
-0x^
-0w^
-1v^
-1u^
-0t^
-0s^
-0r^
-1q^
-1p^
-0o^
-0n^
-0m^
-1l^
-1k^
-0j^
-0i^
-0h^
-1g^
-1f^
-0e^
-0d^
-xc^
-1b^
-1a^
-0`^
-0_^
-x^^
-1]^
-1\^
-0[^
-0Z^
-xY^
-1X^
-1W^
-0V^
-0U^
-xT^
-1S^
-1R^
-0Q^
-0P^
-xO^
-1N^
-1M^
-0L^
-0K^
-xJ^
-1I^
-1H^
-0G^
-0F^
-xE^
-1D^
-1C^
-0B^
-0A^
-x@^
-1?^
-1>^
-0=^
-0<^
-x;^
-1:^
-19^
-08^
-07^
-x6^
-15^
-14^
-03^
-02^
-x1^
-10^
-1/^
-0.^
-0-^
-x,^
-1+^
-1*^
-0)^
-0(^
-x'^
-1&^
-1%^
-0$^
-0#^
-x"^
-1!^
-1~]
-0}]
-0|]
-x{]
-1z]
-1y]
-0x]
-0w]
-xv]
-1u]
-1t]
-0s]
-0r]
-xq]
-1p]
-1o]
-0n]
-0m]
-xl]
-1k]
-1j]
-0i]
-0h]
-xg]
-1f]
-1e]
-0d]
-0c]
-xb]
-1a]
-1`]
-0_]
-0^]
-x]]
-1\]
-1[]
-0Z]
-0Y]
-xX]
-1W]
-1V]
-0U]
-0T]
-xS]
-1R]
-1Q]
-0P]
-0O]
-xN]
-1M]
-1L]
-0K]
-0J]
-xI]
-1H]
-1G]
-0F]
-0E]
-xD]
-1C]
-1B]
-0A]
-0@]
-x?]
-1>]
-1=]
-0<]
-0;]
-x:]
-19]
-18]
-07]
-06]
-x5]
-14]
-13]
-02]
-01]
-x0]
-1/]
-1.]
-0-]
-0,]
-x+]
-1*]
-1)]
-0(]
-0']
-x&]
-1%]
-1$]
-0#]
-0"]
-x!]
-1~\
-1}\
-0|\
-0{\
-xz\
-1y\
-1x\
-0w\
-0v\
-xu\
-1t\
-1s\
-0r\
-0q\
-xp\
-xo\
-xn\
-1m\
-1l\
-0k\
-0j\
-xi\
-1h\
-1g\
-0f\
-0e\
-xd\
-1c\
-1b\
-0a\
-0`\
-x_\
-x^\
-1]\
-1\\
-0[\
-0Z\
-0Y\
-xX\
-1W\
-1V\
-0U\
-0T\
-xS\
-xR\
-1Q\
-1P\
-0O\
-0N\
-xM\
-1L\
-1K\
-0J\
-0I\
-xH\
-xG\
-xF\
-1E\
-1D\
-0C\
-0B\
-xA\
-x@\
-x?\
-1>\
-1=\
-0<\
-0;\
-0:\
-x9\
-x8\
-17\
-16\
-05\
-04\
-x3\
-12\
-11\
-00\
-0/\
-x.\
-x-\
-x,\
-1+\
-1*\
-0)\
-0(\
-x'\
-x&\
-x%\
-1$\
-1#\
-0"\
-0!\
-0~[
-x}[
-x|[
-1{[
-1z[
-0y[
-0x[
-xw[
-1v[
-1u[
-0t[
-0s[
-xr[
-xq[
-xp[
-1o[
-1n[
-0m[
-0l[
-xk[
-xj[
-xi[
-1h[
-1g[
-0f[
-0e[
-0d[
-xc[
-xb[
-1a[
-1`[
-0_[
-0^[
-x][
-1\[
-1[[
-0Z[
-0Y[
-xX[
-xW[
-xV[
-1U[
-1T[
-0S[
-0R[
-xQ[
-xP[
-xO[
-1N[
-1M[
-0L[
-0K[
-0J[
-xI[
-xH[
-1G[
-1F[
-0E[
-0D[
-xC[
-1B[
-1A[
-0@[
-0?[
-x>[
-0=[
-x<[
-1;[
-1:[
-09[
-08[
-x7[
-06[
-x5[
-14[
-13[
-02[
-01[
-x0[
-x/[
-1.[
-1-[
-0,[
-0+[
-x*[
-1)[
-1([
-0'[
-0&[
-x%[
-x$[
-x#[
-1"[
-1![
-0~Z
-0}Z
-x|Z
-x{Z
-xzZ
-1yZ
-1xZ
-0wZ
-0vZ
-0uZ
-xtZ
-xsZ
-1rZ
-1qZ
-0pZ
-0oZ
-xnZ
-1mZ
-1lZ
-0kZ
-0jZ
-xiZ
-xhZ
-xgZ
-1fZ
-1eZ
-0dZ
-0cZ
-xbZ
-xaZ
-x`Z
-1_Z
-1^Z
-0]Z
-0\Z
-0[Z
-xZZ
-xYZ
-xXZ
-1WZ
-1VZ
-0UZ
-0TZ
-xSZ
-xRZ
-xQZ
-1PZ
-1OZ
-0NZ
-0MZ
-xLZ
-xKZ
-xJZ
-1IZ
-1HZ
-0GZ
-0FZ
-0EZ
-xDZ
-xCZ
-xBZ
-1AZ
-1@Z
-0?Z
-0>Z
-x=Z
-xY
-x=Y
-xX
-0=X
-0W
-x=W
-1V
-0=V
-xU
-0=U
-0T
-1=T
-1S
-0=S
-xR
-1=R
-0Q
-x=Q
-xP
-0=P
-xO
-0=O
-1N
-1=N
-0M
-0=M
-1L
-1=L
-0K
-0=K
-1J
-1=J
-0I
-0=I
-1H
-1=H
-0G
-0=G
-1F
-1=F
-0E
-0=E
-1D
-1=D
-0C
-0=C
-1B
-1=B
-0A
-0=A
-1@
-1=@
-0<@
-0;@
-1:@
-19@
-08@
-07@
-16@
-15@
-04@
-03@
-12@
-11@
-00@
-0/@
-1.@
-1-@
-0,@
-0+@
-1*@
-1)@
-0(@
-0'@
-1&@
-1%@
-0$@
-0#@
-1"@
-1!@
-0~?
-0}?
-1|?
-1{?
-0z?
-0y?
-1x?
-1w?
-0v?
-0u?
-1t?
-1s?
-0r?
-0q?
-1p?
-1o?
-0n?
-0m?
-1l?
-1k?
-0j?
-0i?
-1h?
-1g?
-0f?
-0e?
-1d?
-1c?
-0b?
-0a?
-1`?
-1_?
-0^?
-0]?
-1\?
-1[?
-0Z?
-0Y?
-1X?
-1W?
-0V?
-0U?
-1T?
-1S?
-0R?
-0Q?
-1P?
-1O?
-0N?
-0M?
-1L?
-1K?
-0J?
-0I?
-1H?
-1G?
-0F?
-0E?
-1D?
-1C?
-0B?
-0A?
-1@?
-1??
-0>?
-0=?
-1
-1;?
-0:?
-09?
-18?
-17?
-06?
-05?
-14?
-13?
-02?
-01?
-10?
-1/?
-0.?
-0-?
-1,?
-1+?
-0*?
-0)?
-1(?
-1'?
-0&?
-0%?
-1$?
-1#?
-0"?
-0!?
-1~>
-1}>
-0|>
-0{>
-1z>
-1y>
-0x>
-0w>
-1v>
-1u>
-0t>
-0s>
-1r>
-1q>
-0p>
-0o>
-1n>
-1m>
-0l>
-0k>
-1j>
-1i>
-0h>
-0g>
-1f>
-1e>
-0d>
-0c>
-1b>
-1a>
-0`>
-0_>
-1^>
-1]>
-0\>
-0[>
-1Z>
-1Y>
-0X>
-0W>
-1V>
-1U>
-0T>
-0S>
-1R>
-1Q>
-0P>
-0O>
-1N>
-1M>
-0L>
-0K>
-1J>
-1I>
-0H>
-0G>
-1F>
-1E>
-0D>
-0C>
-1B>
-1A>
-0@>
-0?>
-1>>
-1=>
-0<>
-0;>
-1:>
-19>
-08>
-07>
-16>
-15>
-04>
-03>
-12>
-11>
-00>
-0/>
-1.>
-1->
-0,>
-0+>
-1*>
-1)>
-0(>
-0'>
-1&>
-1%>
-0$>
-0#>
-1">
-1!>
-0~=
-0}=
-1|=
-1{=
-0z=
-0y=
-1x=
-1w=
-0v=
-0u=
-1t=
-1s=
-0r=
-0q=
-1p=
-1o=
-0n=
-0m=
-1l=
-1k=
-0j=
-0i=
-1h=
-1g=
-0f=
-0e=
-1d=
-1c=
-0b=
-0a=
-1`=
-1_=
-0^=
-0]=
-1\=
-1[=
-0Z=
-0Y=
-1X=
-1W=
-0V=
-0U=
-1T=
-1S=
-0R=
-0Q=
-1P=
-1O=
-0N=
-0M=
-1L=
-1K=
-0J=
-0I=
-1H=
-1G=
-0F=
-0E=
-1D=
-1C=
-0B=
-0A=
-1@=
-1?=
-0>=
-0==
-1<=
-1;=
-0:=
-09=
-18=
-17=
-06=
-05=
-14=
-13=
-02=
-01=
-10=
-1/=
-0.=
-0-=
-1,=
-1+=
-0*=
-0)=
-1(=
-1'=
-0&=
-0%=
-1$=
-1#=
-0"=
-0!=
-1~<
-1}<
-0|<
-0{<
-1z<
-1y<
-0x<
-0w<
-1v<
-1u<
-0t<
-0s<
-1r<
-1q<
-0p<
-0o<
-1n<
-1m<
-0l<
-0k<
-1j<
-1i<
-0h<
-0g<
-1f<
-1e<
-0d<
-0c<
-1b<
-1a<
-0`<
-0_<
-1^<
-1]<
-0\<
-0[<
-1Z<
-1Y<
-0X<
-0W<
-1V<
-1U<
-0T<
-0S<
-1R<
-1Q<
-0P<
-0O<
-1N<
-1M<
-0L<
-0K<
-1J<
-1I<
-0H<
-0G<
-1F<
-1E<
-0D<
-0C<
-1B<
-1A<
-0@<
-0?<
-1><
-1=<
-0<<
-0;<
-1:<
-19<
-08<
-07<
-16<
-15<
-04<
-03<
-12<
-11<
-00<
-0/<
-1.<
-1-<
-0,<
-0+<
-1*<
-1)<
-0(<
-0'<
-1&<
-1%<
-0$<
-0#<
-1"<
-1!<
-0~;
-0};
-1|;
-1{;
-0z;
-0y;
-1x;
-1w;
-0v;
-0u;
-1t;
-1s;
-0r;
-0q;
-1p;
-1o;
-0n;
-0m;
-1l;
-1k;
-0j;
-0i;
-1h;
-1g;
-0f;
-0e;
-1d;
-1c;
-0b;
-0a;
-1`;
-1_;
-0^;
-0];
-1\;
-1[;
-0Z;
-0Y;
-1X;
-1W;
-0V;
-0U;
-1T;
-1S;
-0R;
-0Q;
-1P;
-1O;
-0N;
-0M;
-1L;
-1K;
-0J;
-0I;
-1H;
-1G;
-0F;
-0E;
-1D;
-1C;
-0B;
-0A;
-1@;
-1?;
-0>;
-0=;
-1<;
-1;;
-0:;
-09;
-18;
-17;
-06;
-05;
-14;
-13;
-02;
-01;
-10;
-1/;
-0.;
-0-;
-1,;
-1+;
-0*;
-0);
-1(;
-1';
-0&;
-0%;
-1$;
-1#;
-0";
-0!;
-1~:
-1}:
-0|:
-0{:
-1z:
-1y:
-0x:
-0w:
-1v:
-1u:
-0t:
-0s:
-1r:
-1q:
-0p:
-0o:
-1n:
-1m:
-0l:
-0k:
-1j:
-1i:
-0h:
-0g:
-1f:
-1e:
-0d:
-0c:
-1b:
-1a:
-0`:
-0_:
-1^:
-1]:
-0\:
-0[:
-1Z:
-1Y:
-0X:
-0W:
-1V:
-1U:
-0T:
-0S:
-1R:
-1Q:
-0P:
-0O:
-1N:
-1M:
-0L:
-0K:
-1J:
-1I:
-0H:
-0G:
-1F:
-1E:
-0D:
-0C:
-1B:
-1A:
-0@:
-0?:
-1>:
-1=:
-0<:
-0;:
-1::
-19:
-08:
-07:
-16:
-15:
-04:
-03:
-12:
-11:
-00:
-0/:
-1.:
-1-:
-0,:
-0+:
-1*:
-1):
-0(:
-0':
-1&:
-1%:
-0$:
-0#:
-1":
-1!:
-0~9
-0}9
-1|9
-1{9
-0z9
-0y9
-1x9
-1w9
-0v9
-0u9
-1t9
-1s9
-0r9
-0q9
-1p9
-1o9
-0n9
-0m9
-1l9
-1k9
-0j9
-0i9
-1h9
-1g9
-0f9
-0e9
-1d9
-1c9
-0b9
-0a9
-1`9
-1_9
-0^9
-0]9
-1\9
-1[9
-0Z9
-0Y9
-1X9
-1W9
-0V9
-0U9
-1T9
-1S9
-0R9
-0Q9
-1P9
-1O9
-0N9
-0M9
-1L9
-1K9
-0J9
-0I9
-1H9
-1G9
-0F9
-0E9
-1D9
-1C9
-0B9
-0A9
-1@9
-1?9
-0>9
-0=9
-1<9
-1;9
-0:9
-099
-189
-179
-069
-059
-149
-139
-029
-019
-109
-1/9
-0.9
-0-9
-1,9
-1+9
-0*9
-0)9
-1(9
-1'9
-0&9
-0%9
-1$9
-1#9
-0"9
-0!9
-1~8
-1}8
-0|8
-0{8
-1z8
-1y8
-0x8
-0w8
-1v8
-1u8
-0t8
-0s8
-1r8
-1q8
-0p8
-0o8
-1n8
-1m8
-0l8
-0k8
-1j8
-1i8
-0h8
-0g8
-1f8
-1e8
-0d8
-0c8
-1b8
-1a8
-0`8
-0_8
-1^8
-1]8
-0\8
-0[8
-1Z8
-1Y8
-0X8
-0W8
-1V8
-1U8
-0T8
-0S8
-1R8
-1Q8
-0P8
-0O8
-1N8
-1M8
-0L8
-0K8
-1J8
-1I8
-0H8
-0G8
-1F8
-1E8
-0D8
-0C8
-1B8
-1A8
-0@8
-0?8
-1>8
-1=8
-0<8
-0;8
-1:8
-198
-088
-078
-168
-158
-048
-038
-128
-118
-008
-0/8
-1.8
-1-8
-0,8
-0+8
-1*8
-1)8
-0(8
-0'8
-1&8
-1%8
-0$8
-0#8
-1"8
-1!8
-0~7
-0}7
-1|7
-1{7
-0z7
-0y7
-1x7
-1w7
-0v7
-0u7
-1t7
-1s7
-0r7
-0q7
-1p7
-1o7
-0n7
-0m7
-1l7
-1k7
-0j7
-0i7
-1h7
-1g7
-0f7
-0e7
-1d7
-1c7
-0b7
-0a7
-1`7
-1_7
-0^7
-0]7
-1\7
-1[7
-0Z7
-0Y7
-1X7
-1W7
-0V7
-0U7
-1T7
-1S7
-0R7
-0Q7
-1P7
-1O7
-0N7
-0M7
-1L7
-1K7
-0J7
-0I7
-1H7
-1G7
-0F7
-0E7
-1D7
-1C7
-0B7
-0A7
-1@7
-1?7
-0>7
-0=7
-1<7
-1;7
-0:7
-097
-187
-177
-067
-057
-147
-137
-027
-017
-107
-1/7
-0.7
-0-7
-1,7
-1+7
-0*7
-0)7
-1(7
-1'7
-0&7
-0%7
-1$7
-1#7
-0"7
-0!7
-1~6
-1}6
-0|6
-0{6
-1z6
-1y6
-0x6
-0w6
-1v6
-1u6
-0t6
-0s6
-1r6
-1q6
-0p6
-0o6
-1n6
-1m6
-0l6
-0k6
-1j6
-1i6
-0h6
-0g6
-1f6
-1e6
-0d6
-0c6
-1b6
-1a6
-0`6
-0_6
-1^6
-1]6
-0\6
-0[6
-1Z6
-1Y6
-0X6
-0W6
-1V6
-1U6
-0T6
-0S6
-1R6
-1Q6
-0P6
-0O6
-1N6
-1M6
-0L6
-0K6
-1J6
-1I6
-0H6
-0G6
-1F6
-1E6
-0D6
-0C6
-1B6
-1A6
-0@6
-0?6
-1>6
-1=6
-0<6
-0;6
-1:6
-196
-086
-076
-166
-156
-046
-036
-126
-116
-006
-0/6
-1.6
-1-6
-0,6
-0+6
-1*6
-1)6
-0(6
-0'6
-1&6
-1%6
-0$6
-0#6
-1"6
-1!6
-0~5
-0}5
-1|5
-1{5
-0z5
-0y5
-1x5
-1w5
-0v5
-0u5
-1t5
-1s5
-0r5
-0q5
-1p5
-1o5
-0n5
-0m5
-1l5
-1k5
-0j5
-0i5
-1h5
-1g5
-0f5
-0e5
-1d5
-1c5
-0b5
-0a5
-1`5
-1_5
-0^5
-0]5
-1\5
-1[5
-0Z5
-0Y5
-1X5
-1W5
-0V5
-0U5
-1T5
-1S5
-0R5
-0Q5
-1P5
-1O5
-0N5
-0M5
-1L5
-1K5
-0J5
-0I5
-1H5
-1G5
-0F5
-0E5
-1D5
-1C5
-0B5
-0A5
-1@5
-1?5
-0>5
-0=5
-1<5
-1;5
-0:5
-095
-185
-175
-065
-055
-145
-135
-025
-015
-105
-1/5
-0.5
-0-5
-1,5
-1+5
-0*5
-0)5
-1(5
-1'5
-0&5
-0%5
-1$5
-1#5
-0"5
-0!5
-1~4
-1}4
-0|4
-0{4
-1z4
-1y4
-0x4
-0w4
-1v4
-1u4
-0t4
-0s4
-1r4
-1q4
-0p4
-0o4
-1n4
-1m4
-0l4
-0k4
-1j4
-1i4
-0h4
-0g4
-1f4
-1e4
-0d4
-0c4
-1b4
-1a4
-0`4
-0_4
-1^4
-1]4
-0\4
-0[4
-1Z4
-1Y4
-0X4
-0W4
-1V4
-1U4
-0T4
-0S4
-1R4
-1Q4
-0P4
-0O4
-1N4
-1M4
-0L4
-0K4
-1J4
-1I4
-0H4
-0G4
-1F4
-1E4
-0D4
-0C4
-1B4
-1A4
-0@4
-0?4
-1>4
-1=4
-0<4
-0;4
-1:4
-194
-084
-074
-164
-154
-044
-034
-124
-114
-004
-0/4
-1.4
-1-4
-0,4
-0+4
-1*4
-1)4
-0(4
-0'4
-1&4
-1%4
-0$4
-0#4
-1"4
-1!4
-0~3
-0}3
-1|3
-1{3
-0z3
-0y3
-1x3
-1w3
-0v3
-0u3
-1t3
-1s3
-0r3
-0q3
-1p3
-1o3
-0n3
-0m3
-1l3
-1k3
-0j3
-0i3
-1h3
-1g3
-0f3
-0e3
-1d3
-1c3
-0b3
-0a3
-1`3
-1_3
-0^3
-0]3
-1\3
-1[3
-0Z3
-0Y3
-1X3
-1W3
-0V3
-0U3
-1T3
-1S3
-0R3
-0Q3
-1P3
-1O3
-0N3
-0M3
-1L3
-1K3
-0J3
-0I3
-1H3
-1G3
-0F3
-0E3
-1D3
-1C3
-0B3
-0A3
-1@3
-1?3
-0>3
-0=3
-1<3
-1;3
-0:3
-093
-183
-173
-063
-053
-143
-133
-023
-013
-103
-1/3
-0.3
-0-3
-1,3
-1+3
-0*3
-0)3
-1(3
-1'3
-0&3
-0%3
-1$3
-1#3
-0"3
-0!3
-1~2
-1}2
-0|2
-0{2
-1z2
-1y2
-0x2
-0w2
-1v2
-1u2
-0t2
-0s2
-1r2
-1q2
-0p2
-0o2
-1n2
-1m2
-0l2
-0k2
-1j2
-1i2
-0h2
-0g2
-1f2
-1e2
-0d2
-0c2
-1b2
-1a2
-0`2
-0_2
-1^2
-1]2
-0\2
-0[2
-1Z2
-1Y2
-0X2
-0W2
-1V2
-1U2
-0T2
-0S2
-1R2
-1Q2
-0P2
-0O2
-1N2
-1M2
-0L2
-0K2
-1J2
-1I2
-0H2
-0G2
-1F2
-1E2
-0D2
-0C2
-1B2
-1A2
-0@2
-0?2
-1>2
-1=2
-0<2
-0;2
-1:2
-192
-082
-072
-162
-152
-042
-032
-122
-112
-002
-0/2
-1.2
-1-2
-0,2
-0+2
-1*2
-1)2
-0(2
-0'2
-1&2
-1%2
-0$2
-0#2
-1"2
-1!2
-0~1
-0}1
-1|1
-1{1
-0z1
-0y1
-1x1
-1w1
-0v1
-0u1
-1t1
-1s1
-0r1
-0q1
-1p1
-1o1
-0n1
-0m1
-1l1
-1k1
-0j1
-0i1
-1h1
-1g1
-0f1
-0e1
-1d1
-1c1
-0b1
-0a1
-1`1
-1_1
-0^1
-0]1
-1\1
-1[1
-0Z1
-0Y1
-1X1
-1W1
-0V1
-0U1
-1T1
-1S1
-0R1
-0Q1
-1P1
-1O1
-0N1
-0M1
-1L1
-1K1
-0J1
-0I1
-1H1
-1G1
-0F1
-0E1
-1D1
-1C1
-0B1
-0A1
-1@1
-1?1
-0>1
-0=1
-1<1
-1;1
-0:1
-091
-181
-171
-061
-051
-141
-131
-021
-011
-101
-1/1
-0.1
-0-1
-1,1
-1+1
-0*1
-0)1
-1(1
-1'1
-0&1
-0%1
-1$1
-1#1
-0"1
-0!1
-1~0
-1}0
-0|0
-0{0
-1z0
-1y0
-0x0
-0w0
-1v0
-1u0
-0t0
-0s0
-1r0
-1q0
-0p0
-0o0
-1n0
-1m0
-0l0
-0k0
-1j0
-1i0
-0h0
-0g0
-1f0
-1e0
-0d0
-0c0
-1b0
-1a0
-0`0
-0_0
-1^0
-1]0
-0\0
-0[0
-1Z0
-1Y0
-0X0
-0W0
-1V0
-1U0
-0T0
-0S0
-1R0
-1Q0
-0P0
-0O0
-1N0
-1M0
-0L0
-0K0
-1J0
-1I0
-0H0
-0G0
-1F0
-1E0
-0D0
-0C0
-1B0
-1A0
-0@0
-0?0
-1>0
-1=0
-0<0
-0;0
-1:0
-190
-080
-070
-160
-150
-040
-030
-120
-110
-000
-0/0
-1.0
-1-0
-0,0
-0+0
-1*0
-1)0
-0(0
-0'0
-1&0
-1%0
-0$0
-0#0
-1"0
-1!0
-0~/
-0}/
-1|/
-1{/
-0z/
-0y/
-1x/
-1w/
-0v/
-0u/
-1t/
-1s/
-0r/
-0q/
-1p/
-1o/
-0n/
-0m/
-1l/
-1k/
-0j/
-0i/
-1h/
-1g/
-0f/
-0e/
-1d/
-1c/
-0b/
-0a/
-1`/
-1_/
-0^/
-0]/
-1\/
-1[/
-0Z/
-0Y/
-1X/
-1W/
-0V/
-0U/
-1T/
-1S/
-0R/
-0Q/
-1P/
-1O/
-0N/
-0M/
-1L/
-1K/
-0J/
-0I/
-1H/
-1G/
-0F/
-0E/
-1D/
-1C/
-0B/
-0A/
-1@/
-1?/
-0>/
-0=/
-1
-1;/
-0:/
-09/
-18/
-17/
-06/
-05/
-14/
-13/
-02/
-01/
-10/
-1//
-0./
-0-/
-1,/
-1+/
-0*/
-0)/
-1(/
-1'/
-0&/
-0%/
-1$/
-1#/
-0"/
-0!/
-1~.
-1}.
-0|.
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-1z.
-1y.
-0x.
-0w.
-1v.
-1u.
-0t.
-0s.
-1r.
-1q.
-0p.
-0o.
-1n.
-1m.
-0l.
-0k.
-1j.
-1i.
-0h.
-0g.
-1f.
-1e.
-0d.
-0c.
-1b.
-1a.
-0`.
-0_.
-1^.
-1].
-0\.
-0[.
-1Z.
-1Y.
-0X.
-0W.
-1V.
-1U.
-0T.
-0S.
-1R.
-1Q.
-0P.
-0O.
-1N.
-1M.
-0L.
-0K.
-1J.
-1I.
-0H.
-0G.
-1F.
-1E.
-0D.
-0C.
-1B.
-1A.
-0@.
-0?.
-1>.
-1=.
-0<.
-0;.
-1:.
-19.
-08.
-07.
-16.
-15.
-04.
-03.
-12.
-11.
-00.
-0/.
-1..
-1-.
-0,.
-0+.
-1*.
-1).
-0(.
-0'.
-1&.
-1%.
-0$.
-0#.
-1".
-1!.
-0~-
-0}-
-1|-
-1{-
-0z-
-0y-
-1x-
-1w-
-0v-
-0u-
-1t-
-1s-
-0r-
-0q-
-1p-
-1o-
-0n-
-0m-
-1l-
-1k-
-0j-
-0i-
-1h-
-1g-
-0f-
-0e-
-1d-
-1c-
-0b-
-0a-
-1`-
-1_-
-0^-
-0]-
-1\-
-1[-
-0Z-
-0Y-
-1X-
-1W-
-0V-
-0U-
-1T-
-1S-
-0R-
-0Q-
-1P-
-1O-
-0N-
-0M-
-1L-
-1K-
-0J-
-0I-
-1H-
-1G-
-0F-
-0E-
-1D-
-1C-
-0B-
-0A-
-1@-
-1?-
-0>-
-0=-
-1<-
-1;-
-0:-
-09-
-18-
-17-
-06-
-05-
-14-
-13-
-02-
-01-
-10-
-1/-
-0.-
-0--
-1,-
-1+-
-0*-
-0)-
-1(-
-1'-
-0&-
-0%-
-1$-
-1#-
-0"-
-0!-
-1~,
-1},
-0|,
-0{,
-1z,
-1y,
-0x,
-0w,
-1v,
-1u,
-0t,
-0s,
-1r,
-1q,
-0p,
-0o,
-1n,
-1m,
-0l,
-0k,
-1j,
-1i,
-0h,
-0g,
-1f,
-1e,
-0d,
-0c,
-1b,
-1a,
-0`,
-0_,
-1^,
-1],
-0\,
-0[,
-1Z,
-1Y,
-0X,
-0W,
-1V,
-1U,
-0T,
-0S,
-1R,
-1Q,
-0P,
-0O,
-1N,
-1M,
-0L,
-0K,
-1J,
-1I,
-0H,
-0G,
-1F,
-1E,
-0D,
-0C,
-1B,
-1A,
-0@,
-0?,
-1>,
-1=,
-0<,
-0;,
-1:,
-19,
-08,
-07,
-16,
-15,
-04,
-03,
-12,
-11,
-00,
-0/,
-1.,
-1-,
-0,,
-0+,
-1*,
-1),
-0(,
-0',
-1&,
-1%,
-0$,
-0#,
-1",
-1!,
-0~+
-0}+
-1|+
-1{+
-0z+
-0y+
-1x+
-1w+
-0v+
-0u+
-1t+
-1s+
-0r+
-0q+
-1p+
-1o+
-0n+
-0m+
-1l+
-1k+
-0j+
-0i+
-1h+
-1g+
-0f+
-0e+
-1d+
-1c+
-0b+
-0a+
-1`+
-1_+
-0^+
-0]+
-1\+
-1[+
-0Z+
-0Y+
-1X+
-1W+
-0V+
-0U+
-1T+
-1S+
-0R+
-0Q+
-1P+
-1O+
-0N+
-0M+
-1L+
-1K+
-0J+
-0I+
-1H+
-1G+
-0F+
-0E+
-1D+
-1C+
-0B+
-0A+
-1@+
-1?+
-0>+
-0=+
-1<+
-1;+
-0:+
-09+
-18+
-17+
-06+
-05+
-14+
-13+
-02+
-01+
-10+
-1/+
-0.+
-0-+
-1,+
-1++
-0*+
-0)+
-1(+
-1'+
-0&+
-0%+
-1$+
-1#+
-0"+
-0!+
-1~*
-1}*
-0|*
-0{*
-1z*
-1y*
-0x*
-0w*
-1v*
-1u*
-0t*
-0s*
-1r*
-1q*
-0p*
-0o*
-1n*
-1m*
-0l*
-0k*
-1j*
-1i*
-0h*
-0g*
-1f*
-1e*
-0d*
-0c*
-1b*
-1a*
-0`*
-0_*
-1^*
-1]*
-0\*
-0[*
-1Z*
-1Y*
-0X*
-0W*
-1V*
-1U*
-0T*
-0S*
-1R*
-1Q*
-0P*
-0O*
-1N*
-1M*
-0L*
-0K*
-1J*
-1I*
-0H*
-0G*
-1F*
-1E*
-0D*
-0C*
-1B*
-1A*
-0@*
-0?*
-1>*
-1=*
-0<*
-0;*
-1:*
-19*
-08*
-07*
-16*
-15*
-04*
-03*
-12*
-11*
-00*
-0/*
-1.*
-1-*
-0,*
-0+*
-1**
-1)*
-0(*
-0'*
-1&*
-1%*
-0$*
-0#*
-1"*
-1!*
-0~)
-0})
-1|)
-1{)
-0z)
-0y)
-1x)
-1w)
-0v)
-0u)
-1t)
-1s)
-0r)
-0q)
-1p)
-1o)
-0n)
-0m)
-1l)
-1k)
-0j)
-0i)
-1h)
-1g)
-0f)
-0e)
-1d)
-1c)
-0b)
-0a)
-1`)
-1_)
-0^)
-0])
-1\)
-1[)
-0Z)
-0Y)
-1X)
-1W)
-0V)
-0U)
-1T)
-1S)
-0R)
-0Q)
-1P)
-1O)
-0N)
-0M)
-1L)
-1K)
-0J)
-0I)
-1H)
-1G)
-0F)
-0E)
-1D)
-1C)
-0B)
-0A)
-1@)
-1?)
-0>)
-0=)
-1<)
-1;)
-0:)
-09)
-18)
-17)
-06)
-05)
-14)
-13)
-02)
-01)
-10)
-1/)
-0.)
-0-)
-1,)
-1+)
-0*)
-0))
-1()
-1')
-0&)
-0%)
-1$)
-1#)
-0")
-0!)
-1~(
-1}(
-0|(
-0{(
-1z(
-1y(
-0x(
-0w(
-1v(
-1u(
-0t(
-0s(
-1r(
-1q(
-0p(
-0o(
-1n(
-1m(
-0l(
-0k(
-1j(
-1i(
-0h(
-0g(
-1f(
-1e(
-0d(
-0c(
-1b(
-1a(
-0`(
-0_(
-1^(
-1](
-0\(
-0[(
-1Z(
-1Y(
-0X(
-0W(
-1V(
-1U(
-0T(
-0S(
-1R(
-1Q(
-0P(
-0O(
-1N(
-1M(
-0L(
-0K(
-1J(
-1I(
-0H(
-0G(
-1F(
-1E(
-0D(
-0C(
-1B(
-1A(
-0@(
-0?(
-1>(
-1=(
-0<(
-0;(
-1:(
-19(
-08(
-07(
-16(
-15(
-04(
-03(
-12(
-11(
-00(
-0/(
-1.(
-1-(
-0,(
-0+(
-1*(
-1)(
-0((
-0'(
-1&(
-1%(
-0$(
-0#(
-1"(
-1!(
-0~'
-0}'
-1|'
-1{'
-0z'
-0y'
-1x'
-1w'
-0v'
-0u'
-1t'
-1s'
-0r'
-0q'
-1p'
-1o'
-0n'
-0m'
-1l'
-1k'
-0j'
-0i'
-1h'
-1g'
-0f'
-0e'
-1d'
-1c'
-0b'
-0a'
-1`'
-1_'
-0^'
-0]'
-1\'
-1['
-0Z'
-0Y'
-1X'
-1W'
-0V'
-0U'
-1T'
-1S'
-0R'
-0Q'
-1P'
-1O'
-0N'
-0M'
-1L'
-1K'
-0J'
-0I'
-1H'
-1G'
-0F'
-0E'
-1D'
-1C'
-0B'
-0A'
-1@'
-1?'
-0>'
-0='
-1<'
-1;'
-0:'
-09'
-18'
-17'
-06'
-05'
-14'
-13'
-02'
-01'
-10'
-1/'
-0.'
-0-'
-1,'
-1+'
-0*'
-0)'
-1('
-1''
-0&'
-0%'
-1$'
-1#'
-0"'
-0!'
-1~&
-1}&
-0|&
-0{&
-1z&
-1y&
-0x&
-0w&
-1v&
-1u&
-0t&
-0s&
-1r&
-1q&
-0p&
-0o&
-1n&
-1m&
-0l&
-0k&
-1j&
-1i&
-0h&
-0g&
-1f&
-1e&
-0d&
-0c&
-1b&
-1a&
-0`&
-0_&
-1^&
-1]&
-0\&
-0[&
-1Z&
-1Y&
-0X&
-0W&
-1V&
-1U&
-0T&
-0S&
-1R&
-1Q&
-0P&
-0O&
-1N&
-1M&
-0L&
-0K&
-1J&
-1I&
-0H&
-0G&
-1F&
-1E&
-0D&
-0C&
-1B&
-1A&
-0@&
-0?&
-1>&
-1=&
-0<&
-0;&
-1:&
-19&
-08&
-07&
-16&
-15&
-04&
-03&
-12&
-11&
-00&
-0/&
-1.&
-1-&
-0,&
-0+&
-1*&
-1)&
-0(&
-0'&
-1&&
-1%&
-0$&
-0#&
-1"&
-1!&
-0~%
-0}%
-1|%
-1{%
-0z%
-0y%
-1x%
-1w%
-0v%
-0u%
-1t%
-1s%
-0r%
-0q%
-1p%
-1o%
-0n%
-0m%
-1l%
-1k%
-0j%
-0i%
-1h%
-1g%
-0f%
-0e%
-1d%
-1c%
-0b%
-0a%
-1`%
-1_%
-0^%
-0]%
-1\%
-1[%
-0Z%
-0Y%
-1X%
-1W%
-0V%
-0U%
-1T%
-1S%
-0R%
-0Q%
-1P%
-1O%
-0N%
-0M%
-1L%
-1K%
-0J%
-0I%
-1H%
-1G%
-0F%
-0E%
-1D%
-1C%
-0B%
-0A%
-1@%
-1?%
-0>%
-0=%
-1<%
-1;%
-0:%
-09%
-18%
-17%
-06%
-05%
-14%
-13%
-02%
-01%
-10%
-1/%
-0.%
-0-%
-1,%
-1+%
-0*%
-0)%
-1(%
-1'%
-0&%
-0%%
-1$%
-1#%
-0"%
-0!%
-1~$
-1}$
-0|$
-0{$
-1z$
-1y$
-0x$
-0w$
-1v$
-1u$
-0t$
-0s$
-1r$
-1q$
-0p$
-0o$
-1n$
-1m$
-0l$
-0k$
-1j$
-1i$
-0h$
-0g$
-1f$
-1e$
-0d$
-0c$
-1b$
-1a$
-0`$
-0_$
-1^$
-1]$
-0\$
-0[$
-1Z$
-1Y$
-0X$
-0W$
-1V$
-1U$
-0T$
-0S$
-1R$
-1Q$
-0P$
-0O$
-1N$
-1M$
-0L$
-0K$
-1J$
-1I$
-0H$
-0G$
-1F$
-1E$
-0D$
-0C$
-1B$
-1A$
-0@$
-0?$
-1>$
-1=$
-0<$
-0;$
-1:$
-19$
-08$
-07$
-16$
-15$
-04$
-03$
-12$
-11$
-00$
-0/$
-1.$
-1-$
-0,$
-0+$
-1*$
-1)$
-0($
-0'$
-1&$
-1%$
-0$$
-0#$
-1"$
-1!$
-0~#
-0}#
-1|#
-1{#
-0z#
-0y#
-1x#
-1w#
-0v#
-0u#
-1t#
-1s#
-0r#
-0q#
-1p#
-1o#
-0n#
-0m#
-1l#
-1k#
-0j#
-0i#
-1h#
-1g#
-0f#
-0e#
-1d#
-1c#
-0b#
-0a#
-1`#
-1_#
-0^#
-0]#
-1\#
-0[#
-0Z#
-xY#
-xX#
-xW#
-xV#
-xU#
-xT#
-xS#
-xR#
-xQ#
-xP#
-xO#
-xN#
-xM#
-xL#
-xK#
-xJ#
-xI#
-xH#
-xG#
-xF#
-xE#
-xD#
-xC#
-xB#
-xA#
-x@#
-x?#
-x>#
-x=#
-x<#
-x;#
-x:#
-x9#
-x8#
-x7#
-x6#
-x5#
-x4#
-x3#
-x2#
-x1#
-x0#
-x/#
-x.#
-x-#
-x,#
-x+#
-x*#
-x)#
-x(#
-x'#
-x
-x%#
-x$#
-x##
-x"#
-x!#
-x~"
-x}"
-x|"
-x{"
-xz"
-xy"
-xx"
-xw"
-xv"
-xu"
-xt"
-xs"
-xr"
-xq"
-xp"
-xo"
-xn"
-xm"
-xl"
-xk"
-xj"
-xi"
-xh"
-xg"
-xf"
-xe"
-xd"
-xc"
-xb"
-xa"
-x`"
-x_"
-x^"
-x]"
-x\"
-x["
-xZ"
-xY"
-xX"
-xW"
-0V"
-1U"
-1T"
-xS"
-xR"
-0Q"
-1P"
-xO"
-xN"
-xM"
-xL"
-xK"
-xJ"
-1I"
-xH"
-xG"
-xF"
-1E"
-xD"
-xC"
-xB"
-xA"
-x@"
-1?"
-x>"
-1="
-x<"
-x;"
-x:"
-x9"
-x8"
-x7"
-16"
-x5"
-x4"
-x3"
-x2"
-x1"
-10"
-x/"
-1."
-x-"
-x,"
-x+"
-x*"
-x)"
-x("
-x'"
-x&"
-x%"
-x$"
-x#"
-x""
-x!"
-x~
-x}
-x|
-x{
-xz
-xy
-xx
-xw
-xv
-xu
-xt
-xs
-xr
-xq
-xp
-xo
-xn
-xm
-xl
-xk
-xj
-xi
-xh
-xg
-xf
-xe
-xd
-xc
-xb
-xa
-x`
-0_
-0^
-0]
-0\
-0[
-xZ
-xY
-xX
-xW
-xV
-xU
-xT
-xS
-xR
-xQ
-xP
-xO
-xN
-xM
-xL
-xK
-xJ
-xI
-xH
-xG
-xF
-xE
-xD
-xC
-xB
-xA
-x@
-x?
-x>
-x=
-x<
-x;
-x:
-x9
-x8
-x7
-x6
-x5
-x4
-x3
-x2
-x1
-x0
-x/
-bx .
-b0 -
-0,
-1+
-0*
-0)
-b0 (
-b0 '
-b0 $
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-bx "
-x!
-$end
-#2500
-1^
-1]
-1\
-1[
-1m^
-1r^
-1w^
-1|^
-1_
-1h^
-1)
-#3500
-0D#
-0I#
-0H#
-0G#
-0F#
-0C#
-0B#
-0A#
-0@#
-0>#
-0=#
-0<#
-0;#
-0Y#
-0X#
-0V#
-0S#
-0R#
-0N#
-0K#
-0J#
-0E#
-0,Z
-0?#
-0:#
-0~X
-04Y
-0JY
-0`Y
-0DZ
-0XZ
-0tZ
-00[
-0c[
-0}[
-09\
-0S\
-0L#
-0M#
-0P#
-0Q#
-0T#
-0W#
-0vU
-0*V
-0NV
-0%W
-07W
-0vW
-0MX
-0_X
-0uY
-0.Z
-0I[
-0n\
-1}X
-06Y
-0LY
-0bY
-1BZ
-0ZZ
-1sZ
-1/[
-1b[
-1|[
-18\
-1R\
-0:X
-0*X
-0XW
-0GW
-0pV
-0"
-1<"
-15"
-13"
-1/"
-1-"
-0wY
-1}
-1H[
-0o\
-1*"
-1'"
-1%"
-1#"
-1!"
-1{
-1y
-1w
-1t
-1q
-1n
-1k
-1h
-1e
-11"
-14"
-18"
-1:"
-1@"
-1G"
-1oU
-1#V
-15V
-1GV
-1|V
-10W
-1oW
-1#X
-1FX
-1XX
-1""
-1'Z
-1r
-1c
-1qX
-1-Y
-1CY
-1YY
-1pY
-1~
-1;Z
-1QZ
-1gZ
-1#[
-1>[
-1V[
-1p[
-1,\
-1F\
-15X
-1{W
-1SW
-1BW
-1kV
-0_V
-1/V
-0U#
-1qU
-1%V
-17V
-1IV
-0^V
-1~V
-12W
-1qW
-1%X
-1HX
-1ZX
-1rX
-1.Y
-1DY
-1ZY
-1gY
-0%Z
-1T
-18R
-0JT
-0O"
-0?T
-1t"
-0SU
-0k[
-0_"
-0Q[
-1-R
-0TU
-0-T
-04T
-0"T
-0u"
-0.T
-13T
-07[
-0#T
-0(R
-0`"
-16
-0nS
-1b"
-1'R
-0(T
-1(_
-0oS
-1uS
-1x"
-0pS
-0vS
-0|Z
-1sQ
-1d"
-04
-0bZ
-0]S
-0tQ
-1cS
-0iS
-02_
-0LS
-0^S
-0{"
-0MS
-1f"
-0LZ
-0bQ
-0g"
-1SS
-0AS
-1aQ
-0GS
-1RS
-0BS
-1~"
-06Z
-0i"
-1OQ
-00S
-06S
-0xY
-0PQ
-01S
-07S
-0*S
-0##
-0+S
-0>Q
-05
-0;Q
-0-_
-0$#
-0iY
-06Q
-0}R
-0TY
-03Q
-0~R
-0rR
-0%#
-0sR
-0.Q
-01
-0>Y
-0+Q
-0A_
-0gR
-1W"
-0
-0hR
-1nT
-0&Q
-02
-0(Y
-0Y"
-0#Q
-0<_
-0\R
-1c"
-1o"
-0dT
-0lX
-0'#
-0]R
-1h"
-0a"
-1hS
-09R
-1KR
-1Z"
-0/
-b0 "
-b0 .
-0OT
-0|P
-07
-1
-0@
-0H
-0J
-0K
-0O
-0Q
-0;
-0?
-0A
-0T
-0U
-0V
-0C
-0D
-0E
-0F
-0G
-09
-0W
-0I
-0L
-0M
-0:
-0<
-0=
-0c^
-0^^
-0,^
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-0q]
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-16Y
-1bY
-1Y#
-1#
-0=#
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-0qX
-1YY
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-0G"
-06Y
-0bY
-1~X
-1JY
-0DZ
-0XZ
-0tZ
-00[
-0c[
-0}[
-09\
-0S\
-0n\
-0EY
-1Y"
-0sX
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-0E#
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-0#
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-0 PathGroupNamedMap;
class PathGroup
{
public:
- virtual ~PathGroup();
+ ~PathGroup();
// Path group that compares compare slacks.
static PathGroup *makePathGroupArrival(const char *name,
int group_path_count,
@@ -59,8 +59,9 @@ public:
void insert(PathEnd *path_end);
// Push group_path_count into path_ends.
void pushEnds(PathEndSeq &path_ends);
- // Predicates to determine if a PathEnd is worth saving.
- virtual bool savable(PathEnd *path_end);
+ // Predicate to determine if a PathEnd is worth saving.
+ bool saveable(PathEnd *path_end);
+ bool enumMinSlackUnderMin(PathEnd *path_end);
int maxPaths() const { return group_path_count_; }
PathGroupIterator *iterator();
// This does NOT delete the path ends.
diff --git a/include/sta/PowerClass.hh b/include/sta/PowerClass.hh
index 3f00d056..9eb7c63e 100644
--- a/include/sta/PowerClass.hh
+++ b/include/sta/PowerClass.hh
@@ -38,17 +38,17 @@ class PwrActivity
{
public:
PwrActivity();
- PwrActivity(float activity,
+ PwrActivity(float density,
float duty,
PwrActivityOrigin origin);
- float activity() const { return activity_; }
- void setActivity(float activity);
+ float density() const { return density_; }
+ void setDensity(float density);
float duty() const { return duty_; }
void setDuty(float duty);
- PwrActivityOrigin origin() { return origin_; }
+ PwrActivityOrigin origin() const { return origin_; }
void setOrigin(PwrActivityOrigin origin);
const char *originName() const;
- void set(float activity,
+ void set(float density,
float duty,
PwrActivityOrigin origin);
bool isSet() const;
@@ -56,12 +56,11 @@ public:
private:
void check();
- // In general activity is per clock cycle, NOT per second.
- float activity_;
- float duty_;
+ float density_; // transitions / second
+ float duty_; // probability signal is high
PwrActivityOrigin origin_;
- static constexpr float min_activity = 1E-10;
+ static constexpr float min_density = 1E-10;
};
class PowerResult
@@ -69,12 +68,15 @@ class PowerResult
public:
PowerResult();
void clear();
- float &internal() { return internal_; }
- float &switching() { return switching_; }
- float &leakage() { return leakage_; }
+ float internal() const { return internal_; }
+ float switching() const { return switching_; }
+ float leakage() const { return leakage_; }
float total() const;
void incr(PowerResult &result);
-
+ void incrInternal(float pwr);
+ void incrSwitching(float pwr);
+ void incrLeakage(float pwr);
+
private:
float internal_;
float switching_;
diff --git a/include/sta/Report.hh b/include/sta/Report.hh
index 8e74494d..3cb5766e 100644
--- a/include/sta/Report.hh
+++ b/include/sta/Report.hh
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include "Machine.hh" // __attribute__
@@ -119,6 +120,11 @@ public:
size_t length);
static Report *defaultReport() { return default_; }
+ // Suppress message by id.
+ void suppressMsgId(int id);
+ void unsuppressMsgId(int id);
+ bool isSuppressed(int id);
+
protected:
// All sta print functions have an implicit return printed by this function.
virtual void printLine(const char *line,
@@ -152,6 +158,7 @@ protected:
size_t buffer_length_;
std::mutex buffer_lock_;
static Report *default_;
+ std::set suppressed_msg_ids_;
friend class Debug;
};
diff --git a/include/sta/Sta.hh b/include/sta/Sta.hh
index 9f0503bb..0d327173 100644
--- a/include/sta/Sta.hh
+++ b/include/sta/Sta.hh
@@ -911,6 +911,7 @@ public:
PathEnd *prev_end,
bool last);
void reportPathEnd(PathEnd *end);
+ void reportPathEnds(PathEndSeq *ends);
ReportPath *reportPath() { return report_path_; }
void reportPath(Path *path);
@@ -1291,7 +1292,7 @@ public:
PowerResult &pad);
PowerResult power(const Instance *inst,
const Corner *corner);
- PwrActivity findClkedActivity(const Pin *pin);
+ PwrActivity activity(const Pin *pin);
void writeTimingModel(const char *lib_name,
const char *cell_name,
diff --git a/include/sta/TclTypeHelpers.hh b/include/sta/TclTypeHelpers.hh
new file mode 100644
index 00000000..25a6490e
--- /dev/null
+++ b/include/sta/TclTypeHelpers.hh
@@ -0,0 +1,61 @@
+// OpenSTA, Static Timing Analyzer
+// Copyright (c) 2024, Parallax Software, Inc.
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see .
+
+#include "ArcDelayCalc.hh"
+#include "StringSet.hh"
+#include "StringSeq.hh"
+
+#include
+
+namespace sta {
+
+#if TCL_MAJOR_VERSION < 9
+ typedef int Tcl_Size;
+#endif
+
+StringSet *
+tclListSetConstChar(Tcl_Obj *const source,
+ Tcl_Interp *interp);
+
+StringSeq *
+tclListSeqConstChar(Tcl_Obj *const source,
+ Tcl_Interp *interp);
+
+StdStringSet *
+tclListSetStdString(Tcl_Obj *const source,
+ Tcl_Interp *interp);
+
+void
+tclArgError(Tcl_Interp *interp,
+ const char *msg,
+ const char *arg);
+
+void
+objectListNext(const char *list,
+ const char *type,
+ // Return values.
+ bool &type_match,
+ const char *&next);
+
+Tcl_Obj *
+tclArcDcalcArg(ArcDcalcArg &gate,
+ Tcl_Interp *interp);
+
+ArcDcalcArg
+arcDcalcArgTcl(Tcl_Obj *obj,
+ Tcl_Interp *interp);
+
+} // namespace
diff --git a/liberty/Liberty.cc b/liberty/Liberty.cc
index d03e4a5b..a1bf89bf 100644
--- a/liberty/Liberty.cc
+++ b/liberty/Liberty.cc
@@ -219,7 +219,7 @@ TableTemplate *
LibertyLibrary::findTableTemplate(const char *name,
TableTemplateType type)
{
- return template_maps_[int(type)][name];
+ return template_maps_[int(type)].findKey(name);
}
TableTemplateSeq
diff --git a/liberty/LibertyReader.cc b/liberty/LibertyReader.cc
index 02bdf472..80ff732a 100644
--- a/liberty/LibertyReader.cc
+++ b/liberty/LibertyReader.cc
@@ -103,6 +103,7 @@ LibertyReader::init(const char *filename,
saved_port_group_ = nullptr;
in_bus_ = false;
in_bundle_ = false;
+ in_ccsn_ = false;
sequential_ = nullptr;
statetable_ = nullptr;
timing_ = nullptr;
@@ -545,6 +546,24 @@ LibertyReader::defineVisitors()
defineAttrVisitor("driver_waveform_name", &LibertyReader::visitDriverWaveformName);
defineAttrVisitor("driver_waveform_rise", &LibertyReader::visitDriverWaveformRise);
defineAttrVisitor("driver_waveform_fall", &LibertyReader::visitDriverWaveformFall);
+
+ // ccsn (not implemented, this is needed to properly ignore ccsn groups)
+ defineGroupVisitor("ccsn_first_stage", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
+ defineGroupVisitor("ccsn_last_stage", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
+ defineGroupVisitor("output_voltage_rise", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
+ defineGroupVisitor("output_voltage_fall", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
+ defineGroupVisitor("propagated_noise_low", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
+ defineGroupVisitor("propagated_noise_high", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
+ defineGroupVisitor("input_ccb", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
+ defineGroupVisitor("output_ccb", &LibertyReader::beginCcsn,
+ &LibertyReader::endCcsn);
}
void
@@ -2711,7 +2730,7 @@ LibertyReader::endOutputCurrentRiseFall(LibertyGroup *group)
void
LibertyReader::beginVector(LibertyGroup *group)
{
- if (timing_) {
+ if (timing_ && !in_ccsn_) {
beginTable(group, TableTemplateType::output_current, current_scale_);
scale_factor_type_ = ScaleFactorType::unknown;
reference_time_exists_ = false;
@@ -4655,9 +4674,9 @@ LibertyReader::makeTable(LibertyAttr *attr,
float scale)
{
if (attr->isComplex()) {
- makeTableAxis(0);
- makeTableAxis(1);
- makeTableAxis(2);
+ makeTableAxis(0, attr);
+ makeTableAxis(1, attr);
+ makeTableAxis(2, attr);
if (axis_[0] && axis_[1] && axis_[2]) {
// 3D table
// Column index1*size(index2) + index2
@@ -4682,7 +4701,7 @@ LibertyReader::makeTable(LibertyAttr *attr,
delete table;
table_ = make_shared(values, axis_[0]);
}
- else {
+ else if (axis_[0] == nullptr && axis_[1] == nullptr && axis_[2] == nullptr) {
// scalar
FloatTable *table = makeFloatTable(attr, 1, 1, scale);
float value = (*(*table)[0])[0];
@@ -4717,20 +4736,18 @@ LibertyReader::makeFloatTable(LibertyAttr *attr,
else
libWarn(1258, attr, "%s is not a list of floats.", attr->name());
if (row->size() != cols) {
- libWarn(1259, attr, "table row has %u columns but axis has %d.",
- // size_t is long on 64 bit ports.
- static_cast(row->size()),
- static_cast(cols));
+ libWarn(1259, attr, "table row has %zu columns but axis has %zu.",
+ row->size(),
+ cols);
// Fill out row columns with zeros.
for (size_t c = row->size(); c < cols; c++)
row->push_back(0.0);
}
}
if (table->size() != rows) {
- libWarn(1260, attr, "table has %u rows but axis has %d.",
- // size_t is long on 64 bit ports.
- static_cast(table->size()),
- static_cast(rows));
+ libWarn(1260, attr, "table has %zu rows but axis has %zu.",
+ table->size(),
+ rows);
// Fill with zero'd rows.
for (size_t r = table->size(); r < rows; r++) {
FloatSeq *row = new FloatSeq;
@@ -4744,7 +4761,8 @@ LibertyReader::makeFloatTable(LibertyAttr *attr,
}
void
-LibertyReader::makeTableAxis(int index)
+LibertyReader::makeTableAxis(int index,
+ LibertyAttr *attr)
{
if (axis_values_[index]) {
TableAxisVariable var = axis_[index]->variable();
@@ -4754,6 +4772,11 @@ LibertyReader::makeTableAxis(int index)
scaleFloats(values, scale);
axis_[index] = make_shared(var, values);
}
+ else if (axis_[index] && axis_[index]->values() == nullptr) {
+ libWarn(1344, attr, "Table axis and template missing values.");
+ axis_[index] = nullptr;
+ axis_values_[index] = nullptr;
+ }
}
////////////////////////////////////////////////////////////////
diff --git a/liberty/LibertyReaderPvt.hh b/liberty/LibertyReaderPvt.hh
index a750c3ad..a9646ffe 100644
--- a/liberty/LibertyReaderPvt.hh
+++ b/liberty/LibertyReaderPvt.hh
@@ -482,6 +482,10 @@ public:
void visitDriverWaveformRiseFall(LibertyAttr *attr,
const RiseFall *rf);
+ // ccsn (not implemented, this is needed to properly ignore ccsn groups)
+ void beginCcsn(LibertyGroup *) { in_ccsn_ = true; }
+ void endCcsn(LibertyGroup *) { in_ccsn_ = false; }
+
// Visitors for derived classes to overload.
virtual void beginGroup1(LibertyGroup *) {}
virtual void beginGroup2(LibertyGroup *) {}
@@ -520,7 +524,8 @@ protected:
LibraryAttrVisitor visitor);
void parseNames(const char *name_str);
void clearAxisValues();
- void makeTableAxis(int index);
+ void makeTableAxis(int index,
+ LibertyAttr *attr);
StringSeq *parseNameList(const char *name_list);
StdStringSeq parseTokenList(const char *token_str,
@@ -629,6 +634,7 @@ protected:
StringSeq bus_names_;
bool in_bus_;
bool in_bundle_;
+ bool in_ccsn_;
TableAxisVariable axis_var_[3];
FloatSeq *axis_values_[3];
int type_bit_from_;
diff --git a/parasitics/Parasitics.tcl b/parasitics/Parasitics.tcl
index 0aca7d82..a4911212 100644
--- a/parasitics/Parasitics.tcl
+++ b/parasitics/Parasitics.tcl
@@ -78,7 +78,7 @@ proc_redirect read_spef {
$coupling_reduction_factor $reduce]
}
-define_cmd_args "report_parasitic_annotation" {-report_unannotated}
+define_cmd_args "report_parasitic_annotation" {[-report_unannotated]}
proc_redirect report_parasitic_annotation {
parse_key_args "report_parasitic_annotation" args \
diff --git a/power/Power.cc b/power/Power.cc
index 48554509..fe081788 100644
--- a/power/Power.cc
+++ b/power/Power.cc
@@ -59,13 +59,12 @@
// input_voltage : default_VDD_VSS_input;
// pin
// output_voltage : default_VDD_VSS_output;
-//
-// transition_density = activity / clock_period
namespace sta {
using std::abs;
using std::max;
+using std::min;
using std::isnormal;
static bool
@@ -87,8 +86,8 @@ static EnumNameMap pwr_activity_origin_map =
Power::Power(StaState *sta) :
StaState(sta),
- global_activity_{0.0, 0.0, PwrActivityOrigin::unknown},
- input_activity_{0.1, 0.5, PwrActivityOrigin::input},
+ global_activity_(),
+ input_activity_(), // default set in ensureActivities()
seq_activity_map_(100, SeqPinHash(network_), SeqPinEqual()),
activities_valid_(false),
bdd_(sta)
@@ -96,41 +95,41 @@ Power::Power(StaState *sta) :
}
void
-Power::setGlobalActivity(float activity,
+Power::setGlobalActivity(float density,
float duty)
{
- global_activity_.set(activity, duty, PwrActivityOrigin::global);
+ global_activity_.set(density, duty, PwrActivityOrigin::global);
activities_valid_ = false;
}
void
-Power::setInputActivity(float activity,
+Power::setInputActivity(float density,
float duty)
{
- input_activity_.set(activity, duty, PwrActivityOrigin::input);
+ input_activity_.set(density, duty, PwrActivityOrigin::input);
activities_valid_ = false;
}
void
Power::setInputPortActivity(const Port *input_port,
- float activity,
+ float density,
float duty)
{
Instance *top_inst = network_->topInstance();
const Pin *pin = network_->findPin(top_inst, input_port);
if (pin) {
- user_activity_map_[pin] = {activity, duty, PwrActivityOrigin::user};
+ user_activity_map_[pin] = {density, duty, PwrActivityOrigin::user};
activities_valid_ = false;
}
}
void
Power::setUserActivity(const Pin *pin,
- float activity,
+ float density,
float duty,
PwrActivityOrigin origin)
{
- user_activity_map_[pin] = {activity, duty, origin};
+ user_activity_map_[pin] = {density, duty, origin};
activities_valid_ = false;
}
@@ -152,7 +151,7 @@ Power::setActivity(const Pin *pin,
{
debugPrint(debug_, "power_activity", 3, "set %s %.2e %.2f %s",
network_->pathName(pin),
- activity.activity(),
+ activity.density(),
activity.duty(),
pwr_activity_origin_map.find(activity.origin()));
activity_map_[pin] = activity;
@@ -403,7 +402,7 @@ PropActivityVisitor::visit(Vertex *vertex)
Vertex *from_vertex = edge->from(graph_);
const Pin *from_pin = from_vertex->pin();
PwrActivity &from_activity = power_->activity(from_pin);
- PwrActivity to_activity(from_activity.activity(),
+ PwrActivity to_activity(from_activity.density(),
from_activity.duty(),
PwrActivityOrigin::propagated);
changed = setActivityCheck(pin, to_activity);
@@ -426,13 +425,13 @@ PropActivityVisitor::visit(Vertex *vertex)
PwrActivity activity2 = power_->findActivity(enable);
float p1 = activity1.duty();
float p2 = activity2.duty();
- PwrActivity activity(activity1.activity() * p2 + activity2.activity() * p1,
+ PwrActivity activity(activity1.density() * p2 + activity2.density() * p1,
p1 * p2,
PwrActivityOrigin::propagated);
changed = setActivityCheck(gclk, activity);
debugPrint(debug_, "power_activity", 3, "gated_clk %s %.2e %.2f",
network_->pathName(gclk),
- activity.activity(),
+ activity.density(),
activity.duty());
}
}
@@ -466,13 +465,17 @@ bool
PropActivityVisitor::setActivityCheck(const Pin *pin,
PwrActivity &activity)
{
+ float min_rf_slew = power_->getMinRfSlew(pin);
+ float max_density = (min_rf_slew > 0.0) ? 1.0 / min_rf_slew : INF;
+ if (activity.density() > max_density)
+ activity.setDensity(max_density);
PwrActivity &prev_activity = power_->activity(pin);
- float activity_delta = abs(activity.activity() - prev_activity.activity());
+ float density_delta = abs(activity.density() - prev_activity.density());
float duty_delta = abs(activity.duty() - prev_activity.duty());
- if (activity_delta > change_tolerance_
+ if (density_delta > change_tolerance_
|| duty_delta > change_tolerance_
|| activity.origin() != prev_activity.origin()) {
- max_change_ = max(max_change_, activity_delta);
+ max_change_ = max(max_change_, density_delta);
max_change_ = max(max_change_, duty_delta);
power_->setActivity(pin, activity);
return true;
@@ -517,11 +520,11 @@ Power::evalActivity(FuncExpr *expr,
else {
DdNode *bdd = bdd_.funcBdd(expr);
float duty = evalBddDuty(bdd, inst);
- float activity = evalBddActivity(bdd, inst);
+ float density = evalBddActivity(bdd, inst);
Cudd_RecursiveDeref(bdd_.cuddMgr(), bdd);
bdd_.clearVarMap();
- return PwrActivity(activity, duty, PwrActivityOrigin::propagated);
+ return PwrActivity(density, duty, PwrActivityOrigin::propagated);
}
}
@@ -588,7 +591,7 @@ float
Power::evalBddActivity(DdNode *bdd,
const Instance *inst)
{
- float activity = 0.0;
+ float density = 0.0;
for (const auto [port, var_node] : bdd_.portVarMap()) {
const Pin *pin = findLinkPin(inst, port);
if (pin) {
@@ -598,21 +601,16 @@ Power::evalBddActivity(DdNode *bdd,
Cudd_Ref(diff);
float diff_duty = evalBddDuty(diff, inst);
Cudd_RecursiveDeref(bdd_.cuddMgr(), diff);
- float var_act = var_activity.activity() * diff_duty;
- activity += var_act;
- if (debug_->check("power_activity", 3)) {
- const Clock *clk = findClk(pin);
- float clk_period = clk ? clk->period() : 1.0;
- debugPrint(debug_, "power_activity", 3, "var %s%s %.3e * %.3f = %.3e",
- port->name(),
- clk ? "" : " (unclocked)",
- var_activity.activity() / clk_period,
- diff_duty,
- var_act / clk_period);
- }
+ float var_density = var_activity.density() * diff_duty;
+ density += var_density;
+ debugPrint(debug_, "power_activity", 3, "var %s %.3e * %.3f = %.3e",
+ port->name(),
+ var_activity.density(),
+ diff_duty,
+ var_density);
}
}
- return activity;
+ return density;
}
////////////////////////////////////////////////////////////////
@@ -628,6 +626,13 @@ Power::ensureActivities()
activity_map_.clear();
seq_activity_map_.clear();
+ // Initialize default input activity (after sdc is defined)
+ // unless it has been set by command.
+ if (input_activity_.density() == 0.0) {
+ float min_period = clockMinPeriod();
+ float density = 0.1 / (min_period != 0.0 ? min_period : 0.0);
+ input_activity_.set(density, 0.5, PwrActivityOrigin::input);
+ }
ActivitySrchPred activity_srch_pred(this);
BfsFwdIterator bfs(BfsIndex::other, &activity_srch_pred, this);
seedActivities(bfs);
@@ -722,9 +727,17 @@ Power::seedRegOutputActivities(const Instance *reg,
PwrActivity activity = evalActivity(seq->data(), reg);
// Register output activity cannnot exceed one transition per clock cycle,
// but latch output can.
- if (seq->isRegister()
- && activity.activity() > 1.0)
- activity.setActivity(1.0);
+ if (seq->isRegister()) {
+ FuncExpr *clk_func = seq->clock();
+ if (clk_func->port()) {
+ const Pin *pin = network_->findPin(reg, clk_func->port());
+ const Clock *clk = findClk(pin);
+ if (clk) {
+ if (activity.density() > 1.0 / clk->period())
+ activity.setDensity(1.0 / clk->period());
+ }
+ }
+ }
if (invert)
activity.setDuty(1.0 - activity.duty());
activity.setOrigin(PwrActivityOrigin::propagated);
@@ -740,9 +753,8 @@ Power::power(const Instance *inst,
const Corner *corner)
{
PowerResult result;
- const Clock *inst_clk = findInstClk(inst);
- findInternalPower(inst, cell, corner, inst_clk, result);
- findSwitchingPower(inst, cell, corner, inst_clk, result);
+ findInternalPower(inst, cell, corner, result);
+ findSwitchingPower(inst, cell, corner, result);
findLeakagePower(inst, cell, corner, result);
return result;
}
@@ -768,7 +780,6 @@ void
Power::findInternalPower(const Instance *inst,
LibertyCell *cell,
const Corner *corner,
- const Clock *inst_clk,
// Return values.
PowerResult &result)
{
@@ -781,7 +792,7 @@ Power::findInternalPower(const Instance *inst,
float load_cap = to_port->direction()->isAnyOutput()
? graph_delay_calc_->loadCap(to_pin, dcalc_ap)
: 0.0;
- PwrActivity activity = findClkedActivity(to_pin, inst_clk);
+ PwrActivity activity = findActivity(to_pin);
if (to_port->direction()->isAnyOutput())
findOutputInternalPower(to_port, inst, cell, activity,
load_cap, corner, result);
@@ -850,18 +861,18 @@ Power::findInputInternalPower(const Pin *pin,
else
duty = evalActivity(when, inst).duty();
}
- float port_internal = energy * duty * activity.activity();
+ float port_internal = energy * duty * activity.density();
debugPrint(debug_, "power", 2, " %3s %6s %.2f %.2f %9.2e %9.2e %s",
port->name(),
when ? when->asString() : "",
- activity.activity() * 1e-9,
+ activity.density() * 1e-9,
duty,
energy,
port_internal,
related_pg_pin ? related_pg_pin : "no pg_pin");
internal += port_internal;
}
- result.internal() += internal;
+ result.incrInternal(internal);
}
}
}
@@ -879,6 +890,27 @@ Power::getSlew(Vertex *vertex,
return delayAsFloat(graph_->slew(vertex, rf, dcalc_ap->index()));
}
+float
+Power::getMinRfSlew(const Pin *pin)
+{
+ Vertex *vertex, *bidir_vertex;
+ graph_->pinVertices(pin, vertex, bidir_vertex);
+ if (vertex) {
+ const MinMax *min_max = MinMax::min();
+ Slew mm_slew = min_max->initValue();
+ for (const DcalcAnalysisPt *dcalc_ap : corners_->dcalcAnalysisPts()) {
+ DcalcAPIndex ap_index = dcalc_ap->index();
+ const Slew &slew1 = graph_->slew(vertex, RiseFall::rise(), ap_index);
+ const Slew &slew2 = graph_->slew(vertex, RiseFall::fall(), ap_index);
+ Slew slew = delayAsFloat(slew1 + slew2) / 2.0;
+ if (delayGreater(slew, mm_slew, min_max, this))
+ mm_slew = slew;
+ }
+ return mm_slew;
+ }
+ return 0.0;
+}
+
LibertyPort *
Power::findExprOutPort(FuncExpr *expr)
{
@@ -936,11 +968,11 @@ Power::findOutputInternalPower(const LibertyPort *to_port,
const LibertyPort *from_corner_port = pwr->relatedPort();
if (from_corner_port) {
const Pin *from_pin = findLinkPin(inst, from_corner_port);
- float from_activity = findActivity(from_pin).activity();
+ float from_density = findActivity(from_pin).density();
float duty = findInputDuty(inst, func, pwr);
const char *related_pg_pin = pwr->relatedPgPin();
// Note related_pg_pin may be null.
- pg_duty_sum[related_pg_pin] += from_activity * duty;
+ pg_duty_sum[related_pg_pin] += from_density * duty;
}
}
@@ -982,16 +1014,16 @@ Power::findOutputInternalPower(const LibertyPort *to_port,
if (duty_sum_iter != pg_duty_sum.end()) {
float duty_sum = duty_sum_iter->second;
if (duty_sum != 0.0 && from_pin) {
- float from_activity = findActivity(from_pin).activity();
- weight = from_activity * duty / duty_sum;
+ float from_density = findActivity(from_pin).density();
+ weight = from_density * duty / duty_sum;
}
}
- float port_internal = weight * energy * to_activity.activity();
+ float port_internal = weight * energy * to_activity.density();
debugPrint(debug_, "power", 2, "%3s -> %-3s %6s %.3f %.3f %.3f %9.2e %9.2e %s",
from_corner_port ? from_corner_port->name() : "-" ,
to_port->name(),
when ? when->asString() : "",
- to_activity.activity() * 1e-9,
+ to_activity.density() * 1e-9,
duty,
weight,
energy,
@@ -999,7 +1031,7 @@ Power::findOutputInternalPower(const LibertyPort *to_port,
related_pg_pin ? related_pg_pin : "no pg_pin");
internal += port_internal;
}
- result.internal() += internal;
+ result.incrInternal(internal);
}
float
@@ -1023,7 +1055,7 @@ Power::findInputDuty(const Instance *inst,
else if (when)
return evalActivity(when, inst).duty();
else if (search_->isClock(from_vertex))
- return 1.0;
+ return 0.5;
return 0.5;
}
}
@@ -1068,7 +1100,6 @@ void
Power::findSwitchingPower(const Instance *inst,
LibertyCell *cell,
const Corner *corner,
- const Clock *inst_clk,
// Return values.
PowerResult &result)
{
@@ -1082,17 +1113,17 @@ Power::findSwitchingPower(const Instance *inst,
float load_cap = to_port->direction()->isAnyOutput()
? graph_delay_calc_->loadCap(to_pin, dcalc_ap)
: 0.0;
- PwrActivity activity = findClkedActivity(to_pin, inst_clk);
+ PwrActivity activity = findActivity(to_pin);
if (to_port->direction()->isAnyOutput()) {
float volt = portVoltage(corner_cell, to_port, dcalc_ap);
- float switching = .5 * load_cap * volt * volt * activity.activity();
+ float switching = .5 * load_cap * volt * volt * activity.density();
debugPrint(debug_, "power", 2, "switching %s/%s activity = %.2e volt = %.2f %.3e",
cell->name(),
to_port->name(),
- activity.activity(),
+ activity.density(),
volt,
switching);
- result.switching() += switching;
+ result.incrSwitching(switching);
}
}
}
@@ -1160,34 +1191,15 @@ Power::findLeakagePower(const Instance *inst,
debugPrint(debug_, "power", 2, "leakage %s %.3e",
cell->name(),
leakage);
- result.leakage() += leakage;
+ result.incrLeakage(leakage);
}
+// External.
PwrActivity
-Power::findClkedActivity(const Pin *pin)
+Power::pinActivity(const Pin *pin)
{
- const Instance *inst = network_->instance(pin);
- const Clock *inst_clk = findInstClk(inst);
ensureActivities();
- return findClkedActivity(pin, inst_clk);
-}
-
-PwrActivity
-Power::findClkedActivity(const Pin *pin,
- const Clock *inst_clk)
-{
- PwrActivity activity = findActivity(pin);
- const Clock *clk = findClk(pin);
- if (clk == nullptr)
- clk = inst_clk;
- if (clk) {
- float period = clk->period();
- if (period > 0.0)
- return PwrActivity(activity.activity() / period,
- activity.duty(),
- activity.origin());
- }
- return activity;
+ return findActivity(pin);
}
PwrActivity
@@ -1204,7 +1216,7 @@ Power::findActivity(const Pin *pin)
}
const Clock *clk = findClk(pin);
float duty = clockDuty(clk);
- return PwrActivity(2.0, duty, PwrActivityOrigin::clock);
+ return PwrActivity(2.0 / clk->period(), duty, PwrActivityOrigin::clock);
}
else if (global_activity_.isSet())
return global_activity_;
@@ -1243,10 +1255,9 @@ Power::findSeqActivity(const Instance *inst,
return global_activity_;
else if (hasSeqActivity(inst, port)) {
PwrActivity &activity = seqActivity(inst, port);
- if (activity.origin() != PwrActivityOrigin::unknown)
- return activity;
+ return activity;
}
- return PwrActivity(0.0, 0.0, PwrActivityOrigin::unknown);
+ return PwrActivity();
}
float
@@ -1305,6 +1316,131 @@ Power::findClk(const Pin *to_pin)
////////////////////////////////////////////////////////////////
+void
+Power::reportActivityAnnotation(bool report_unannotated,
+ bool report_annotated)
+{
+ size_t vcd_count = 0;
+ size_t saif_count = 0;
+ size_t input_count = 0;
+ for (auto const& [pin, activity] : user_activity_map_) {
+ PwrActivityOrigin origin = activity.origin();
+ switch (origin) {
+ case PwrActivityOrigin::vcd:
+ vcd_count++;
+ break;
+ case PwrActivityOrigin::saif:
+ saif_count++;
+ break;
+ case PwrActivityOrigin::user:
+ input_count++;
+ break;
+ default:
+ break;
+ }
+ }
+ if (vcd_count > 0)
+ report_->reportLine("vcd %5zu", vcd_count);
+ if (saif_count > 0)
+ report_->reportLine("saif %5zu", saif_count);
+ if (input_count > 0)
+ report_->reportLine("input %5zu", input_count);
+ size_t pin_count = pinCount();
+ size_t unannotated_count = pin_count - vcd_count - saif_count - input_count;
+ report_->reportLine("unannotated %5zu", unannotated_count);
+
+ if (report_annotated) {
+ PinSeq annotated_pins;
+ for (auto const& [pin, activity] : user_activity_map_)
+ annotated_pins.push_back(pin);
+ sort(annotated_pins.begin(), annotated_pins.end(), PinPathNameLess(sdc_network_));
+ report_->reportLine("Annotated pins:");
+ for (const Pin *pin : annotated_pins) {
+ const PwrActivity &activity = user_activity_map_[pin];
+ PwrActivityOrigin origin = activity.origin();
+ const char *origin_name = pwr_activity_origin_map.find(origin);
+ report_->reportLine("%5s %s",
+ origin_name,
+ sdc_network_->pathName(pin));
+ }
+ }
+ if (report_unannotated) {
+ PinSeq unannotated_pins;
+ findUnannotatedPins(network_->topInstance(), unannotated_pins);
+ LeafInstanceIterator *inst_iter = network_->leafInstanceIterator();
+ while (inst_iter->hasNext()) {
+ const Instance *inst = inst_iter->next();
+ findUnannotatedPins(inst, unannotated_pins);
+ }
+ delete inst_iter;
+
+ sort(unannotated_pins.begin(), unannotated_pins.end(),
+ PinPathNameLess(sdc_network_));
+ report_->reportLine("Unannotated pins:");
+ for (const Pin *pin : unannotated_pins) {
+ report_->reportLine(" %s", sdc_network_->pathName(pin));
+ }
+ }
+}
+
+void
+Power::findUnannotatedPins(const Instance *inst,
+ PinSeq &unannotated_pins)
+{
+ InstancePinIterator *pin_iter = network_->pinIterator(inst);
+ while (pin_iter->hasNext()) {
+ const Pin *pin = pin_iter->next();
+ if (!network_->direction(pin)->isInternal()
+ && user_activity_map_.find(pin) == user_activity_map_.end())
+ unannotated_pins.push_back(pin);
+ }
+ delete pin_iter;
+}
+
+// leaf pins - internal pins + top instance pins
+size_t
+Power::pinCount()
+{
+ size_t count = 0;
+ LeafInstanceIterator *leaf_iter = network_->leafInstanceIterator();
+ while (leaf_iter->hasNext()) {
+ Instance *leaf = leaf_iter->next();
+ InstancePinIterator *pin_iter = network_->pinIterator(leaf);
+ while (pin_iter->hasNext()) {
+ const Pin *pin = pin_iter->next();
+ if (!network_->direction(pin)->isInternal())
+ count++;
+ }
+ delete pin_iter;
+ }
+ delete leaf_iter;
+
+ InstancePinIterator *pin_iter = network_->pinIterator(network_->topInstance());
+ while (pin_iter->hasNext()) {
+ pin_iter->next();
+ count++;
+ }
+ delete pin_iter;
+
+ return count;
+}
+
+float
+Power::clockMinPeriod()
+{
+ ClockSeq *clks = sdc_->clocks();
+ if (clks && !clks->empty()) {
+ float min_period = INF;
+ for (const Clock *clk : *clks)
+ min_period = min(min_period, clk->period());
+ return min_period;
+ }
+ else
+ return 0.0;
+}
+
+////////////////////////////////////////////////////////////////
+
PowerResult::PowerResult() :
internal_(0.0),
switching_(0.0),
@@ -1326,6 +1462,24 @@ PowerResult::total() const
return internal_ + switching_ + leakage_;
}
+void
+PowerResult::incrInternal(float pwr)
+{
+ internal_ += pwr;
+}
+
+void
+PowerResult::incrSwitching(float pwr)
+{
+ switching_ += pwr;
+}
+
+void
+PowerResult::incrLeakage(float pwr)
+{
+ leakage_ += pwr;
+}
+
void
PowerResult::incr(PowerResult &result)
{
@@ -1336,17 +1490,17 @@ PowerResult::incr(PowerResult &result)
////////////////////////////////////////////////////////////////
-PwrActivity::PwrActivity(float activity,
+PwrActivity::PwrActivity(float density,
float duty,
PwrActivityOrigin origin) :
- activity_(activity),
+ density_(density),
duty_(duty),
origin_(origin)
{
}
PwrActivity::PwrActivity() :
- activity_(0.0),
+ density_(0.0),
duty_(0.0),
origin_(PwrActivityOrigin::unknown)
{
@@ -1354,9 +1508,9 @@ PwrActivity::PwrActivity() :
}
void
-PwrActivity::setActivity(float activity)
+PwrActivity::setDensity(float density)
{
- activity_ = activity;
+ density_ = density;
}
void
@@ -1372,11 +1526,11 @@ PwrActivity::setOrigin(PwrActivityOrigin origin)
}
void
-PwrActivity::set(float activity,
+PwrActivity::set(float density,
float duty,
PwrActivityOrigin origin)
{
- activity_ = activity;
+ density_ = density;
duty_ = duty;
origin_ = origin;
check();
@@ -1385,11 +1539,11 @@ PwrActivity::set(float activity,
void
PwrActivity::check()
{
- // Activities can get very small from multiplying probabilities
+ // Densities can get very small from multiplying probabilities
// through deep chains of logic. Clip them to prevent floating
// point anomalies.
- if (abs(activity_) < min_activity)
- activity_ = 0.0;
+ if (abs(density_) < min_density)
+ density_ = 0.0;
}
bool
diff --git a/power/Power.hh b/power/Power.hh
index d638b25d..af93792b 100644
--- a/power/Power.hh
+++ b/power/Power.hh
@@ -84,15 +84,17 @@ public:
void setInputPortActivity(const Port *input_port,
float activity,
float duty);
- PwrActivity &activity(const Pin *pin);
+ PwrActivity pinActivity(const Pin *pin);
void setUserActivity(const Pin *pin,
float activity,
float duty,
PwrActivityOrigin origin);
- // Activity is toggles per second.
- PwrActivity findClkedActivity(const Pin *pin);
+ void reportActivityAnnotation(bool report_unannotated,
+ bool report_annotated);
+ float clockMinPeriod();
protected:
+ PwrActivity &activity(const Pin *pin);
bool inClockNetwork(const Instance *inst);
void powerInside(const Instance *hinst,
const Corner *corner,
@@ -110,6 +112,7 @@ protected:
bool hasActivity(const Pin *pin);
void setActivity(const Pin *pin,
PwrActivity &activity);
+ PwrActivity findActivity(const Pin *pin);
PowerResult power(const Instance *inst,
LibertyCell *cell,
@@ -117,7 +120,6 @@ protected:
void findInternalPower(const Instance *inst,
LibertyCell *cell,
const Corner *corner,
- const Clock *inst_clk,
// Return values.
PowerResult &result);
void findInputInternalPower(const Pin *to_pin,
@@ -145,18 +147,15 @@ protected:
void findSwitchingPower(const Instance *inst,
LibertyCell *cell,
const Corner *corner,
- const Clock *inst_clk,
// Return values.
PowerResult &result);
float getSlew(Vertex *vertex,
const RiseFall *rf,
const Corner *corner);
+ float getMinRfSlew(const Pin *pin);
const Clock *findInstClk(const Instance *inst);
const Clock *findClk(const Pin *to_pin);
float clockDuty(const Clock *clk);
- PwrActivity findClkedActivity(const Pin *pin,
- const Clock *inst_clk);
- PwrActivity findActivity(const Pin *pin);
PwrActivity findSeqActivity(const Instance *inst,
LibertyPort *port);
float portVoltage(LibertyCell *cell,
@@ -198,6 +197,9 @@ protected:
const Instance *inst);
float evalBddDuty(DdNode *bdd,
const Instance *inst);
+ void findUnannotatedPins(const Instance *inst,
+ PinSeq &unannotated_pins);
+ size_t pinCount();
private:
// Port/pin activities set by set_pin_activity.
diff --git a/power/Power.i b/power/Power.i
index 016365fc..e9c0ea42 100644
--- a/power/Power.i
+++ b/power/Power.i
@@ -18,9 +18,9 @@
%{
#include "Sta.hh"
+#include "Sdc.hh"
#include "power/Power.hh"
#include "power/VcdReader.hh"
-#include "power/ReadVcdActivities.hh"
#include "power/SaifReader.hh"
using namespace sta;
@@ -102,6 +102,13 @@ set_power_pin_activity(const Pin *pin,
return power->setUserActivity(pin, activity, duty, PwrActivityOrigin::user);
}
+float
+clock_min_period()
+{
+ Power *power = Sta::sta()->power();
+ return power->clockMinPeriod();
+}
+
////////////////////////////////////////////////////////////////
void
@@ -113,22 +120,6 @@ read_vcd_file(const char *filename,
readVcdActivities(filename, scope, sta);
}
-void
-report_vcd_waveforms(const char *filename)
-{
- Sta *sta = Sta::sta();
- reportVcdWaveforms(filename, sta);
-}
-
-// debugging
-void
-report_vcd_var_values(const char *filename,
- const char *var_name)
-{
- Sta *sta = Sta::sta();
- reportVcdVarValues(filename, var_name, sta);
-}
-
////////////////////////////////////////////////////////////////
bool
@@ -140,4 +131,13 @@ read_saif_file(const char *filename,
return readSaif(filename, scope, sta);
}
+void
+report_activity_annotation_cmd(bool report_unannotated,
+ bool report_annotated)
+{
+ Power *power = Sta::sta()->power();
+ power->reportActivityAnnotation(report_unannotated,
+ report_annotated);
+}
+
%} // inline
diff --git a/power/Power.tcl b/power/Power.tcl
index a8fd9cef..1c7e02fe 100644
--- a/power/Power.tcl
+++ b/power/Power.tcl
@@ -217,46 +217,67 @@ define_cmd_args "set_power_activity" { [-global]\
[-input]\
[-input_ports ports]\
[-pins pins]\
- [-activity activity]\
- [-duty duty] }
+ [-activity activity | -density density]\
+ [-duty duty]\
+ [-clock clock]}
proc set_power_activity { args } {
parse_key_args "set_power_activity" args \
- keys {-input_ports -pins -activity -duty} \
+ keys {-input_ports -pins -activity -density -duty -clock} \
flags {-global -input}
check_argc_eq0 "set_power_activity" $args
- set activity 0.0
+ if { [info exists keys(-activity)] && [info exists keys(-density)] \
+ || ![info exists keys(-activity)] && ![info exists keys(-density)] } {
+ sta_error 306 "Specify -activity or -density."
+ }
+
+ set density 0.0
if { [info exists keys(-activity)] } {
set activity $keys(-activity)
- check_float "activity" $activity
- if { $activity < 0.0 } {
- sta_warn 301 "activity should be 0.0 to 1.0 or 2.0"
+ check_positive_float "activity" $activity
+ if { [info exists keys(-clock)] } {
+ set clk [get_clock_warn "-clock" $keys(-clock)]
+ } else {
+ set clks [get_clocks]
+ if { $clks == {} } {
+ sta_error 307 "-activity requires a clock to be defined"
+ }
+ }
+ set density [expr $activity / [clock_min_period]]
+ }
+
+ if { [info exists keys(-density)] } {
+ set density $keys(-density)
+ check_positive_float "density" $density
+ set density [expr $density / [time_ui_sta 1.0]]
+ if { [info exists keys(-clock)] } {
+ sta_warn 302 "-clock ignored for -density"
}
}
set duty 0.5
if { [info exists keys(-duty)] } {
set duty $keys(-duty)
check_float "duty" $duty
- if { $duty < 0.0 || $duty > 1.0 } {
- sta_warn 302 "duty should be 0.0 to 1.0"
+ if { $duty < 0.0 || $duty > 1.0 } {i
+ sta_error 302 "duty should be 0.0 to 1.0"
}
}
if { [info exists flags(-global)] } {
- set_power_global_activity $activity $duty
+ set_power_global_activity $density $duty
}
if { [info exists flags(-input)] } {
- set_power_input_activity $activity $duty
+ set_power_input_activity $density $duty
}
if { [info exists keys(-input_ports)] } {
set ports [get_ports_error "input_ports" $keys(-input_ports)]
foreach port $ports {
if { [get_property $port "direction"] == "input" } {
- if { [sta::is_clock_src [sta::get_port_pin $port]] } {
+ if { [is_clock_src [sta::get_port_pin $port]] } {
sta_warn 303 "activity cannot be set on clock ports."
} else {
- set_power_input_port_activity $port $activity $duty
+ set_power_input_port_activity $port $density $duty
}
}
}
@@ -264,7 +285,7 @@ proc set_power_activity { args } {
if { [info exists keys(-pins)] } {
set pins [get_pins $keys(-pins)]
foreach pin $pins {
- set_power_pin_activity $pin $activity $duty
+ set_power_pin_activity $pin $density $duty
}
}
}
@@ -323,6 +344,20 @@ proc read_saif { args } {
################################################################
+define_cmd_args "report_activity_annotation" { [-report_unannotated] \
+ [-report_annotated] }
+
+proc_redirect report_activity_annotation {
+ parse_key_args "report_activity_annotation" args \
+ keys {} flags {-report_unannotated -report_annotated}
+ check_argc_eq0 "report_activity_annotation" $args
+ set report_unannotated [info exists flags(-report_unannotated)]
+ set report_annotated [info exists flags(-report_annotated)];
+ report_activity_annotation_cmd $report_unannotated $report_annotated
+}
+
+################################################################
+
proc power_find_nan { } {
set corner [cmd_corner]
foreach inst [network_leaf_instances] {
diff --git a/power/ReadVcdActivities.cc b/power/ReadVcdActivities.cc
deleted file mode 100644
index e6510c18..00000000
--- a/power/ReadVcdActivities.cc
+++ /dev/null
@@ -1,258 +0,0 @@
-// OpenSTA, Static Timing Analyzer
-// Copyright (c) 2024, Parallax Software, Inc.
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with this program. If not, see .
-
-#include "ReadVcdActivities.hh"
-
-#include
-#include
-
-#include "VcdReader.hh"
-#include "Debug.hh"
-#include "Network.hh"
-#include "VerilogNamespace.hh"
-#include "ParseBus.hh"
-#include "Sdc.hh"
-#include "Power.hh"
-#include "Sta.hh"
-
-namespace sta {
-
-using std::abs;
-using std::min;
-using std::to_string;
-
-class ReadVcdActivities : public StaState
-{
-public:
- ReadVcdActivities(const char *filename,
- const char *scope,
- Sta *sta);
- void readActivities();
-
-private:
- void setActivities();
- void setVarActivity(VcdVar *var,
- string &var_name,
- const VcdValues &var_value);
- void setVarActivity(const char *pin_name,
- const VcdValues &var_values,
- int value_bit);
- void findVarActivity(const VcdValues &var_values,
- int value_bit,
- // Return values.
- double &transition_count,
- double &activity,
- double &duty);
- void checkClkPeriod(const Pin *pin,
- double transition_count);
-
- const char *filename_;
- const char *scope_;
- Vcd vcd_;
- double clk_period_;
- Sta *sta_;
- Power *power_;
- std::set annotated_pins_;
-
- static constexpr double sim_clk_period_tolerance_ = .1;
-};
-
-void
-readVcdActivities(const char *filename,
- const char *scope,
- Sta *sta)
-{
- ReadVcdActivities reader(filename, scope, sta);
- reader.readActivities();
-}
-
-ReadVcdActivities::ReadVcdActivities(const char *filename,
- const char *scope,
- Sta *sta) :
- StaState(sta),
- filename_(filename),
- scope_(scope),
- vcd_(sta),
- clk_period_(0.0),
- sta_(sta),
- power_(sta->power())
-{
-}
-
-void
-ReadVcdActivities::readActivities()
-{
- vcd_ = readVcdFile(filename_, sta_);
-
- clk_period_ = INF;
- for (Clock *clk : *sta_->sdc()->clocks())
- clk_period_ = min(static_cast(clk->period()), clk_period_);
-
- if (vcd_.timeMax() > 0)
- setActivities();
- else
- report_->warn(1450, "VCD max time is zero.");
- report_->reportLine("Annotated %zu pin activities.", annotated_pins_.size());
-}
-
-void
-ReadVcdActivities::setActivities()
-{
- size_t scope_length = strlen(scope_);
- for (VcdVar *var : vcd_.vars()) {
- const VcdValues &var_values = vcd_.values(var);
- if (!var_values.empty()
- && (var->type() == VcdVarType::wire
- || var->type() == VcdVarType::reg)) {
- string var_name = var->name();
- // string::starts_with in c++20
- if (scope_length) {
- if (var_name.substr(0, scope_length) == scope_) {
- var_name = var_name.substr(scope_length + 1);
- setVarActivity(var, var_name, var_values);
- }
- }
- else
- setVarActivity(var, var_name, var_values);
- }
- }
-}
-
-void
-ReadVcdActivities::setVarActivity(VcdVar *var,
- string &var_name,
- const VcdValues &var_values)
-{
- if (var->width() == 1) {
- string sta_name = netVerilogToSta(var_name.c_str());
- setVarActivity(sta_name.c_str(), var_values, 0);
- }
- else {
- bool is_bus, is_range, subscript_wild;
- string bus_name;
- int from, to;
- parseBusName(var_name.c_str(), '[', ']', '\\',
- is_bus, is_range, bus_name, from, to, subscript_wild);
- if (is_bus) {
- string sta_bus_name = netVerilogToSta(bus_name.c_str());
- int value_bit = 0;
- if (to < from) {
- for (int bus_bit = to; bus_bit <= from; bus_bit++) {
- string pin_name = sta_bus_name;
- pin_name += '[';
- pin_name += to_string(bus_bit);
- pin_name += ']';
- setVarActivity(pin_name.c_str(), var_values, value_bit);
- value_bit++;
- }
- }
- else {
- for (int bus_bit = to; bus_bit >= from; bus_bit--) {
- string pin_name = sta_bus_name;
- pin_name += '[';
- pin_name += to_string(bus_bit);
- pin_name += ']';
- setVarActivity(pin_name.c_str(), var_values, value_bit);
- value_bit++;
- }
- }
- }
- else
- report_->warn(1451, "problem parsing bus %s.", var_name.c_str());
- }
-}
-
-void
-ReadVcdActivities::setVarActivity(const char *pin_name,
- const VcdValues &var_values,
- int value_bit)
-{
- const Pin *pin = sdc_network_->findPin(pin_name);
- if (pin) {
- debugPrint(debug_, "read_vcd_activities", 3, "%s values", pin_name);
- double transition_count, activity, duty;
- findVarActivity(var_values, value_bit,
- transition_count, activity, duty);
- debugPrint(debug_, "read_vcd_activities", 1,
- "%s transitions %.1f activity %.2f duty %.2f",
- pin_name,
- transition_count,
- activity,
- duty);
- if (sdc_->isLeafPinClock(pin))
- checkClkPeriod(pin, transition_count);
- power_->setUserActivity(pin, activity, duty, PwrActivityOrigin::vcd);
- annotated_pins_.insert(pin);
- }
-}
-
-void
-ReadVcdActivities::findVarActivity(const VcdValues &var_values,
- int value_bit,
- // Return values.
- double &transition_count,
- double &activity,
- double &duty)
-{
- transition_count = 0.0;
- char prev_value = var_values[0].value(value_bit);
- VcdTime prev_time = var_values[0].time();
- VcdTime high_time = 0;
- for (const VcdValue &var_value : var_values) {
- VcdTime time = var_value.time();
- char value = var_value.value(value_bit);
- debugPrint(debug_, "read_vcd_activities", 3, " %" PRId64 " %c", time, value);
- if (prev_value == '1')
- high_time += time - prev_time;
- if (value != prev_value)
- transition_count += (value == 'X'
- || value == 'Z'
- || prev_value == 'X'
- || prev_value == 'Z')
- ? .5
- : 1.0;
- prev_time = time;
- prev_value = value;
- }
- VcdTime time_max = vcd_.timeMax();
- if (prev_value == '1')
- high_time += time_max - prev_time;
- duty = static_cast(high_time) / time_max;
- activity = transition_count / (time_max * vcd_.timeScale() / clk_period_);
-}
-
-void
-ReadVcdActivities::checkClkPeriod(const Pin *pin,
- double transition_count)
-{
- VcdTime time_max = vcd_.timeMax();
- double sim_period = time_max * vcd_.timeScale() / (transition_count / 2.0);
-
- ClockSet *clks = sdc_->findLeafPinClocks(pin);
- if (clks) {
- for (Clock *clk : *clks) {
- double clk_period = clk->period();
- if (abs((clk_period - sim_period) / clk_period) > .1)
- // Warn if sim clock period differs from SDC by 10%.
- report_->warn(1452, "clock %s vcd period %s differs from SDC clock period %s",
- clk->name(),
- delayAsString(sim_period, this),
- delayAsString(clk_period, this));
- }
- }
-}
-
-}
diff --git a/power/ReadVcdActivities.hh b/power/ReadVcdActivities.hh
deleted file mode 100644
index c7a2a662..00000000
--- a/power/ReadVcdActivities.hh
+++ /dev/null
@@ -1,28 +0,0 @@
-// OpenSTA, Static Timing Analyzer
-// Copyright (c) 2024, Parallax Software, Inc.
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with this program. If not, see .
-
-#pragma once
-
-namespace sta {
-
-class Sta;
-
-void
-readVcdActivities(const char *filename,
- const char *scope,
- Sta *sta);
-
-} // namespace
diff --git a/power/SaifReader.cc b/power/SaifReader.cc
index 3dead669..0c0925f8 100644
--- a/power/SaifReader.cc
+++ b/power/SaifReader.cc
@@ -23,6 +23,7 @@
#include "Debug.hh"
#include "Report.hh"
#include "Network.hh"
+#include "PortDirection.hh"
#include "Sdc.hh"
#include "Power.hh"
#include "power/SaifReaderPvt.hh"
@@ -62,7 +63,6 @@ SaifReader::SaifReader(const char *filename,
escape_('\\'),
timescale_(1.0E-9F), // default units of ns
duration_(0.0),
- clk_period_(0.0),
in_scope_level_(0),
power_(sta->power())
{
@@ -78,10 +78,6 @@ SaifReader::read()
// Use zlib to uncompress gzip'd files automagically.
stream_ = gzopen(filename_, "rb");
if (stream_) {
- clk_period_ = INF;
- for (Clock *clk : *sdc_->clocks())
- clk_period_ = min(static_cast(clk->period()), clk_period_);
-
saif_scope_.clear();
in_scope_level_ = 0;
annotated_pins_.clear();
@@ -178,20 +174,22 @@ SaifReader::setNetDurations(const char *net_name,
if (parent) {
string unescaped_name = unescaped(net_name);
const Pin *pin = sdc_network_->findPin(parent, unescaped_name.c_str());
- if (pin) {
+ if (pin
+ && !sdc_network_->isHierarchical(pin)
+ && !sdc_network_->direction(pin)->isInternal()) {
double t1 = durations[static_cast(SaifState::T1)];
float duty = t1 / duration_;
double tc = durations[static_cast(SaifState::TC)];
- float activity = tc / (duration_ * timescale_ / clk_period_);
+ float density = tc / (duration_ * timescale_);
debugPrint(debug_, "read_saif", 2,
- "%s duty %.0f / %" PRIu64 " = %.2f tc %.0f activity %.2f",
+ "%s duty %.0f / %" PRIu64 " = %.2f tc %.0f density %.2f",
sdc_network_->pathName(pin),
t1,
duration_,
duty,
tc,
- activity);
- power_->setUserActivity(pin, activity, duty, PwrActivityOrigin::saif);
+ density);
+ power_->setUserActivity(pin, density, duty, PwrActivityOrigin::saif);
annotated_pins_.insert(pin);
}
}
diff --git a/power/SaifReaderPvt.hh b/power/SaifReaderPvt.hh
index 3662ae5a..1a40b0eb 100644
--- a/power/SaifReaderPvt.hh
+++ b/power/SaifReaderPvt.hh
@@ -96,7 +96,6 @@ private:
char escape_;
double timescale_;
int64_t duration_;
- double clk_period_;
vector saif_scope_; // Scope during parsing.
size_t in_scope_level_;
diff --git a/power/Vcd.cc b/power/Vcd.cc
deleted file mode 100644
index b04ebc8d..00000000
--- a/power/Vcd.cc
+++ /dev/null
@@ -1,213 +0,0 @@
-// OpenSTA, Static Timing Analyzer
-// Copyright (c) 2024, Parallax Software, Inc.
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with this program. If not, see .
-
-#include "Vcd.hh"
-
-#include "Report.hh"
-
-namespace sta {
-
-Vcd::Vcd(StaState *sta) :
- StaState(sta),
- time_scale_(1.0),
- time_unit_scale_(1.0),
- max_var_name_length_(0),
- max_var_width_(0),
- min_delta_time_(0),
- time_max_(0)
-{
-}
-
-Vcd::Vcd(const Vcd &vcd) :
- StaState(vcd),
- date_(vcd.date_),
- comment_(vcd.comment_),
- version_(vcd.version_),
- time_scale_(vcd.time_scale_),
- time_unit_(vcd.time_unit_),
- time_unit_scale_(vcd.time_unit_scale_),
- vars_(vcd.vars_),
- var_name_map_(vcd.var_name_map_),
- max_var_name_length_(vcd.max_var_name_length_),
- max_var_width_(vcd.max_var_width_),
- id_values_map_(vcd.id_values_map_),
- min_delta_time_(vcd.min_delta_time_),
- time_max_(vcd.time_max_)
-{
-}
-
-Vcd&
-Vcd::operator=(Vcd &&vcd1)
-{
- date_ = vcd1.date_;
- comment_ = vcd1.comment_;
- version_ = vcd1.version_;
- time_scale_ = vcd1.time_scale_;
- time_unit_ = vcd1.time_unit_;
- time_unit_scale_ = vcd1.time_unit_scale_;
- vars_ = vcd1.vars_;
- var_name_map_ = vcd1.var_name_map_;
- max_var_name_length_ = vcd1.max_var_name_length_;
- max_var_width_ = vcd1.max_var_width_;
- id_values_map_ = vcd1.id_values_map_;
- min_delta_time_ = vcd1.min_delta_time_;
- time_max_ = vcd1.time_max_;
-
- vcd1.vars_.clear();
- return *this;
-}
-
-Vcd::~Vcd()
-{
- for (VcdVar *var : vars_)
- delete var;
-}
-
-void
-Vcd::setTimeUnit(const string &time_unit,
- double time_unit_scale)
-{
- time_unit_ = time_unit;
- time_unit_scale_ = time_unit_scale;
-}
-
-void
-Vcd::setDate(const string &date)
-{
- date_ = date;
-}
-
-void
-Vcd::setComment(const string &comment)
-{
- comment_ = comment;
-}
-
-void
-Vcd::setVersion(const string &version)
-{
- version_ = version;
-}
-
-void
-Vcd::setTimeScale(double time_scale)
-{
- time_scale_ = time_scale;
-}
-
-void
-Vcd::setMinDeltaTime(VcdTime min_delta_time)
-{
- min_delta_time_ = min_delta_time;
-}
-
-void
-Vcd::setTimeMax(VcdTime time_max)
-{
- time_max_ = time_max;
-}
-
-void
-Vcd::makeVar(string &name,
- VcdVarType type,
- int width,
- string &id)
-{
- VcdVar *var = new VcdVar(name, type, width, id);
- vars_.push_back(var);
- var_name_map_[name] = var;
- max_var_name_length_ = std::max(max_var_name_length_, name.size());
- max_var_width_ = std::max(max_var_width_, width);
- // Make entry for var ID.
- id_values_map_[id].clear();
-}
-
-VcdVar *
-Vcd::var(const string name)
-{
- return var_name_map_[name];
-}
-
-bool
-Vcd::varIdValid(string &id)
-{
- return id_values_map_.find(id) != id_values_map_.end();
-}
-
-void
-Vcd::varAppendValue(string &id,
- VcdTime time,
- char value)
-{
- VcdValues &values = id_values_map_[id];
- values.emplace_back(time, value, 0);
-}
-
-void
-Vcd::varAppendBusValue(string &id,
- VcdTime time,
- int64_t bus_value)
-{
- VcdValues &values = id_values_map_[id];
- values.emplace_back(time, '\0', bus_value);
-}
-
-VcdValues &
-Vcd::values(VcdVar *var)
-{
- if (id_values_map_.find(var->id()) == id_values_map_.end()) {
- report_->error(1360, "Unknown variable %s ID %s",
- var->name().c_str(),
- var->id().c_str());
- static VcdValues empty;
- return empty;
- }
- else
- return id_values_map_[var->id()];
-}
-
-////////////////////////////////////////////////////////////////
-
-VcdVar::VcdVar(string name,
- VcdVarType type,
- int width,
- string id) :
- name_(name),
- type_(type),
- width_(width),
- id_(id)
-{
-}
-
-VcdValue::VcdValue(VcdTime time,
- char value,
- uint64_t bus_value) :
- time_(time),
- value_(value),
- bus_value_(bus_value)
-{
-}
-
-char
-VcdValue::value(int value_bit) const
-{
- if (value_ == '\0')
- return ((bus_value_ >> value_bit) & 0x1) ? '1' : '0';
- else
- return value_;
-}
-
-}
diff --git a/power/Vcd.hh b/power/Vcd.hh
deleted file mode 100644
index 6c62eca6..00000000
--- a/power/Vcd.hh
+++ /dev/null
@@ -1,158 +0,0 @@
-// OpenSTA, Static Timing Analyzer
-// Copyright (c) 2024, Parallax Software, Inc.
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with this program. If not, see .
-
-#pragma once
-
-#include
-#include
-#include
-#include