diff --git a/search/Sta.cc b/search/Sta.cc
index e159c7be..19f3d994 100644
--- a/search/Sta.cc
+++ b/search/Sta.cc
@@ -4407,9 +4407,15 @@ Sta::makeNet(const char *name,
 {
   NetworkEdit *network = networkCmdEdit();
   std::string escaped = escapeBrackets(name, network);
-  Net *net = network->makeNet(escaped, parent);
-  // Sta notification unnecessary.
-  return net;
+  if (network->findNet(parent, escaped)) {
+    report_->warn(1557, "net {} already exists.", name);
+    return nullptr;
+  }
+  else {
+    Net *net = network->makeNet(escaped, parent);
+    // Sta notification unnecessary.
+    return net;
+  }
 }
 
 void
diff --git a/verilog/VerilogReader.cc b/verilog/VerilogReader.cc
index 5c6cd0f9..f3a0899d 100644
--- a/verilog/VerilogReader.cc
+++ b/verilog/VerilogReader.cc
@@ -1468,8 +1468,7 @@ VerilogReader::linkNetwork(std::string_view top_cell_name,
         while (net_name_iter->hasNext()) {
           const std::string &net_name = net_name_iter->next();
           Port *port = network_->findPort(top_cell, net_name);
-          Net *net =
-              bindings.ensureNetBinding(net_name, top_instance, network_);
+          Net *net = bindings.ensureNetBinding(net_name, top_instance, network_);
           // Guard against repeated port name.
           if (network_->findPin(top_instance, port) == nullptr) {
             Pin *pin = network_->makePin(top_instance, port, nullptr);
@@ -1521,13 +1520,11 @@ VerilogReader::makeModuleInstBody(VerilogModule *module,
         if (assign)
           mergeAssignNet(assign, module, inst, bindings);
         if (dir->isGround()) {
-          Net *net =
-              bindings->ensureNetBinding(arg->netName(), inst, network_);
+          Net *net = bindings->ensureNetBinding(arg->netName(), inst, network_);
           network_->addConstantNet(net, LogicValue::zero);
         }
         if (dir->isPower()) {
-          Net *net =
-              bindings->ensureNetBinding(arg->netName(), inst, network_);
+          Net *net = bindings->ensureNetBinding(arg->netName(), inst, network_);
           network_->addConstantNet(net, LogicValue::one);
         }
       }