From 28d94b83faf9bf77826d3c7e85e36f80561a5640 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Sun, 8 Mar 2026 15:55:12 -0700 Subject: [PATCH] StdStringSet -> StringSet Signed-off-by: James Cherry --- include/sta/PathGroup.hh | 4 ++-- include/sta/StringUtil.hh | 2 +- include/sta/TclTypeHelpers.hh | 2 +- include/sta/VerilogReader.hh | 2 +- search/PathGroup.cc | 6 +++--- search/Sta.cc | 2 +- spice/WritePathSpice.cc | 10 +++++----- spice/WriteSpice.cc | 4 ++-- spice/WriteSpice.hh | 4 ++-- tcl/StaTclTypes.i | 4 ++-- tcl/TclTypeHelpers.cc | 4 ++-- verilog/VerilogReader.cc | 8 ++++---- verilog/VerilogReaderPvt.hh | 2 +- 13 files changed, 27 insertions(+), 27 deletions(-) diff --git a/include/sta/PathGroup.hh b/include/sta/PathGroup.hh index df0c5ca7..4d6d90dd 100644 --- a/include/sta/PathGroup.hh +++ b/include/sta/PathGroup.hh @@ -184,14 +184,14 @@ protected: bool unique_edges, float slack_min, float slack_max, - StdStringSet &group_names, + StringSet &group_names, bool setup_hold, bool async, bool gated_clk, bool unconstrained, const MinMax *min_max); bool reportGroup(const char *group_name, - StdStringSet &group_names) const; + StringSet &group_names) const; static GroupPath *groupPathTo(const PathEnd *path_end, const StaState *sta); StringSeq pathGroupNames(); diff --git a/include/sta/StringUtil.hh b/include/sta/StringUtil.hh index d237e9c3..b12ae00d 100644 --- a/include/sta/StringUtil.hh +++ b/include/sta/StringUtil.hh @@ -35,7 +35,7 @@ namespace sta { using StringSeq = std::vector; -using StdStringSet = std::set; +using StringSet = std::set; inline bool stringEq(const char *str1, diff --git a/include/sta/TclTypeHelpers.hh b/include/sta/TclTypeHelpers.hh index 08aa291b..a551c584 100644 --- a/include/sta/TclTypeHelpers.hh +++ b/include/sta/TclTypeHelpers.hh @@ -39,7 +39,7 @@ tclListSeqStdString(Tcl_Obj *const source, StringSeq * tclListSeqStdStringPtr(Tcl_Obj *const source, Tcl_Interp *interp); -StdStringSet * +StringSet * tclListSetStdString(Tcl_Obj *const source, Tcl_Interp *interp); diff --git a/include/sta/VerilogReader.hh b/include/sta/VerilogReader.hh index cf1dab95..e3aa94fa 100644 --- a/include/sta/VerilogReader.hh +++ b/include/sta/VerilogReader.hh @@ -173,7 +173,7 @@ protected: void makeNamedPortRefCellPorts(Cell *cell, VerilogModule *module, VerilogNet *mod_port, - StdStringSet &port_names); + StringSet &port_names); void checkModuleDcls(VerilogModule *module, std::set &port_names); void makeModuleInstBody(VerilogModule *module, diff --git a/search/PathGroup.cc b/search/PathGroup.cc index 5f4ce29a..794d2c6e 100644 --- a/search/PathGroup.cc +++ b/search/PathGroup.cc @@ -276,7 +276,7 @@ PathGroups::PathGroups(int group_path_count, slack_min_(slack_min), slack_max_(slack_max) { - StdStringSet groups; + StringSet groups; for (std::string &group_name : group_names) groups.insert(group_name); @@ -297,7 +297,7 @@ PathGroups::makeGroups(int group_path_count, bool unique_edges, float slack_min, float slack_max, - StdStringSet &group_names, + StringSet &group_names, bool setup_hold, bool async, bool gated_clk, @@ -417,7 +417,7 @@ PathGroups::findPathGroup(const Clock *clock, bool PathGroups::reportGroup(const char *group_name, - StdStringSet &group_names) const + StringSet &group_names) const { return group_names.empty() || group_names.contains(group_name); diff --git a/search/Sta.cc b/search/Sta.cc index f9134175..a6c43071 100644 --- a/search/Sta.cc +++ b/search/Sta.cc @@ -2601,7 +2601,7 @@ Sta::updateSceneLiberty(Scene *scene, const StringSeq &liberty_min_files, const StringSeq &liberty_max_files) { - StdStringSet warned_files; + StringSet warned_files; for (const MinMax *min_max : MinMax::range()) { const StringSeq &liberty_files = min_max == MinMax::min() ? liberty_min_files diff --git a/spice/WritePathSpice.cc b/spice/WritePathSpice.cc index 77a11723..6c7034be 100644 --- a/spice/WritePathSpice.cc +++ b/spice/WritePathSpice.cc @@ -80,8 +80,8 @@ private: void writeGateStage(Stage stage); void writeStageParasitics(Stage stage); void writeSubckts(); - StdStringSet findPathCellNames(); - void findPathCellSubckts(StdStringSet &path_cell_names); + StringSet findPathCellNames(); + void findPathCellSubckts(StringSet &path_cell_names); float maxTime(); float pathMaxTime(); void writeMeasureDelayStmt(Stage stage, @@ -562,14 +562,14 @@ WritePathSpice::writeStageParasitics(Stage stage) void WritePathSpice::writeSubckts() { - StdStringSet cell_names = findPathCellNames(); + StringSet cell_names = findPathCellNames(); writeSubckts(cell_names); } -StdStringSet +StringSet WritePathSpice::findPathCellNames() { - StdStringSet path_cell_names; + StringSet path_cell_names; for (Stage stage = stageFirst(); stage <= stageLast(); stage++) { const TimingArc *arc = stageGateArc(stage); if (arc) { diff --git a/spice/WriteSpice.cc b/spice/WriteSpice.cc index 7d8c7ab8..1e5cfb12 100644 --- a/spice/WriteSpice.cc +++ b/spice/WriteSpice.cc @@ -199,7 +199,7 @@ WriteSpice::writeGnuplotFile(StringSeq &node_nanes) } void -WriteSpice::writeSubckts(StdStringSet &cell_names) +WriteSpice::writeSubckts(StringSet &cell_names) { findCellSubckts(cell_names); std::ifstream lib_subckts_stream(lib_subckt_filename_); @@ -278,7 +278,7 @@ WriteSpice::recordSpicePortNames(const char *cell_name, // Subckts can call subckts (asap7). void -WriteSpice::findCellSubckts(StdStringSet &cell_names) +WriteSpice::findCellSubckts(StringSet &cell_names) { std::ifstream lib_subckts_stream(lib_subckt_filename_); if (lib_subckts_stream.is_open()) { diff --git a/spice/WriteSpice.hh b/spice/WriteSpice.hh index f28513a8..b728d154 100644 --- a/spice/WriteSpice.hh +++ b/spice/WriteSpice.hh @@ -65,8 +65,8 @@ protected: float time_step); void writePrintStmt(StringSeq &node_names); void writeGnuplotFile(StringSeq &node_nanes); - void writeSubckts(StdStringSet &cell_names); - void findCellSubckts(StdStringSet &cell_names); + void writeSubckts(StringSet &cell_names); + void findCellSubckts(StringSet &cell_names); void recordSpicePortNames(const char *cell_name, StringSeq &tokens); void writeSubcktInst(const Instance *inst); diff --git a/tcl/StaTclTypes.i b/tcl/StaTclTypes.i index ec6ed2d5..f8de82fd 100644 --- a/tcl/StaTclTypes.i +++ b/tcl/StaTclTypes.i @@ -290,7 +290,7 @@ using namespace sta; Tcl_SetResult(interp, nullptr, TCL_STATIC); } -%typemap(in) StdStringSet* { +%typemap(in) StringSet* { $1 = tclListSetStdString($input, interp); } @@ -307,7 +307,7 @@ using namespace sta; $1 = tclListSeqStdStringPtr($input, interp); } -%typemap(in) StdStringSet* { +%typemap(in) StringSet* { $1 = tclListSetStdString($input, interp); } diff --git a/tcl/TclTypeHelpers.cc b/tcl/TclTypeHelpers.cc index 733b0b41..48104690 100644 --- a/tcl/TclTypeHelpers.cc +++ b/tcl/TclTypeHelpers.cc @@ -68,7 +68,7 @@ tclListSeqStdStringPtr(Tcl_Obj *const source, return nullptr; } -StdStringSet * +StringSet * tclListSetStdString(Tcl_Obj *const source, Tcl_Interp *interp) { @@ -76,7 +76,7 @@ tclListSetStdString(Tcl_Obj *const source, Tcl_Obj **argv; if (Tcl_ListObjGetElements(interp, source, &argc, &argv) == TCL_OK) { - StdStringSet *set = new StdStringSet; + StringSet *set = new StringSet; for (int i = 0; i < argc; i++) { int length; const char *str = Tcl_GetStringFromObj(argv[i], &length); diff --git a/verilog/VerilogReader.cc b/verilog/VerilogReader.cc index 334633da..de6099a5 100644 --- a/verilog/VerilogReader.cc +++ b/verilog/VerilogReader.cc @@ -285,7 +285,7 @@ VerilogReader::makeCellPorts(Cell *cell, VerilogModule *module, VerilogNetSeq *ports) { - StdStringSet port_names; + StringSet port_names; for (VerilogNet *mod_port : *ports) { const std::string &port_name = mod_port->name(); if (!port_names.contains(port_name)) { @@ -335,7 +335,7 @@ void VerilogReader::makeNamedPortRefCellPorts(Cell *cell, VerilogModule *module, VerilogNet *mod_port, - StdStringSet &port_names) + StringSet &port_names) { PortSeq *member_ports = new PortSeq; VerilogNetNameIterator *net_name_iter = mod_port->nameIterator(module,this); @@ -805,7 +805,7 @@ VerilogModule::~VerilogModule() void VerilogModule::parseStmts(VerilogReader *reader) { - StdStringSet inst_names; + StringSet inst_names; for (VerilogStmt *stmt : *stmts_) { if (stmt->isDeclaration()) parseDcl(dynamic_cast(stmt), reader); @@ -861,7 +861,7 @@ VerilogModule::parseDcl(VerilogDcl *dcl, // expansion so errors are only reported once. void VerilogModule::checkInstanceName(VerilogInst *inst, - StdStringSet &inst_names, + StringSet &inst_names, VerilogReader *reader) { std::string inst_name = inst->instanceName(); diff --git a/verilog/VerilogReaderPvt.hh b/verilog/VerilogReaderPvt.hh index 59c242e6..23f24305 100644 --- a/verilog/VerilogReaderPvt.hh +++ b/verilog/VerilogReaderPvt.hh @@ -75,7 +75,7 @@ public: private: void parseStmts(VerilogReader *reader); void checkInstanceName(VerilogInst *inst, - StdStringSet &inst_names, + StringSet &inst_names, VerilogReader *reader); std::string name_;