diff --git a/CMakeLists.txt b/CMakeLists.txt
index 222bbedf..519ec137 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -506,7 +506,7 @@ target_include_directories(OpenSTA
   )
 
 # common to gcc/clang
-set(CXX_FLAGS -Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security)
+set(CXX_FLAGS -Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security -Wp)
 
 target_compile_options(OpenSTA
   PRIVATE
diff --git a/dcalc/LumpedCapDelayCalc.cc b/dcalc/LumpedCapDelayCalc.cc
index 93b7530e..bb748a82 100644
--- a/dcalc/LumpedCapDelayCalc.cc
+++ b/dcalc/LumpedCapDelayCalc.cc
@@ -165,7 +165,7 @@ LumpedCapDelayCalc::gateDelay(const LibertyCell *drvr_cell,
     Slew drvr_slew1;
     float in_slew1 = delayAsFloat(in_slew);
     // NaNs cause seg faults during table lookup.
-    if (isnan(load_cap) || isnan(related_out_cap) || isnan(in_slew))
+    if (isnan(load_cap) || isnan(related_out_cap) || isnan(delayAsFloat(in_slew)))
       report_->error(710, "gate delay input variable is NaN");
     model->gateDelay(drvr_cell, pvt, in_slew1, load_cap, related_out_cap,
 		     pocv_enabled_, gate_delay1, drvr_slew1);
diff --git a/search/MakeTimingModel.cc b/search/MakeTimingModel.cc
index 68cb1ab4..e36c87c3 100644
--- a/search/MakeTimingModel.cc
+++ b/search/MakeTimingModel.cc
@@ -558,13 +558,14 @@ MakeTimingModel::makeGateModelTable(const Pin *output_pin,
             Slew in_slew = graph_->slew(gate_in_vertex,
                                         drvr_arc->fromEdge()->asRiseFall(),
                                         dcalc_ap->index());
+            float in_slew1 = delayAsFloat(in_slew);
             TimingModel *drvr_model = drvr_arc->cornerArc(lib_index)->model(op_cond);
             GateTableModel *drvr_gate_model = dynamic_cast<GateTableModel*>(drvr_model);
             if (drvr_gate_model) {
               float output_load_cap = graph_delay_calc_->loadCap(output_pin, dcalc_ap);
               ArcDelay drvr_self_delay;
               Slew drvr_self_slew;
-              drvr_gate_model->gateDelay(drvr_cell, pvt, in_slew,
+              drvr_gate_model->gateDelay(drvr_cell, pvt, in_slew1,
                                          output_load_cap, 0.0, false,
                                          drvr_self_delay, drvr_self_slew);
 
@@ -579,12 +580,13 @@ MakeTimingModel::makeGateModelTable(const Pin *output_pin,
                   // get slew from driver input pin
                   ArcDelay gate_delay;
                   Slew gate_slew;
-                  drvr_gate_model->gateDelay(drvr_cell, pvt, in_slew,
+                  drvr_gate_model->gateDelay(drvr_cell, pvt, in_slew1,
                                              load_cap, 0.0, false,
                                              gate_delay, gate_slew);
                   // Remove the self delay driving the output pin net load cap.
-                  load_values->push_back(delay + gate_delay - drvr_self_delay);
-                  slew_values->push_back(gate_slew);
+                  load_values->push_back(delayAsFloat(delay + gate_delay
+                                                      - drvr_self_delay));
+                  slew_values->push_back(delayAsFloat(gate_slew));
                 }
 
                 FloatSeq *axis_values = new FloatSeq(*drvr_axis_values);
diff --git a/search/Sta.cc b/search/Sta.cc
index 10d0c245..10eb408b 100644
--- a/search/Sta.cc
+++ b/search/Sta.cc
@@ -2657,7 +2657,7 @@ Sta::endpointViolationCount(const MinMax *min_max)
 {
   int violations = 0;
   for (Vertex *end : *search_->endpoints()) {
-    if (vertexSlack(end, min_max) < 0.0)
+    if (delayLess(vertexSlack(end, min_max), 0.0, this))
       violations++;
   }
   return violations;
@@ -2815,7 +2815,8 @@ Sta::pinArrival(const Pin *pin,
   if (bidirect_vertex) {
     Arrival arrival1 = vertexArrival(bidirect_vertex, rf, clk_edge_wildcard,
                                      nullptr, min_max);
-    arrival = min_max->minMax(arrival, arrival1);
+    if (delayLess(arrival1, arrival, this))
+      arrival = arrival1;
   }
   return arrival;
 }