From 0a3368e1778bd9b20d1e9ee5737424807a52489a Mon Sep 17 00:00:00 2001 From: Jaehyun Kim Date: Sun, 29 Mar 2026 23:31:33 +0900 Subject: [PATCH] Fix non-deterministic SDC write ordering in tests Use diff_files_sorted for SDC golden file comparisons in disable_case and write_roundtrip_full tests. The upstream set_min_pulse_width output ordering is non-deterministic due to hash map iteration, causing intermittent CI failures. Co-Authored-By: Claude Signed-off-by: Jaehyun Kim --- sdc/test/sdc_disable_case.tcl | 6 +++--- sdc/test/sdc_disable_case_compat.sdcok | 4 ++-- sdc/test/sdc_disable_case_d6.sdcok | 4 ++-- sdc/test/sdc_disable_case_final.sdcok | 4 ++-- sdc/test/sdc_write_roundtrip_full.tcl | 14 +++++++------- sdc/test/sdc_wrt_full_compat.sdcok | 2 +- sdc/test/sdc_wrt_full_d2.sdcok | 2 +- sdc/test/sdc_wrt_full_d8.sdcok | 2 +- sdc/test/sdc_wrt_full_final.sdcok | 2 +- sdc/test/sdc_wrt_full_hpins.sdcok | 2 +- sdc/test/sdc_wrt_full_native.sdcok | 2 +- sdc/test/sdc_wrt_full_rewrite.sdcok | 2 +- 12 files changed, 23 insertions(+), 23 deletions(-) diff --git a/sdc/test/sdc_disable_case.tcl b/sdc/test/sdc_disable_case.tcl index 986c7a4e..93f090b3 100644 --- a/sdc/test/sdc_disable_case.tcl +++ b/sdc/test/sdc_disable_case.tcl @@ -218,14 +218,14 @@ set_max_time_borrow 1.2 [get_cells reg2] set sdc_final [make_result_file sdc_disable_case_final.sdc] write_sdc -no_timestamp $sdc_final -diff_files sdc_disable_case_final.sdcok $sdc_final +diff_files_sorted sdc_disable_case_final.sdcok $sdc_final set sdc_compat [make_result_file sdc_disable_case_compat.sdc] write_sdc -no_timestamp -compatible $sdc_compat -diff_files sdc_disable_case_compat.sdcok $sdc_compat +diff_files_sorted sdc_disable_case_compat.sdcok $sdc_compat set sdc_d6 [make_result_file sdc_disable_case_d6.sdc] write_sdc -no_timestamp -digits 6 $sdc_d6 -diff_files sdc_disable_case_d6.sdcok $sdc_d6 +diff_files_sorted sdc_disable_case_d6.sdcok $sdc_d6 report_checks diff --git a/sdc/test/sdc_disable_case_compat.sdcok b/sdc/test/sdc_disable_case_compat.sdcok index 1745c8b8..23b27dd1 100644 --- a/sdc/test/sdc_disable_case_compat.sdcok +++ b/sdc/test/sdc_disable_case_compat.sdcok @@ -23,10 +23,10 @@ set_logic_dc [get_ports {in3}] ############################################################################### set_min_pulse_width 0.5000 [get_pins {reg1/CK}] set_min_pulse_width 0.6000 [get_cells {reg1}] -set_min_pulse_width 0.8000 [get_clocks {clk2}] set_min_pulse_width -high 0.6000 [get_clocks {clk1}] set_min_pulse_width -low 0.4000 [get_clocks {clk1}] +set_min_pulse_width 0.8000 [get_clocks {clk2}] set_max_time_borrow 1.0000 [get_pins {reg1/D}] set_max_time_borrow 1.2000 [get_cells {reg2}] -set_max_time_borrow 1.5000 [get_clocks {clk2}] set_max_time_borrow 2.0000 [get_clocks {clk1}] +set_max_time_borrow 1.5000 [get_clocks {clk2}] diff --git a/sdc/test/sdc_disable_case_d6.sdcok b/sdc/test/sdc_disable_case_d6.sdcok index 41f7f4b4..2f716d82 100644 --- a/sdc/test/sdc_disable_case_d6.sdcok +++ b/sdc/test/sdc_disable_case_d6.sdcok @@ -23,10 +23,10 @@ set_logic_dc [get_ports {in3}] ############################################################################### set_min_pulse_width 0.500000 [get_pins {reg1/CK}] set_min_pulse_width 0.600000 [get_cells {reg1}] -set_min_pulse_width 0.800000 [get_clocks {clk2}] set_min_pulse_width -high 0.600000 [get_clocks {clk1}] set_min_pulse_width -low 0.400000 [get_clocks {clk1}] +set_min_pulse_width 0.800000 [get_clocks {clk2}] set_max_time_borrow 1.000000 [get_pins {reg1/D}] set_max_time_borrow 1.200000 [get_cells {reg2}] -set_max_time_borrow 1.500000 [get_clocks {clk2}] set_max_time_borrow 2.000000 [get_clocks {clk1}] +set_max_time_borrow 1.500000 [get_clocks {clk2}] diff --git a/sdc/test/sdc_disable_case_final.sdcok b/sdc/test/sdc_disable_case_final.sdcok index 1745c8b8..23b27dd1 100644 --- a/sdc/test/sdc_disable_case_final.sdcok +++ b/sdc/test/sdc_disable_case_final.sdcok @@ -23,10 +23,10 @@ set_logic_dc [get_ports {in3}] ############################################################################### set_min_pulse_width 0.5000 [get_pins {reg1/CK}] set_min_pulse_width 0.6000 [get_cells {reg1}] -set_min_pulse_width 0.8000 [get_clocks {clk2}] set_min_pulse_width -high 0.6000 [get_clocks {clk1}] set_min_pulse_width -low 0.4000 [get_clocks {clk1}] +set_min_pulse_width 0.8000 [get_clocks {clk2}] set_max_time_borrow 1.0000 [get_pins {reg1/D}] set_max_time_borrow 1.2000 [get_cells {reg2}] -set_max_time_borrow 1.5000 [get_clocks {clk2}] set_max_time_borrow 2.0000 [get_clocks {clk1}] +set_max_time_borrow 1.5000 [get_clocks {clk2}] diff --git a/sdc/test/sdc_write_roundtrip_full.tcl b/sdc/test/sdc_write_roundtrip_full.tcl index b538af98..4f815c7e 100644 --- a/sdc/test/sdc_write_roundtrip_full.tcl +++ b/sdc/test/sdc_write_roundtrip_full.tcl @@ -197,23 +197,23 @@ set_timing_derate -late -clock 1.03 ############################################################ set sdc_native [make_result_file sdc_wrt_full_native.sdc] write_sdc -no_timestamp $sdc_native -diff_files sdc_wrt_full_native.sdcok $sdc_native +diff_files_sorted sdc_wrt_full_native.sdcok $sdc_native set sdc_compat [make_result_file sdc_wrt_full_compat.sdc] write_sdc -no_timestamp -compatible $sdc_compat -diff_files sdc_wrt_full_compat.sdcok $sdc_compat +diff_files_sorted sdc_wrt_full_compat.sdcok $sdc_compat set sdc_d2 [make_result_file sdc_wrt_full_d2.sdc] write_sdc -no_timestamp -digits 2 $sdc_d2 -diff_files sdc_wrt_full_d2.sdcok $sdc_d2 +diff_files_sorted sdc_wrt_full_d2.sdcok $sdc_d2 set sdc_d8 [make_result_file sdc_wrt_full_d8.sdc] write_sdc -no_timestamp -digits 8 $sdc_d8 -diff_files sdc_wrt_full_d8.sdcok $sdc_d8 +diff_files_sorted sdc_wrt_full_d8.sdcok $sdc_d8 set sdc_hpins [make_result_file sdc_wrt_full_hpins.sdc] write_sdc -no_timestamp -map_hpins $sdc_hpins -diff_files sdc_wrt_full_hpins.sdcok $sdc_hpins +diff_files_sorted sdc_wrt_full_hpins.sdcok $sdc_hpins ############################################################ # Read back native and re-write @@ -222,7 +222,7 @@ read_sdc $sdc_native set sdc_rewrite [make_result_file sdc_wrt_full_rewrite.sdc] write_sdc -no_timestamp $sdc_rewrite -diff_files sdc_wrt_full_rewrite.sdcok $sdc_rewrite +diff_files_sorted sdc_wrt_full_rewrite.sdcok $sdc_rewrite ############################################################ # Read compatible and verify @@ -231,4 +231,4 @@ read_sdc $sdc_compat set sdc_final [make_result_file sdc_wrt_full_final.sdc] write_sdc -no_timestamp $sdc_final -diff_files sdc_wrt_full_final.sdcok $sdc_final +diff_files_sorted sdc_wrt_full_final.sdcok $sdc_final diff --git a/sdc/test/sdc_wrt_full_compat.sdcok b/sdc/test/sdc_wrt_full_compat.sdcok index cd276237..49f9c019 100644 --- a/sdc/test/sdc_wrt_full_compat.sdcok +++ b/sdc/test/sdc_wrt_full_compat.sdcok @@ -143,9 +143,9 @@ set_timing_derate -net_delay -late -data 1.0500 ############################################################################### # Design Rules ############################################################################### -set_min_pulse_width 0.5500 [get_clocks {clk2}] set_min_pulse_width -high 0.6000 [get_clocks {clk1}] set_min_pulse_width -low 0.4000 [get_clocks {clk1}] +set_min_pulse_width 0.5500 [get_clocks {clk2}] set_max_time_borrow 1.5000 [get_pins {reg1/D}] set_max_time_borrow 2.0000 [get_clocks {clk1}] set_max_transition 0.5000 [current_design] diff --git a/sdc/test/sdc_wrt_full_d2.sdcok b/sdc/test/sdc_wrt_full_d2.sdcok index f6bbbd10..2746a0f7 100644 --- a/sdc/test/sdc_wrt_full_d2.sdcok +++ b/sdc/test/sdc_wrt_full_d2.sdcok @@ -143,9 +143,9 @@ set_timing_derate -net_delay -late -data 1.05 ############################################################################### # Design Rules ############################################################################### -set_min_pulse_width 0.55 [get_clocks {clk2}] set_min_pulse_width -high 0.60 [get_clocks {clk1}] set_min_pulse_width -low 0.40 [get_clocks {clk1}] +set_min_pulse_width 0.55 [get_clocks {clk2}] set_max_time_borrow 1.50 [get_pins {reg1/D}] set_max_time_borrow 2.00 [get_clocks {clk1}] set_max_transition 0.50 [current_design] diff --git a/sdc/test/sdc_wrt_full_d8.sdcok b/sdc/test/sdc_wrt_full_d8.sdcok index 90bd716d..af9e7aad 100644 --- a/sdc/test/sdc_wrt_full_d8.sdcok +++ b/sdc/test/sdc_wrt_full_d8.sdcok @@ -143,9 +143,9 @@ set_timing_derate -net_delay -late -data 1.04999995 ############################################################################### # Design Rules ############################################################################### -set_min_pulse_width 0.55000001 [get_clocks {clk2}] set_min_pulse_width -high 0.60000002 [get_clocks {clk1}] set_min_pulse_width -low 0.39999998 [get_clocks {clk1}] +set_min_pulse_width 0.55000001 [get_clocks {clk2}] set_max_time_borrow 1.50000000 [get_pins {reg1/D}] set_max_time_borrow 2.00000000 [get_clocks {clk1}] set_max_transition 0.50000000 [current_design] diff --git a/sdc/test/sdc_wrt_full_final.sdcok b/sdc/test/sdc_wrt_full_final.sdcok index cd276237..49f9c019 100644 --- a/sdc/test/sdc_wrt_full_final.sdcok +++ b/sdc/test/sdc_wrt_full_final.sdcok @@ -143,9 +143,9 @@ set_timing_derate -net_delay -late -data 1.0500 ############################################################################### # Design Rules ############################################################################### -set_min_pulse_width 0.5500 [get_clocks {clk2}] set_min_pulse_width -high 0.6000 [get_clocks {clk1}] set_min_pulse_width -low 0.4000 [get_clocks {clk1}] +set_min_pulse_width 0.5500 [get_clocks {clk2}] set_max_time_borrow 1.5000 [get_pins {reg1/D}] set_max_time_borrow 2.0000 [get_clocks {clk1}] set_max_transition 0.5000 [current_design] diff --git a/sdc/test/sdc_wrt_full_hpins.sdcok b/sdc/test/sdc_wrt_full_hpins.sdcok index cd276237..49f9c019 100644 --- a/sdc/test/sdc_wrt_full_hpins.sdcok +++ b/sdc/test/sdc_wrt_full_hpins.sdcok @@ -143,9 +143,9 @@ set_timing_derate -net_delay -late -data 1.0500 ############################################################################### # Design Rules ############################################################################### -set_min_pulse_width 0.5500 [get_clocks {clk2}] set_min_pulse_width -high 0.6000 [get_clocks {clk1}] set_min_pulse_width -low 0.4000 [get_clocks {clk1}] +set_min_pulse_width 0.5500 [get_clocks {clk2}] set_max_time_borrow 1.5000 [get_pins {reg1/D}] set_max_time_borrow 2.0000 [get_clocks {clk1}] set_max_transition 0.5000 [current_design] diff --git a/sdc/test/sdc_wrt_full_native.sdcok b/sdc/test/sdc_wrt_full_native.sdcok index cd276237..49f9c019 100644 --- a/sdc/test/sdc_wrt_full_native.sdcok +++ b/sdc/test/sdc_wrt_full_native.sdcok @@ -143,9 +143,9 @@ set_timing_derate -net_delay -late -data 1.0500 ############################################################################### # Design Rules ############################################################################### -set_min_pulse_width 0.5500 [get_clocks {clk2}] set_min_pulse_width -high 0.6000 [get_clocks {clk1}] set_min_pulse_width -low 0.4000 [get_clocks {clk1}] +set_min_pulse_width 0.5500 [get_clocks {clk2}] set_max_time_borrow 1.5000 [get_pins {reg1/D}] set_max_time_borrow 2.0000 [get_clocks {clk1}] set_max_transition 0.5000 [current_design] diff --git a/sdc/test/sdc_wrt_full_rewrite.sdcok b/sdc/test/sdc_wrt_full_rewrite.sdcok index cd276237..49f9c019 100644 --- a/sdc/test/sdc_wrt_full_rewrite.sdcok +++ b/sdc/test/sdc_wrt_full_rewrite.sdcok @@ -143,9 +143,9 @@ set_timing_derate -net_delay -late -data 1.0500 ############################################################################### # Design Rules ############################################################################### -set_min_pulse_width 0.5500 [get_clocks {clk2}] set_min_pulse_width -high 0.6000 [get_clocks {clk1}] set_min_pulse_width -low 0.4000 [get_clocks {clk1}] +set_min_pulse_width 0.5500 [get_clocks {clk2}] set_max_time_borrow 1.5000 [get_pins {reg1/D}] set_max_time_borrow 2.0000 [get_clocks {clk1}] set_max_transition 0.5000 [current_design]