From 057a5dd28311d47378ed0da75ba458e4b0df15e0 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Sat, 13 Apr 2024 21:18:39 -0700 Subject: [PATCH] compile warnings Signed-off-by: James Cherry --- dcalc/CcsCeffDelayCalc.cc | 2 +- include/sta/PathEnd.hh | 4 ++-- liberty/Liberty.cc | 2 +- search/ClkLatency.cc | 5 +++-- search/ClkSkew.cc | 2 +- search/PathEnd.cc | 6 +++--- search/Sta.cc | 4 +++- tcl/StaTcl.i | 2 +- 8 files changed, 15 insertions(+), 12 deletions(-) diff --git a/dcalc/CcsCeffDelayCalc.cc b/dcalc/CcsCeffDelayCalc.cc index 7c11eec7..9e12ecf5 100644 --- a/dcalc/CcsCeffDelayCalc.cc +++ b/dcalc/CcsCeffDelayCalc.cc @@ -87,7 +87,7 @@ CcsCeffDelayCalc::gateDelay(const Pin *drvr_pin, vth_ = drvr_library->outputThreshold(rf) * vdd_; vl_ = drvr_library->slewLowerThreshold(rf) * vdd_; vh_ = drvr_library->slewUpperThreshold(rf) * vdd_; - in_slew_ = in_slew; + in_slew_ = delayAsFloat(in_slew); load_cap_ = load_cap; parasitic_ = parasitic; drvr_cell->ensureVoltageWaveforms(); diff --git a/include/sta/PathEnd.hh b/include/sta/PathEnd.hh index 8b75ccda..ec1cca01 100644 --- a/include/sta/PathEnd.hh +++ b/include/sta/PathEnd.hh @@ -143,7 +143,7 @@ public: // PathEndDataCheck data clock path. virtual const PathVertex *dataClkPath() const { return nullptr; } virtual int setupDefaultCycles() const { return 1; } - virtual float clkSkew(const StaState *sta); + virtual Delay clkSkew(const StaState *sta); static bool less(const PathEnd *path_end1, const PathEnd *path_end2, @@ -328,7 +328,7 @@ public: virtual int exceptPathCmp(const PathEnd *path_end, const StaState *sta) const; virtual Delay sourceClkDelay(const StaState *sta) const; - virtual float clkSkew(const StaState *sta); + virtual Delay clkSkew(const StaState *sta); protected: PathEndCheck(Path *path, diff --git a/liberty/Liberty.cc b/liberty/Liberty.cc index 05fae172..a0e00b66 100644 --- a/liberty/Liberty.cc +++ b/liberty/Liberty.cc @@ -1896,7 +1896,7 @@ void LibertyCell::ensureVoltageWaveforms() { if (!have_voltage_waveforms_) { - float vdd; + float vdd = 0.0; // shutup gcc bool vdd_exists; liberty_library_->supplyVoltage("VDD", vdd, vdd_exists); if (!vdd_exists || vdd == 0.0) diff --git a/search/ClkLatency.cc b/search/ClkLatency.cc index 8c9c90ce..ec1fb12c 100644 --- a/search/ClkLatency.cc +++ b/search/ClkLatency.cc @@ -280,7 +280,8 @@ ClkDelays::insertionDelay(PathVertex *clk_path, const Pin *src_pin = clk_info->clkSrc(); const PathAnalysisPt *path_ap = clk_path->pathAnalysisPt(sta); const MinMax *min_max = clk_path->minMax(sta); - return sta->search()->clockInsertion(clk, src_pin, clk_rf, min_max, min_max, path_ap); + return delayAsFloat(sta->search()->clockInsertion(clk, src_pin, clk_rf, min_max, + min_max, path_ap)); } float @@ -292,7 +293,7 @@ ClkDelays::clkTreeDelay(PathVertex *clk_path, const LibertyPort *port = sta->network()->libertyPort(pin); const MinMax *min_max = clk_path->minMax(sta); const RiseFall *rf = clk_path->transition(sta); - Slew slew = clk_path->slew(sta); + float slew = delayAsFloat(clk_path->slew(sta)); return port->clkTreeDelay(slew, rf, min_max); } diff --git a/search/ClkSkew.cc b/search/ClkSkew.cc index b3fd5160..6a515d78 100644 --- a/search/ClkSkew.cc +++ b/search/ClkSkew.cc @@ -133,7 +133,7 @@ ClkSkew::clkTreeDelay(PathVertex &clk_path, const LibertyPort *port = sta->network()->libertyPort(pin); const MinMax *min_max = clk_path.minMax(sta); const RiseFall *rf = clk_path.transition(sta); - Slew slew = clk_path.slew(sta); + float slew = delayAsFloat(clk_path.slew(sta)); return port->clkTreeDelay(slew, rf, min_max); } diff --git a/search/PathEnd.cc b/search/PathEnd.cc index 02098a63..42b27305 100644 --- a/search/PathEnd.cc +++ b/search/PathEnd.cc @@ -1069,7 +1069,7 @@ PathEndCheck::sourceClkDelay(const StaState *sta) const // Propagated clock. Propagated arrival is seeded with insertion delay. Arrival clk_arrival = src_clk_path.arrival(sta); const ClockEdge *src_clk_edge = src_clk_info->clkEdge(); - float insertion = sourceClkInsertionDelay(sta); + Delay insertion = sourceClkInsertionDelay(sta); return delayRemove(clk_arrival - src_clk_edge->time(), insertion); } else @@ -1080,7 +1080,7 @@ PathEndCheck::sourceClkDelay(const StaState *sta) const return 0.0; } -float +Delay PathEndCheck::clkSkew(const StaState *sta) { commonClkPessimism(sta); @@ -1858,7 +1858,7 @@ PathEndPathDelay::sourceClkOffset(const StaState *sta) const return pathDelaySrcClkOffset(path_, path_delay_, src_clk_arrival_, sta); } -float +Delay PathEnd::clkSkew(const StaState *) { return 0.0; diff --git a/search/Sta.cc b/search/Sta.cc index f0c6500c..01a6766d 100644 --- a/search/Sta.cc +++ b/search/Sta.cc @@ -5167,7 +5167,9 @@ instMaxSlew(const Instance *inst, Pin *pin = pin_iter->next(); if (network->isDriver(pin)) { Vertex *vertex = graph->pinDrvrVertex(pin); - max_slew = max(max_slew, sta->vertexSlew(vertex, MinMax::max())); + Slew slew = sta->vertexSlew(vertex, MinMax::max()); + if (delayGreater(slew, max_slew, sta)) + max_slew = slew; } } delete pin_iter; diff --git a/tcl/StaTcl.i b/tcl/StaTcl.i index 750a4989..1d45e6e1 100644 --- a/tcl/StaTcl.i +++ b/tcl/StaTcl.i @@ -4940,7 +4940,7 @@ bool path_delay_margin_is_external() Crpr common_clk_pessimism() { return self->commonClkPessimism(Sta::sta()); } RiseFall *target_clk_end_trans() { return const_cast(self->targetClkEndTrans(Sta::sta())); } -float clk_skew() { return self->clkSkew(Sta::sta()); } +Delay clk_skew() { return self->clkSkew(Sta::sta()); } }