6 Commits

Author	SHA1	Message	Date
jcirimel	101eb28112	revert example scn4m to non netlist only	2020-02-09 23:52:11 -08:00
Jesse Cirimelli-Low	b107934672	fix styling	2020-02-06 12:15:52 +00:00
Matt Guthaus	0cdd3af1aa	Change default nominal corners to false and enable in test config.	2019-11-29 12:08:53 -08:00
Matt Guthaus	84c7146792	Fix some pep8 errors/warnings in pgate and examples.	2019-10-06 17:30:16 +00:00
Matt Guthaus	74f904a509	Cleanup options for front-end. Improve info output.	2019-04-01 10:35:17 -07:00
Matt Guthaus	5de7ff3773	Updated Verilog to have multiport. Added 1rw,1rw/1r Verilog testbench.	2019-01-11 14:15:16 -08:00