From 282f944b2f06709870e6a4b8f6fcf03fe95957a2 Mon Sep 17 00:00:00 2001 From: mrg Date: Fri, 3 Jul 2020 06:55:35 -0700 Subject: [PATCH 1/3] Also write .lvs file since it can be different the .sp --- compiler/openram.py | 2 +- compiler/sram/sram.py | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/compiler/openram.py b/compiler/openram.py index cf18f97b..4989feff 100755 --- a/compiler/openram.py +++ b/compiler/openram.py @@ -57,7 +57,7 @@ c = sram_config(word_size=OPTS.word_size, num_spare_rows=OPTS.num_spare_rows) debug.print_raw("Words per row: {}".format(c.words_per_row)) -output_extensions = ["sp", "v", "lib", "py", "html", "log"] +output_extensions = ["lvs", "sp", "v", "lib", "py", "html", "log"] # Only output lef/gds if back-end if not OPTS.netlist_only: output_extensions.extend(["lef", "gds"]) diff --git a/compiler/sram/sram.py b/compiler/sram/sram.py index 8863c299..1ec7d636 100644 --- a/compiler/sram/sram.py +++ b/compiler/sram/sram.py @@ -88,6 +88,13 @@ class sram(): self.sp_write(spname) print_time("Spice writing", datetime.datetime.now(), start_time) + # Save the LVS file + start_time = datetime.datetime.now() + spname = OPTS.output_path + self.s.name + ".lvs" + debug.print_raw("LVS: Writing to {0}".format(spname)) + self.lvs_write(spname) + print_time("LVS writing", datetime.datetime.now(), start_time) + # Save the extracted spice file if OPTS.use_pex: import verify From 27166c75f08cf633d4fe039668bc823677e2e584 Mon Sep 17 00:00:00 2001 From: mrg Date: Fri, 3 Jul 2020 07:00:56 -0700 Subject: [PATCH 2/3] Don't remove temp files during regular openram runs. --- compiler/base/hierarchy_design.py | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/compiler/base/hierarchy_design.py b/compiler/base/hierarchy_design.py index b0370179..001093dd 100644 --- a/compiler/base/hierarchy_design.py +++ b/compiler/base/hierarchy_design.py @@ -85,8 +85,9 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout): "LVS failed for {0} with {1} errors(s)".format(self.name, num_lvs_errors)) - os.remove(tempspice) - os.remove(tempgds) + if OPTS.purge_temp: + os.remove(tempspice) + os.remove(tempgds) return (num_drc_errors, num_lvs_errors) else: @@ -111,7 +112,8 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout): "DRC failed for {0} with {1} error(s)".format(self.name, num_errors)) - os.remove(tempgds) + if OPTS.purge_temp: + os.remove(tempgds) return num_errors else: @@ -137,8 +139,9 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout): debug.check(num_errors == 0, "LVS failed for {0} with {1} error(s)".format(self.name, num_errors)) - os.remove(tempspice) - os.remove(tempgds) + if OPTS.purge_temp: + os.remove(tempspice) + os.remove(tempgds) return num_errors else: From a989ea63a02b33f42b7aea48cc454021fd9d04fc Mon Sep 17 00:00:00 2001 From: mrg Date: Thu, 9 Jul 2020 11:33:14 -0700 Subject: [PATCH 3/3] Move magic/netgen files to tech dir --- compiler/verify/magic.py | 6 +++--- technology/scn3me_subm/{mag_lib => tech}/.magicrc | 0 technology/scn3me_subm/{mag_lib => tech}/setup.tcl | 0 technology/scn4m_subm/{mag_lib => tech}/.magicrc | 0 technology/scn4m_subm/{mag_lib => tech}/setup.tcl | 0 5 files changed, 3 insertions(+), 3 deletions(-) rename technology/scn3me_subm/{mag_lib => tech}/.magicrc (100%) rename technology/scn3me_subm/{mag_lib => tech}/setup.tcl (100%) rename technology/scn4m_subm/{mag_lib => tech}/.magicrc (100%) rename technology/scn4m_subm/{mag_lib => tech}/setup.tcl (100%) diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py index 5df6e698..ef98a09b 100644 --- a/compiler/verify/magic.py +++ b/compiler/verify/magic.py @@ -38,7 +38,7 @@ def filter_gds(cell_name, input_gds, output_gds): global OPTS # Copy .magicrc file into temp dir - magic_file = OPTS.openram_tech + "mag_lib/.magicrc" + magic_file = OPTS.openram_tech + "tech/.magicrc" if os.path.exists(magic_file): shutil.copy(magic_file, OPTS.openram_temp) else: @@ -135,7 +135,7 @@ def write_netgen_script(cell_name): global OPTS setup_file = "setup.tcl" - full_setup_file = OPTS.openram_tech + "mag_lib/" + setup_file + full_setup_file = OPTS.openram_tech + "tech/" + setup_file if os.path.exists(full_setup_file): # Copy setup.tcl file into temp dir shutil.copy(full_setup_file, OPTS.openram_temp) @@ -166,7 +166,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False): shutil.copy(gds_name, OPTS.openram_temp) # Copy .magicrc file into temp dir - magic_file = OPTS.openram_tech + "mag_lib/.magicrc" + magic_file = OPTS.openram_tech + "tech/.magicrc" if os.path.exists(magic_file): shutil.copy(magic_file, OPTS.openram_temp) else: diff --git a/technology/scn3me_subm/mag_lib/.magicrc b/technology/scn3me_subm/tech/.magicrc similarity index 100% rename from technology/scn3me_subm/mag_lib/.magicrc rename to technology/scn3me_subm/tech/.magicrc diff --git a/technology/scn3me_subm/mag_lib/setup.tcl b/technology/scn3me_subm/tech/setup.tcl similarity index 100% rename from technology/scn3me_subm/mag_lib/setup.tcl rename to technology/scn3me_subm/tech/setup.tcl diff --git a/technology/scn4m_subm/mag_lib/.magicrc b/technology/scn4m_subm/tech/.magicrc similarity index 100% rename from technology/scn4m_subm/mag_lib/.magicrc rename to technology/scn4m_subm/tech/.magicrc diff --git a/technology/scn4m_subm/mag_lib/setup.tcl b/technology/scn4m_subm/tech/setup.tcl similarity index 100% rename from technology/scn4m_subm/mag_lib/setup.tcl rename to technology/scn4m_subm/tech/setup.tcl