From f1925420cffd2336cc06ac843face6f5e6b28bc1 Mon Sep 17 00:00:00 2001
From: mrg <mrg@ucsc.edu>
Date: Fri, 17 Apr 2020 10:30:26 -0700
Subject: [PATCH] Only allow DRC fail with LVS pass if using Magic.

---
 compiler/tests/testutils.py | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/compiler/tests/testutils.py b/compiler/tests/testutils.py
index 96820e38..eaac38e2 100644
--- a/compiler/tests/testutils.py
+++ b/compiler/tests/testutils.py
@@ -44,19 +44,18 @@ class openram_test(unittest.TestCase):
         if not OPTS.netlist_only:
             a.gds_write(tempgds)
 
+            import verify
             # Run both DRC and LVS even if DRC might fail
             # Magic can still extract despite DRC failing, so it might be ok in some techs
             # if we ignore things like minimum metal area of pins
-            import verify
             drc_result=verify.run_drc(a.name, tempgds, extract=True, final_verification=final_verification)
-            lvs_result=verify.run_lvs(a.name, tempgds, tempspice, final_verification=final_verification)
+
+            # Always run LVS if we are using magic
+            if "magic" in OPTS.drc_exe:
+                lvs_result=verify.run_lvs(a.name, tempgds, tempspice, final_verification=final_verification)
             
-            if lvs_result != 0:
-                #zip_file = "/tmp/{0}_{1}".format(a.name,os.getpid())
-                #debug.info(0,"Archiving failed files to {}.zip".format(zip_file))
-                #shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
-                self.fail("LVS mismatch: {}".format(a.name))
-            if lvs_result == 0 and drc_result != 0:
+            # Only allow DRC to fail and LVS to pass if we are using magic
+            if "magic" in OPTS.drc_exe and lvs_result == 0 and drc_result != 0:
                 #zip_file = "/tmp/{0}_{1}".format(a.name,os.getpid())
                 #debug.info(0,"Archiving failed files to {}.zip".format(zip_file))
                 #shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
@@ -66,6 +65,12 @@ class openram_test(unittest.TestCase):
                 #debug.info(0,"Archiving failed files to {}.zip".format(zip_file))
                 #shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
                 self.fail("DRC failed: {}".format(a.name))
+                
+            if lvs_result != 0:
+                #zip_file = "/tmp/{0}_{1}".format(a.name,os.getpid())
+                #debug.info(0,"Archiving failed files to {}.zip".format(zip_file))
+                #shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
+                self.fail("LVS mismatch: {}".format(a.name))
 
 
         # For debug...