From f0f811bad9d70e4fcd8aadc502aa401e8690f712 Mon Sep 17 00:00:00 2001 From: jsowash Date: Wed, 14 Aug 2019 12:40:14 -0700 Subject: [PATCH] Added a condiitonal to only route wmask dff when there's a write size. --- compiler/sram/sram_1bank.py | 3 ++- compiler/tests/10_write_driver_array_wmask_test.py | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/compiler/sram/sram_1bank.py b/compiler/sram/sram_1bank.py index b5534226..b3f6983f 100644 --- a/compiler/sram/sram_1bank.py +++ b/compiler/sram/sram_1bank.py @@ -259,7 +259,8 @@ class sram_1bank(sram_base): self.route_col_addr_dff() self.route_data_dff() - self.route_wmask_dff() + if self.write_size is not None: + self.route_wmask_dff() def route_clk(self): """ Route the clock network """ diff --git a/compiler/tests/10_write_driver_array_wmask_test.py b/compiler/tests/10_write_driver_array_wmask_test.py index 47a3940b..d09286b5 100644 --- a/compiler/tests/10_write_driver_array_wmask_test.py +++ b/compiler/tests/10_write_driver_array_wmask_test.py @@ -20,7 +20,7 @@ import debug class write_driver_test(openram_test): def runTest(self): - globals.init("config_{0}".format(OPTS.tech_name)) + globals.init_openram("config_{0}".format(OPTS.tech_name)) # check write driver array for single port debug.info(2, "Testing write_driver_array for columns=8, word_size=8, write_size=4")