From f0958b0b118a6181705bd97dc18098f345e8719a Mon Sep 17 00:00:00 2001 From: jcirimel Date: Wed, 18 Dec 2019 03:03:13 -0800 Subject: [PATCH] squashed update of pex progress due to timezone error --- compiler/base/geometry.py | 102 +++++++++++- compiler/base/hierarchy_layout.py | 2 + compiler/bitcells/bitcell_base.py | 35 ++++- compiler/bitcells/pbitcell.py | 19 ++- compiler/characterizer/delay.py | 8 +- compiler/characterizer/stimuli.py | 5 + compiler/modules/bank.py | 5 +- compiler/modules/control_logic.py | 4 +- compiler/sram/sram_base.py | 38 +++++ compiler/verify/magic.py | 44 +++--- technology/scn4m_subm/mag_lib/cell_1rw_1r.mag | 137 ++++++++-------- technology/scn4m_subm/mag_lib/cell_1w_1r.mag | 137 ++++++++-------- technology/scn4m_subm/mag_lib/cell_6t.mag | 116 +++++++------- .../scn4m_subm/mag_lib/dummy_cell_1rw_1r.mag | 143 +++++++++-------- .../scn4m_subm/mag_lib/dummy_cell_1w_1r.mag | 143 +++++++++-------- .../scn4m_subm/mag_lib/dummy_cell_6t.mag | 112 ++++++------- .../mag_lib/replica_cell_1rw_1r.mag | 147 +++++++++--------- .../scn4m_subm/mag_lib/replica_cell_1w_1r.mag | 147 +++++++++--------- .../scn4m_subm/mag_lib/replica_cell_6t.mag | 116 +++++++------- 19 files changed, 813 insertions(+), 647 deletions(-) diff --git a/compiler/base/geometry.py b/compiler/base/geometry.py index 74b02f5f..1c037fdf 100644 --- a/compiler/base/geometry.py +++ b/compiler/base/geometry.py @@ -12,6 +12,8 @@ import debug from vector import vector import tech import math +import copy +import numpy as np from globals import OPTS from utils import round_to_grid @@ -221,9 +223,8 @@ class instance(geometry): self.mirror = mirror self.rotate = rotate self.update_boundary() - debug.info(3, "placing instance {}".format(self)) - - + debug.info(3, "placing instance {}".format(self)) + def get_pin(self,name,index=-1): """ Return an absolute pin that is offset and transformed based on this instance location. Index will return one of several pins.""" @@ -241,20 +242,109 @@ class instance(geometry): def get_num_pins(self, name): """ Return the number of pins of a given name """ return len(self.mod.get_pins(name)) - + def get_pins(self,name): """ Return an absolute pin that is offset and transformed based on this instance location. """ - + import copy pin = copy.deepcopy(self.mod.get_pins(name)) - + new_pins = [] for p in pin: p.transform(self.offset,self.mirror,self.rotate) new_pins.append(p) return new_pins + + def reverse_bitcell_transformation(self): + path = [] + bitcell_paths = [] + pex_offsets = [] + Q_offsets = [] + Q_bar_offsets = [] + + def walk_subtree(node): + path.append(node) + + if node.mod.name == 'pbitcell': + bitcell_paths.append(copy.copy(path)) + + Q_x = node.mod.get_normalized_storage_net_offset()[0][0] + Q_y = node.mod.get_normalized_storage_net_offset()[0][1] + + Q_bar_x = node.mod.get_normalized_storage_net_offset()[1][0] + Q_bar_y = node.mod.get_normalized_storage_net_offset()[1][1] + + if node.mirror == 'MX': + Q_y = -1 * Q_y + Q_bar_y = -1 * Q_bar_y + + Q_offsets.append([Q_x, Q_y]) + Q_bar_offsets.append([Q_bar_x, Q_bar_y]) + + + elif node.mod.insts is not []: + for instance in node.mod.insts: + walk_subtree(instance) + path.pop(-1) + + def calculate_transform(node): + #set up the rotation matrix + angle = math.radians(float(node.rotate)) + mRotate = np.array([[math.cos(angle),-math.sin(angle),0.0], + [math.sin(angle),math.cos(angle),0.0], + [0.0,0.0,1.0]]) + + #set up translation matrix + translateX = float(node.offset[0]) + translateY = float(node.offset[1]) + mTranslate = np.array([[1.0,0.0,translateX], + [0.0,1.0,translateY], + [0.0,0.0,1.0]]) + + #set up the scale matrix (handles mirror X) + scaleX = 1.0 + if(node.mirror == 'MX'): + scaleY = -1.0 + else: + scaleY = 1.0 + mScale = np.array([[scaleX,0.0,0.0], + [0.0,scaleY,0.0], + [0.0,0.0,1.0]]) + + return (mRotate, mScale, mTranslate) + + def apply_transform(mtransforms, uVector, vVector, origin): + origin = np.dot(mtransforms[0], origin) #rotate + uVector = np.dot(mtransforms[0], uVector) #rotate + vVector = np.dot(mtransforms[0], vVector) #rotate + origin = np.dot(mtransforms[1], origin) #scale + uVector = np.dot(mtransforms[1], uVector) #scale + vVector = np.dot(mtransforms[1], vVector) #scale + origin = np.dot(mtransforms[2], origin) + + return(uVector, vVector, origin) + + def apply_path_transform(path): + uVector = np.array([[1.0],[0.0],[0.0]]) + vVector = np.array([[0.0],[1.0],[0.0]]) + origin = np.array([[0.0],[0.0],[1.0]]) + + while(path): + instance = path.pop(-1) + mtransforms = calculate_transform(instance) + (uVector, vVector, origin) = apply_transform(mtransforms, uVector, vVector, origin) + + return (uVector, vVector, origin) + + walk_subtree(self) + for path in bitcell_paths: + vector_spaces = apply_path_transform(path) + origin = vector_spaces[2] + pex_offsets.append([origin[0], origin[1]]) + return(pex_offsets, Q_offsets, Q_bar_offsets) + def __str__(self): """ override print function output """ return "( inst: " + self.name + " @" + str(self.offset) + " mod=" + self.mod.name + " " + self.mirror + " R=" + str(self.rotate) + ")" diff --git a/compiler/base/hierarchy_layout.py b/compiler/base/hierarchy_layout.py index 2fea5c61..ae288d2e 100644 --- a/compiler/base/hierarchy_layout.py +++ b/compiler/base/hierarchy_layout.py @@ -1124,6 +1124,8 @@ class layout(): pdf.drawLayout() pdf.writeToFile(pdf_name) + + def print_attr(self): """Prints a list of attributes for the current layout object""" debug.info(0, diff --git a/compiler/bitcells/bitcell_base.py b/compiler/bitcells/bitcell_base.py index 5265904b..ea394548 100644 --- a/compiler/bitcells/bitcell_base.py +++ b/compiler/bitcells/bitcell_base.py @@ -8,6 +8,7 @@ import debug import design +from globals import OPTS import logical_effort from tech import parameter, drc @@ -78,7 +79,39 @@ class bitcell_base(design.design): fmt_str = "Storage nodes={} not found in spice file." debug.info(1, fmt_str.format(self.storage_nets)) return None - + + def get_storage_net_offset(self): + """ + Gets the location of the storage net labels to add top level + labels for pex simulation. + """ + #TODO: use getTexts to support custom bitcells + # If we generated the bitcell, we already know where Q and Q_bar are + #if OPTS.bitcell is not "pbitcell": + # self.storage_net_offsets = [] + # for net in get_storage_net_names: + # if net is "Q" or "Q_bar": + # for text in self.getTexts("metal1"): + # self.storage_net_offsets.append(text.offsetInMicrons) + return(self.storage_net_offsets) + + def get_normalized_storage_net_offset(self): + """ + Convert storage net offset to be relative to the bottom left corner + of the bitcell. This is useful for making sense of offsets outside + of the bitcell. + """ + + Q_x = self.storage_net_offsets[0][0] - self.leftmost_xpos + Q_y = self.storage_net_offsets[0][1] - self.botmost_ypos + Q_bar_x = self.storage_net_offsets[1][0] - self.leftmost_xpos + Q_bar_y = self.storage_net_offsets[1][1] - self.botmost_ypos + + normalized_storage_net_offset = [[Q_x,Q_y],[Q_bar_x,Q_bar_y]] + + return normalized_storage_net_offset + + def build_graph(self, graph, inst_name, port_nets): """ By default, bitcells won't be part of the graph. diff --git a/compiler/bitcells/pbitcell.py b/compiler/bitcells/pbitcell.py index bbfdf942..d14a36ed 100644 --- a/compiler/bitcells/pbitcell.py +++ b/compiler/bitcells/pbitcell.py @@ -26,7 +26,7 @@ class pbitcell(bitcell_base.bitcell_base): self.num_w_ports = OPTS.num_w_ports self.num_r_ports = OPTS.num_r_ports self.total_ports = self.num_rw_ports + self.num_w_ports + self.num_r_ports - + self.replica_bitcell = replica_bitcell self.dummy_bitcell = dummy_bitcell @@ -152,7 +152,7 @@ class pbitcell(bitcell_base.bitcell_base): self.Q_bar = "Q_bar" self.Q = "Q" self.storage_nets = [self.Q, self.Q_bar] - + def add_modules(self): """ Determine size of transistors and add ptx modules """ # if there are any read/write ports, @@ -353,6 +353,11 @@ class pbitcell(bitcell_base.bitcell_base): self.right_building_edge = right_inverter_xpos \ + self.inverter_nmos.active_width + def add_pex_labels(self, left_inverter_offset, right_inverter_offset): + self.add_label("Q", "metal1", left_inverter_offset) + self.add_label("Q_bar", "metal1", right_inverter_offset) + self.storage_net_offsets = [left_inverter_offset, right_inverter_offset] + def route_storage(self): """ Routes inputs and outputs of inverters to cross couple them """ # connect input (gate) of inverters @@ -399,6 +404,16 @@ class pbitcell(bitcell_base.bitcell_base): contact_offset_right.y) self.add_path("poly", [contact_offset_right, gate_offset_left]) + # add labels to cross couple inverter for extracted simulation + contact_offset_left_output = vector(self.inverter_nmos_left.get_pin("D").rc().x \ + + 0.5 * contact.poly.height, + self.cross_couple_upper_ypos) + + contact_offset_right_output = vector(self.inverter_nmos_right.get_pin("S").lc().x \ + - 0.5*contact.poly.height, + self.cross_couple_lower_ypos) + self.add_pex_labels(contact_offset_left_output, contact_offset_right_output) + def route_rails(self): """ Adds gnd and vdd rails and connects them to the inverters """ # Add rails for vdd and gnd diff --git a/compiler/characterizer/delay.py b/compiler/characterizer/delay.py index 2a8d5293..e64f9515 100644 --- a/compiler/characterizer/delay.py +++ b/compiler/characterizer/delay.py @@ -217,8 +217,12 @@ class delay(simulation): storage_names = cell_inst.mod.get_storage_net_names() debug.check(len(storage_names) == 2, ("Only inverting/non-inverting storage nodes" "supported for characterization. Storage nets={}").format(storage_names)) - q_name = cell_name+'.'+str(storage_names[0]) - qbar_name = cell_name+'.'+str(storage_names[1]) + if not OPTS.use_pex: + q_name = cell_name+'.'+str(storage_names[0]) + qbar_name = cell_name+'.'+str(storage_names[1]) + else: + q_name = "bitcell_Q_r{0}_c{1}".format(OPTS.num_words -1, OPTS.word_size-1) + qbar_name = "bitcell_Q_r{0}_c{1}".format(OPTS.num_words -1, OPTS.word_size-1) # Bit measures, measurements times to be defined later. The measurement names must be unique # but they is enforced externally diff --git a/compiler/characterizer/stimuli.py b/compiler/characterizer/stimuli.py index 58a9e3ed..e565fb5f 100644 --- a/compiler/characterizer/stimuli.py +++ b/compiler/characterizer/stimuli.py @@ -51,6 +51,11 @@ class stimuli(): self.sf.write("X{0} ".format(model_name)) for pin in pins: self.sf.write("{0} ".format(pin)) + if OPTS.use_pex: + for row in range(0,OPTS.num_words): + for col in range(0,OPTS.word_size): + self.sf.write("bitcell_Q_r{0}_c{1} ".format(row,col)) + self.sf.write("bitcell_Q_bar_r{0}_c{1} ".format(row,col)) self.sf.write("{0}\n".format(model_name)) diff --git a/compiler/modules/bank.py b/compiler/modules/bank.py index 3e105d09..0fe40ea8 100644 --- a/compiler/modules/bank.py +++ b/compiler/modules/bank.py @@ -75,8 +75,7 @@ class bank(design.design): self.bank_array_ll = self.offset_all_coordinates().scale(-1,-1) self.bank_array_ur = self.bitcell_array_inst.ur() self.bank_array_ul = self.bitcell_array_inst.ul() - - + self.DRC_LVS() def add_pins(self): @@ -968,7 +967,7 @@ class bank(design.design): stage_effort_list += self.port_address.wordline_driver.determine_wordline_stage_efforts(wordline_cout,inp_is_rise) return stage_effort_list - + def get_wl_en_cin(self): """Get the relative capacitance of all the clk connections in the bank""" #wl_en only used in the wordline driver. diff --git a/compiler/modules/control_logic.py b/compiler/modules/control_logic.py index 3256c9ac..354179ca 100644 --- a/compiler/modules/control_logic.py +++ b/compiler/modules/control_logic.py @@ -789,7 +789,7 @@ class control_logic(design.design): layer="metal1", start=out_pin.center(), end=right_pos) - + def route_supply(self): @@ -847,7 +847,7 @@ class control_logic(design.design): height=pin.height(), width=pin.width()) - + def get_delays_to_wl(self): """Get the delay (in delay units) of the clk to a wordline in the bitcell array""" debug.check(self.sram.all_mods_except_control_done, "Cannot calculate sense amp enable delay unless all module have been added.") diff --git a/compiler/sram/sram_base.py b/compiler/sram/sram_base.py index 2a4983b6..547ba517 100644 --- a/compiler/sram/sram_base.py +++ b/compiler/sram/sram_base.py @@ -18,6 +18,7 @@ from design import design from verilog import verilog from lef import lef from sram_factory import factory +from tech import drc import logical_effort class sram_base(design, verilog, lef): @@ -85,6 +86,41 @@ class sram_base(design, verilog, lef): self.add_pin("vdd","POWER") self.add_pin("gnd","GROUND") + def add_global_pex_labels(self): + """ + Add pex labels at the sram level for spice analysis + """ + + # add pex labels for bitcell + for bank_num in range(0,len(self.bank_insts)): + bank = self.bank_insts[bank_num] + pex_offsets = bank.reverse_bitcell_transformation() + + bank_offset = pex_offsets[0] # offset bank relative to sram + Q_offset = pex_offsets[1] # offset of storage relative to bank + Q_bar_offset = pex_offsets[2] # offset of storage relative to bank + + layer = "metal1" + + for i in range(0,len(bank_offset)): + + Q = [bank_offset[i][0] + Q_offset[i][0], bank_offset[i][1] + Q_offset[i][1]] + Q_bar = [bank_offset[i][0] + Q_bar_offset[i][0], bank_offset[i][1] + Q_bar_offset[i][1]] + + self.add_layout_pin_rect_center("bitcell_Q_b{0}_r{1}_c{2}".format(bank_num, i % OPTS.num_words, int(i / OPTS.num_words)) , layer, Q) + self.add_layout_pin_rect_center("bitcell_Q_bar_b{0}_r{1}_c{2}".format(bank_num, i % OPTS.num_words, int(i / OPTS.num_words)), layer, Q_bar) + + # add pex labels for control logic + for i in range (0,len(self.control_logic_insts)): + control_logic_offset = self.control_logic_insts[i].offset + for output in self.control_logic_insts[i].mod.output_list: + pin = self.control_logic_insts[i].mod.get_pin(output) + offset = [control_logic_offset[0] + pin.center()[0], control_logic_offset[1] + pin.center()[1]] + self.add_layout_pin_rect_center("{0}{1}".format(pin.name,i), "metal1", offset) + + + + def create_netlist(self): """ Netlist creation """ @@ -126,6 +162,8 @@ class sram_base(design, verilog, lef): self.width = highest_coord[0] self.height = highest_coord[1] + self.add_global_pex_labels() + start_time = datetime.now() # We only enable final verification if we have routed the design self.DRC_LVS(final_verification=OPTS.route_supplies, top_level=True) diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py index 63aeaabe..fb0bc452 100644 --- a/compiler/verify/magic.py +++ b/compiler/verify/magic.py @@ -80,12 +80,12 @@ def write_magic_script(cell_name, extract=False, final_verification=False): f.write(pre+"ext2spice renumber off\n") f.write(pre+"ext2spice scale off\n") f.write(pre+"ext2spice blackbox on\n") - f.write(pre+"ext2spice subcircuit top auto\n") + f.write(pre+"ext2spice subcircuit top on\n") f.write(pre+"ext2spice global off\n") # Can choose hspice, ngspice, or spice3, # but they all seem compatible enough. - #f.write(pre+"ext2spice format ngspice\n") + f.write(pre+"ext2spice format ngspice\n") f.write(pre+"ext2spice {}\n".format(cell_name)) f.write("quit -noprompt\n") f.write("EOF\n") @@ -309,7 +309,7 @@ def run_pex(name, gds_name, sp_name, output=None, final_verification=False): out_errors = find_error(results) debug.check(os.path.isfile(output),"Couldn't find PEX extracted output.") - correct_port(name,output,sp_name) + #correct_port(name,output,sp_name) return out_errors def write_batch_pex_rule(gds_name,name,sp_name,output): @@ -375,13 +375,13 @@ def write_script_pex_rule(gds_name,cell_name,output): else: pre = "" f.write(pre+"extract\n".format(cell_name)) - #f.write(pre+"ext2spice hierarchy on\n") - #f.write(pre+"ext2spice format ngspice\n") - #f.write(pre+"ext2spice renumber off\n") - #f.write(pre+"ext2spice scale off\n") - #f.write(pre+"ext2spice blackbox on\n") + f.write(pre+"ext2spice hierarchy on\n") + f.write(pre+"ext2spice format ngspice\n") + f.write(pre+"ext2spice renumber off\n") + f.write(pre+"ext2spice scale off\n") + f.write(pre+"ext2spice blackbox on\n") f.write(pre+"ext2spice subcircuit top on\n") - #f.write(pre+"ext2spice global off\n") + f.write(pre+"ext2spice global off\n") f.write(pre+"ext2spice {}\n".format(cell_name)) f.write("quit -noprompt\n") f.write("eof\n") @@ -404,31 +404,37 @@ def correct_port(name, output_file_name, ref_file_name): pex_file = open(output_file_name, "r") contents = pex_file.read() # locate the start of circuit definition line - match = re.search(".subckt " + str(name) + ".*", contents) + match = re.search(r'^\.subckt+[^M]*', contents, re.MULTILINE) match_index_start = match.start() - pex_file.seek(match_index_start) - rest_text = pex_file.read() - # locate the end of circuit definition line - match = re.search(r'\n', rest_text) - match_index_end = match.start() + match_index_end = match.end() # store the unchanged part of pex file in memory pex_file.seek(0) part1 = pex_file.read(match_index_start) - pex_file.seek(match_index_start + match_index_end) + pex_file.seek(match_index_end) part2 = pex_file.read() + + bitcell_list = "+ " + for row in range(0,OPTS.num_words): + for col in range(0,OPTS.word_size): + bitcell_list += "bitcell_Q_r{0}_c{1} ".format(row,col) + bitcell_list += "bitcell_Q_bar_r{0}_c{1} ".format(row,col) + bitcell_list += "\n" + + + part2 = bitcell_list + part2 pex_file.close() # obtain the correct definition line from the original spice file sp_file = open(ref_file_name, "r") contents = sp_file.read() - circuit_title = re.search(".SUBCKT " + str(name) + ".*\n", contents) + circuit_title = re.search(".SUBCKT " + str(name) + ".*", contents) circuit_title = circuit_title.group() sp_file.close() # write the new pex file with info in the memory output_file = open(output_file_name, "w") output_file.write(part1) - output_file.write(circuit_title) + output_file.write(circuit_title+'\n') output_file.write(part2) output_file.close() @@ -437,4 +443,4 @@ def print_drc_stats(): def print_lvs_stats(): debug.info(1,"LVS runs: {0}".format(num_lvs_runs)) def print_pex_stats(): - debug.info(1,"PEX runs: {0}".format(num_pex_runs)) + debug.info(1,"PEX runs: {0}".format(num_pex_runs)) \ No newline at end of file diff --git a/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag b/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag index 9aec1c5d..0f2cdadb 100644 --- a/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag +++ b/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag @@ -1,22 +1,31 @@ magic tech scmos -timestamp 1542220294 -<< nwell >> -rect 0 46 54 75 +timestamp 1572948731 << pwell >> rect 0 0 54 46 -<< ntransistor >> -rect 14 33 16 37 -rect 22 29 24 37 -rect 30 29 32 37 -rect 38 33 40 37 -rect 14 17 16 23 -rect 22 17 24 23 -rect 30 17 32 23 -rect 38 17 40 23 -<< ptransistor >> -rect 22 54 24 57 -rect 30 54 32 57 +<< nwell >> +rect 0 46 54 75 +<< polysilicon >> +rect 22 57 24 60 +rect 30 57 32 60 +rect 22 44 24 54 +rect 30 51 32 54 +rect 31 47 32 51 +rect 14 37 16 44 +rect 22 40 23 44 +rect 22 37 24 40 +rect 30 37 32 47 +rect 38 37 40 44 +rect 14 31 16 33 +rect 38 31 40 33 +rect 14 23 16 24 +rect 22 23 24 29 +rect 30 23 32 29 +rect 38 23 40 24 +rect 14 15 16 17 +rect 22 15 24 17 +rect 30 15 32 17 +rect 38 15 40 17 << ndiffusion >> rect 13 33 14 37 rect 16 33 17 37 @@ -41,46 +50,6 @@ rect 21 54 22 57 rect 24 54 25 57 rect 29 54 30 57 rect 32 54 33 57 -<< ndcontact >> -rect 9 33 13 37 -rect 17 33 21 37 -rect 25 29 29 37 -rect 33 33 37 37 -rect 41 33 45 37 -rect 25 17 29 23 -<< pdcontact >> -rect 17 54 21 58 -rect 33 54 37 58 -<< psubstratepcontact >> -rect 25 9 29 13 -<< polysilicon >> -rect 22 57 24 60 -rect 30 57 32 60 -rect 22 44 24 54 -rect 30 51 32 54 -rect 31 47 32 51 -rect 14 37 16 44 -rect 22 40 23 44 -rect 22 37 24 40 -rect 30 37 32 47 -rect 38 37 40 44 -rect 14 31 16 33 -rect 38 31 40 33 -rect 14 23 16 24 -rect 22 23 24 29 -rect 30 23 32 29 -rect 38 23 40 24 -rect 14 15 16 17 -rect 22 15 24 17 -rect 30 15 32 17 -rect 38 15 40 17 -<< polycontact >> -rect 27 47 31 51 -rect 10 40 14 44 -rect 23 40 27 44 -rect 40 40 44 44 -rect 12 24 16 28 -rect 38 24 42 28 << metal1 >> rect 0 68 25 72 rect 29 68 54 72 @@ -102,20 +71,6 @@ rect 29 9 54 13 rect 0 2 16 6 rect 20 2 34 6 rect 38 2 54 6 -<< m2contact >> -rect 2 33 6 37 -rect 48 33 52 37 -rect 16 24 20 28 -rect 34 24 38 28 -rect 16 2 20 6 -rect 34 2 38 6 -<< pdm12contact >> -rect 25 54 29 58 -<< ndm12contact >> -rect 9 17 13 21 -rect 41 17 45 21 -<< nsm12contact >> -rect 25 68 29 72 << metal2 >> rect 2 37 6 72 rect 2 0 6 33 @@ -125,11 +80,47 @@ rect 9 0 13 17 rect 16 6 20 24 rect 34 6 38 24 rect 41 21 45 72 -rect 41 0 45 17 rect 48 37 52 72 +rect 41 0 45 17 rect 48 0 52 33 -<< comment >> -rect 0 0 54 70 +<< ntransistor >> +rect 14 33 16 37 +rect 22 29 24 37 +rect 30 29 32 37 +rect 38 33 40 37 +rect 14 17 16 23 +rect 22 17 24 23 +rect 30 17 32 23 +rect 38 17 40 23 +<< ptransistor >> +rect 22 54 24 57 +rect 30 54 32 57 +<< polycontact >> +rect 27 47 31 51 +rect 10 40 14 44 +rect 23 40 27 44 +rect 40 40 44 44 +rect 12 24 16 28 +rect 38 24 42 28 +<< ndcontact >> +rect 9 33 13 37 +rect 17 33 21 37 +rect 25 29 29 37 +rect 33 33 37 37 +rect 41 33 45 37 +rect 25 17 29 23 +<< pdcontact >> +rect 17 54 21 58 +rect 33 54 37 58 +<< m2contact >> +rect 2 33 6 37 +rect 48 33 52 37 +rect 16 24 20 28 +rect 34 24 38 28 +rect 16 2 20 6 +rect 34 2 38 6 +<< psubstratepcontact >> +rect 25 9 29 13 << labels >> rlabel metal1 19 63 19 63 1 wl0 rlabel metal1 19 70 19 70 5 vdd @@ -139,4 +130,6 @@ rlabel metal2 4 7 4 7 2 bl0 rlabel metal2 11 7 11 7 1 bl1 rlabel metal2 43 7 43 7 1 br1 rlabel metal2 50 7 50 7 8 br0 +rlabel metal1 19 49 19 49 1 Q +rlabel metal1 35 42 35 42 1 Q_bar << end >> diff --git a/technology/scn4m_subm/mag_lib/cell_1w_1r.mag b/technology/scn4m_subm/mag_lib/cell_1w_1r.mag index 9aec1c5d..91d06069 100644 --- a/technology/scn4m_subm/mag_lib/cell_1w_1r.mag +++ b/technology/scn4m_subm/mag_lib/cell_1w_1r.mag @@ -1,22 +1,31 @@ magic tech scmos -timestamp 1542220294 -<< nwell >> -rect 0 46 54 75 +timestamp 1572948787 << pwell >> rect 0 0 54 46 -<< ntransistor >> -rect 14 33 16 37 -rect 22 29 24 37 -rect 30 29 32 37 -rect 38 33 40 37 -rect 14 17 16 23 -rect 22 17 24 23 -rect 30 17 32 23 -rect 38 17 40 23 -<< ptransistor >> -rect 22 54 24 57 -rect 30 54 32 57 +<< nwell >> +rect 0 46 54 75 +<< polysilicon >> +rect 22 57 24 60 +rect 30 57 32 60 +rect 22 44 24 54 +rect 30 51 32 54 +rect 31 47 32 51 +rect 14 37 16 44 +rect 22 40 23 44 +rect 22 37 24 40 +rect 30 37 32 47 +rect 38 37 40 44 +rect 14 31 16 33 +rect 38 31 40 33 +rect 14 23 16 24 +rect 22 23 24 29 +rect 30 23 32 29 +rect 38 23 40 24 +rect 14 15 16 17 +rect 22 15 24 17 +rect 30 15 32 17 +rect 38 15 40 17 << ndiffusion >> rect 13 33 14 37 rect 16 33 17 37 @@ -41,46 +50,6 @@ rect 21 54 22 57 rect 24 54 25 57 rect 29 54 30 57 rect 32 54 33 57 -<< ndcontact >> -rect 9 33 13 37 -rect 17 33 21 37 -rect 25 29 29 37 -rect 33 33 37 37 -rect 41 33 45 37 -rect 25 17 29 23 -<< pdcontact >> -rect 17 54 21 58 -rect 33 54 37 58 -<< psubstratepcontact >> -rect 25 9 29 13 -<< polysilicon >> -rect 22 57 24 60 -rect 30 57 32 60 -rect 22 44 24 54 -rect 30 51 32 54 -rect 31 47 32 51 -rect 14 37 16 44 -rect 22 40 23 44 -rect 22 37 24 40 -rect 30 37 32 47 -rect 38 37 40 44 -rect 14 31 16 33 -rect 38 31 40 33 -rect 14 23 16 24 -rect 22 23 24 29 -rect 30 23 32 29 -rect 38 23 40 24 -rect 14 15 16 17 -rect 22 15 24 17 -rect 30 15 32 17 -rect 38 15 40 17 -<< polycontact >> -rect 27 47 31 51 -rect 10 40 14 44 -rect 23 40 27 44 -rect 40 40 44 44 -rect 12 24 16 28 -rect 38 24 42 28 << metal1 >> rect 0 68 25 72 rect 29 68 54 72 @@ -102,20 +71,6 @@ rect 29 9 54 13 rect 0 2 16 6 rect 20 2 34 6 rect 38 2 54 6 -<< m2contact >> -rect 2 33 6 37 -rect 48 33 52 37 -rect 16 24 20 28 -rect 34 24 38 28 -rect 16 2 20 6 -rect 34 2 38 6 -<< pdm12contact >> -rect 25 54 29 58 -<< ndm12contact >> -rect 9 17 13 21 -rect 41 17 45 21 -<< nsm12contact >> -rect 25 68 29 72 << metal2 >> rect 2 37 6 72 rect 2 0 6 33 @@ -125,11 +80,47 @@ rect 9 0 13 17 rect 16 6 20 24 rect 34 6 38 24 rect 41 21 45 72 -rect 41 0 45 17 rect 48 37 52 72 +rect 41 0 45 17 rect 48 0 52 33 -<< comment >> -rect 0 0 54 70 +<< ntransistor >> +rect 14 33 16 37 +rect 22 29 24 37 +rect 30 29 32 37 +rect 38 33 40 37 +rect 14 17 16 23 +rect 22 17 24 23 +rect 30 17 32 23 +rect 38 17 40 23 +<< ptransistor >> +rect 22 54 24 57 +rect 30 54 32 57 +<< polycontact >> +rect 27 47 31 51 +rect 10 40 14 44 +rect 23 40 27 44 +rect 40 40 44 44 +rect 12 24 16 28 +rect 38 24 42 28 +<< ndcontact >> +rect 9 33 13 37 +rect 17 33 21 37 +rect 25 29 29 37 +rect 33 33 37 37 +rect 41 33 45 37 +rect 25 17 29 23 +<< pdcontact >> +rect 17 54 21 58 +rect 33 54 37 58 +<< m2contact >> +rect 2 33 6 37 +rect 48 33 52 37 +rect 16 24 20 28 +rect 34 24 38 28 +rect 16 2 20 6 +rect 34 2 38 6 +<< psubstratepcontact >> +rect 25 9 29 13 << labels >> rlabel metal1 19 63 19 63 1 wl0 rlabel metal1 19 70 19 70 5 vdd @@ -139,4 +130,6 @@ rlabel metal2 4 7 4 7 2 bl0 rlabel metal2 11 7 11 7 1 bl1 rlabel metal2 43 7 43 7 1 br1 rlabel metal2 50 7 50 7 8 br0 +rlabel metal1 19 49 19 49 1 Q +rlabel metal1 35 42 35 42 1 Q_bar << end >> diff --git a/technology/scn4m_subm/mag_lib/cell_6t.mag b/technology/scn4m_subm/mag_lib/cell_6t.mag index bb9d943d..6b277af2 100644 --- a/technology/scn4m_subm/mag_lib/cell_6t.mag +++ b/technology/scn4m_subm/mag_lib/cell_6t.mag @@ -1,18 +1,28 @@ magic tech scmos -timestamp 1560809302 -<< nwell >> -rect -8 35 42 57 +timestamp 1572949512 << pwell >> rect -8 -2 42 35 -<< ntransistor >> -rect 7 16 9 24 -rect 29 16 31 24 -rect 10 9 14 11 -rect 24 9 28 11 -<< ptransistor >> -rect 7 43 11 46 -rect 27 43 31 46 +<< nwell >> +rect -8 35 42 57 +<< polysilicon >> +rect 7 46 11 48 +rect 27 46 31 48 +rect 7 41 11 43 +rect 7 27 9 41 +rect 27 40 31 43 +rect 15 39 31 40 +rect 19 38 31 39 +rect 7 26 21 27 +rect 7 25 24 26 +rect 7 24 9 25 +rect 29 24 31 38 +rect 7 14 9 16 +rect 17 11 21 12 +rect 29 14 31 16 +rect -2 9 10 11 +rect 14 9 24 11 +rect 28 9 36 11 << ndiffusion >> rect -2 22 7 24 rect 2 18 7 22 @@ -33,45 +43,6 @@ rect 2 43 7 46 rect 11 43 12 46 rect 26 43 27 46 rect 31 43 32 46 -<< ndcontact >> -rect -2 18 2 22 -rect 10 20 14 24 -rect 24 20 28 24 -rect 32 18 36 22 -rect 10 4 14 8 -rect 24 4 28 8 -<< pdcontact >> -rect -2 42 2 46 -rect 12 42 16 46 -rect 22 42 26 46 -rect 32 42 36 46 -<< psubstratepcontact >> -rect -2 28 2 32 -rect 32 28 36 32 -<< nsubstratencontact >> -rect 32 50 36 54 -<< polysilicon >> -rect 7 46 11 48 -rect 27 46 31 48 -rect 7 41 11 43 -rect 7 27 9 41 -rect 27 40 31 43 -rect 15 39 31 40 -rect 19 38 31 39 -rect 7 26 21 27 -rect 7 25 24 26 -rect 7 24 9 25 -rect 29 24 31 38 -rect 7 14 9 16 -rect 17 11 21 12 -rect 29 14 31 16 -rect -2 9 10 11 -rect 14 9 24 11 -rect 28 9 36 11 -<< polycontact >> -rect 15 35 19 39 -rect 21 26 25 30 -rect 17 12 21 16 << metal1 >> rect -2 50 15 54 rect 19 50 32 54 @@ -92,12 +63,6 @@ rect 32 22 36 28 rect -2 12 17 15 rect 21 12 36 15 rect -2 11 36 12 -<< m2contact >> -rect 15 50 19 54 -rect -2 35 2 39 -rect 32 35 36 39 -rect 6 4 10 8 -rect 20 4 24 8 << metal2 >> rect -2 39 2 54 rect -2 0 2 35 @@ -106,8 +71,41 @@ rect 6 0 10 4 rect 24 0 28 54 rect 32 39 36 54 rect 32 0 36 35 -<< bb >> -rect 0 0 34 52 +<< ntransistor >> +rect 7 16 9 24 +rect 29 16 31 24 +rect 10 9 14 11 +rect 24 9 28 11 +<< ptransistor >> +rect 7 43 11 46 +rect 27 43 31 46 +<< polycontact >> +rect 15 35 19 39 +rect 21 26 25 30 +rect 17 12 21 16 +<< ndcontact >> +rect -2 18 2 22 +rect 10 20 14 24 +rect 24 20 28 24 +rect 32 18 36 22 +rect 10 4 14 8 +rect 24 4 28 8 +<< pdcontact >> +rect -2 42 2 46 +rect 12 42 16 46 +rect 22 42 26 46 +rect 32 42 36 46 +<< m2contact >> +rect 15 50 19 54 +rect -2 35 2 39 +rect 32 35 36 39 +rect 6 4 10 8 +rect 20 4 24 8 +<< psubstratepcontact >> +rect -2 28 2 32 +rect 32 28 36 32 +<< nsubstratencontact >> +rect 32 50 36 54 << labels >> rlabel metal2 0 6 0 6 1 gnd rlabel metal2 34 6 34 6 1 gnd @@ -115,4 +113,6 @@ rlabel m2contact 17 52 17 52 5 vdd rlabel metal2 8 49 8 49 1 bl rlabel metal2 26 49 26 49 1 br rlabel metal1 4 13 4 13 1 wl +rlabel polycontact 23 28 23 28 1 Q_bar +rlabel polycontact 17 37 17 37 1 Q << end >> diff --git a/technology/scn4m_subm/mag_lib/dummy_cell_1rw_1r.mag b/technology/scn4m_subm/mag_lib/dummy_cell_1rw_1r.mag index 60e24aca..79b5daf0 100644 --- a/technology/scn4m_subm/mag_lib/dummy_cell_1rw_1r.mag +++ b/technology/scn4m_subm/mag_lib/dummy_cell_1rw_1r.mag @@ -1,63 +1,10 @@ magic tech scmos -timestamp 1562188987 -<< nwell >> -rect 0 46 54 75 +timestamp 1572949567 << pwell >> rect 0 0 54 46 -<< ntransistor >> -rect 14 33 16 37 -rect 22 29 24 37 -rect 30 29 32 37 -rect 38 33 40 37 -rect 14 17 16 23 -rect 22 17 24 23 -rect 30 17 32 23 -rect 38 17 40 23 -<< ptransistor >> -rect 22 54 24 57 -rect 30 54 32 57 -<< ndiffusion >> -rect 13 33 14 37 -rect 16 33 17 37 -rect 21 33 22 37 -rect 17 29 22 33 -rect 24 29 25 37 -rect 29 29 30 37 -rect 32 33 33 37 -rect 37 33 38 37 -rect 40 33 41 37 -rect 32 29 37 33 -rect 9 21 14 23 -rect 13 17 14 21 -rect 16 17 22 23 -rect 24 17 25 23 -rect 29 17 30 23 -rect 32 17 38 23 -rect 40 21 45 23 -rect 40 17 41 21 -<< pdiffusion >> -rect 21 54 22 57 -rect 24 54 25 57 -rect 29 54 30 57 -rect 32 54 33 57 -<< ndcontact >> -rect 9 33 13 37 -rect 17 33 21 37 -rect 25 29 29 37 -rect 33 33 37 37 -rect 41 33 45 37 -rect 9 17 13 21 -rect 25 17 29 23 -rect 41 17 45 21 -<< pdcontact >> -rect 17 54 21 58 -rect 25 54 29 58 -rect 33 54 37 58 -<< psubstratepcontact >> -rect 25 9 29 13 -<< nsubstratencontact >> -rect 25 68 29 72 +<< nwell >> +rect 0 46 54 75 << polysilicon >> rect 22 57 24 60 rect 30 57 32 60 @@ -79,13 +26,30 @@ rect 14 15 16 17 rect 22 15 24 17 rect 30 15 32 17 rect 38 15 40 17 -<< polycontact >> -rect 27 47 31 51 -rect 10 40 14 44 -rect 23 40 27 44 -rect 40 40 44 44 -rect 12 24 16 28 -rect 38 24 42 28 +<< ndiffusion >> +rect 13 33 14 37 +rect 16 33 17 37 +rect 21 33 22 37 +rect 17 29 22 33 +rect 24 29 25 37 +rect 29 29 30 37 +rect 32 33 33 37 +rect 37 33 38 37 +rect 40 33 41 37 +rect 32 29 37 33 +rect 9 21 14 23 +rect 13 17 14 21 +rect 16 17 22 23 +rect 24 17 25 23 +rect 29 17 30 23 +rect 32 17 38 23 +rect 40 21 45 23 +rect 40 17 41 21 +<< pdiffusion >> +rect 25 57 29 58 +rect 21 54 22 57 +rect 24 54 30 57 +rect 32 54 33 57 << metal1 >> rect 0 68 25 72 rect 29 68 54 72 @@ -107,13 +71,6 @@ rect 29 9 54 13 rect 0 2 16 6 rect 20 2 34 6 rect 38 2 54 6 -<< m2contact >> -rect 25 68 29 72 -rect 25 54 29 58 -rect 16 24 20 28 -rect 34 24 38 28 -rect 16 2 20 6 -rect 34 2 38 6 << metal2 >> rect 2 0 6 72 rect 9 0 13 72 @@ -122,8 +79,48 @@ rect 16 6 20 24 rect 34 6 38 24 rect 41 0 45 72 rect 48 0 52 72 -<< comment >> -rect 0 0 54 70 +<< ntransistor >> +rect 14 33 16 37 +rect 22 29 24 37 +rect 30 29 32 37 +rect 38 33 40 37 +rect 14 17 16 23 +rect 22 17 24 23 +rect 30 17 32 23 +rect 38 17 40 23 +<< ptransistor >> +rect 22 54 24 57 +rect 30 54 32 57 +<< polycontact >> +rect 27 47 31 51 +rect 10 40 14 44 +rect 23 40 27 44 +rect 40 40 44 44 +rect 12 24 16 28 +rect 38 24 42 28 +<< ndcontact >> +rect 9 33 13 37 +rect 17 33 21 37 +rect 25 29 29 37 +rect 33 33 37 37 +rect 41 33 45 37 +rect 9 17 13 21 +rect 25 17 29 23 +rect 41 17 45 21 +<< pdcontact >> +rect 17 54 21 58 +rect 33 54 37 58 +<< m2contact >> +rect 25 68 29 72 +rect 25 54 29 58 +rect 16 24 20 28 +rect 34 24 38 28 +rect 16 2 20 6 +rect 34 2 38 6 +<< psubstratepcontact >> +rect 25 9 29 13 +<< nsubstratendiff >> +rect 25 68 29 72 << labels >> rlabel metal1 19 63 19 63 1 wl0 rlabel metal1 19 70 19 70 5 vdd @@ -133,4 +130,6 @@ rlabel metal2 4 7 4 7 2 bl0 rlabel metal2 11 7 11 7 1 bl1 rlabel metal2 43 7 43 7 1 br1 rlabel metal2 50 7 50 7 8 br0 +rlabel polycontact 29 49 29 49 1 Q +rlabel polycontact 25 42 25 42 1 Q_bar << end >> diff --git a/technology/scn4m_subm/mag_lib/dummy_cell_1w_1r.mag b/technology/scn4m_subm/mag_lib/dummy_cell_1w_1r.mag index 03e49f03..9166b42a 100644 --- a/technology/scn4m_subm/mag_lib/dummy_cell_1w_1r.mag +++ b/technology/scn4m_subm/mag_lib/dummy_cell_1w_1r.mag @@ -1,63 +1,10 @@ magic tech scmos -timestamp 1562189027 -<< nwell >> -rect 0 46 54 75 +timestamp 1572949619 << pwell >> rect 0 0 54 46 -<< ntransistor >> -rect 14 33 16 37 -rect 22 29 24 37 -rect 30 29 32 37 -rect 38 33 40 37 -rect 14 17 16 23 -rect 22 17 24 23 -rect 30 17 32 23 -rect 38 17 40 23 -<< ptransistor >> -rect 22 54 24 57 -rect 30 54 32 57 -<< ndiffusion >> -rect 13 33 14 37 -rect 16 33 17 37 -rect 21 33 22 37 -rect 17 29 22 33 -rect 24 29 25 37 -rect 29 29 30 37 -rect 32 33 33 37 -rect 37 33 38 37 -rect 40 33 41 37 -rect 32 29 37 33 -rect 9 21 14 23 -rect 13 17 14 21 -rect 16 17 22 23 -rect 24 17 25 23 -rect 29 17 30 23 -rect 32 17 38 23 -rect 40 21 45 23 -rect 40 17 41 21 -<< pdiffusion >> -rect 21 54 22 57 -rect 24 54 25 57 -rect 29 54 30 57 -rect 32 54 33 57 -<< ndcontact >> -rect 9 33 13 37 -rect 17 33 21 37 -rect 25 29 29 37 -rect 33 33 37 37 -rect 41 33 45 37 -rect 9 17 13 21 -rect 25 17 29 23 -rect 41 17 45 21 -<< pdcontact >> -rect 17 54 21 58 -rect 25 54 29 58 -rect 33 54 37 58 -<< psubstratepcontact >> -rect 25 9 29 13 -<< nsubstratencontact >> -rect 25 68 29 72 +<< nwell >> +rect 0 46 54 75 << polysilicon >> rect 22 57 24 60 rect 30 57 32 60 @@ -79,13 +26,30 @@ rect 14 15 16 17 rect 22 15 24 17 rect 30 15 32 17 rect 38 15 40 17 -<< polycontact >> -rect 27 47 31 51 -rect 10 40 14 44 -rect 23 40 27 44 -rect 40 40 44 44 -rect 12 24 16 28 -rect 38 24 42 28 +<< ndiffusion >> +rect 13 33 14 37 +rect 16 33 17 37 +rect 21 33 22 37 +rect 17 29 22 33 +rect 24 29 25 37 +rect 29 29 30 37 +rect 32 33 33 37 +rect 37 33 38 37 +rect 40 33 41 37 +rect 32 29 37 33 +rect 9 21 14 23 +rect 13 17 14 21 +rect 16 17 22 23 +rect 24 17 25 23 +rect 29 17 30 23 +rect 32 17 38 23 +rect 40 21 45 23 +rect 40 17 41 21 +<< pdiffusion >> +rect 25 57 29 58 +rect 21 54 22 57 +rect 24 54 30 57 +rect 32 54 33 57 << metal1 >> rect 0 68 25 72 rect 29 68 54 72 @@ -107,13 +71,6 @@ rect 29 9 54 13 rect 0 2 16 6 rect 20 2 34 6 rect 38 2 54 6 -<< m2contact >> -rect 25 68 29 72 -rect 25 54 29 58 -rect 16 24 20 28 -rect 34 24 38 28 -rect 16 2 20 6 -rect 34 2 38 6 << metal2 >> rect 2 0 6 72 rect 9 0 13 72 @@ -122,8 +79,48 @@ rect 16 6 20 24 rect 34 6 38 24 rect 41 0 45 72 rect 48 0 52 72 -<< comment >> -rect 0 0 54 70 +<< ntransistor >> +rect 14 33 16 37 +rect 22 29 24 37 +rect 30 29 32 37 +rect 38 33 40 37 +rect 14 17 16 23 +rect 22 17 24 23 +rect 30 17 32 23 +rect 38 17 40 23 +<< ptransistor >> +rect 22 54 24 57 +rect 30 54 32 57 +<< polycontact >> +rect 27 47 31 51 +rect 10 40 14 44 +rect 23 40 27 44 +rect 40 40 44 44 +rect 12 24 16 28 +rect 38 24 42 28 +<< ndcontact >> +rect 9 33 13 37 +rect 17 33 21 37 +rect 25 29 29 37 +rect 33 33 37 37 +rect 41 33 45 37 +rect 9 17 13 21 +rect 25 17 29 23 +rect 41 17 45 21 +<< pdcontact >> +rect 17 54 21 58 +rect 33 54 37 58 +<< m2contact >> +rect 25 68 29 72 +rect 25 54 29 58 +rect 16 24 20 28 +rect 34 24 38 28 +rect 16 2 20 6 +rect 34 2 38 6 +<< psubstratepcontact >> +rect 25 9 29 13 +<< nsubstratendiff >> +rect 25 68 29 72 << labels >> rlabel metal1 19 63 19 63 1 wl0 rlabel metal1 19 70 19 70 5 vdd @@ -133,4 +130,6 @@ rlabel metal2 4 7 4 7 2 bl0 rlabel metal2 11 7 11 7 1 bl1 rlabel metal2 43 7 43 7 1 br1 rlabel metal2 50 7 50 7 8 br0 +rlabel polycontact 29 49 29 49 1 Q +rlabel polycontact 25 42 25 42 1 Q_bar << end >> diff --git a/technology/scn4m_subm/mag_lib/dummy_cell_6t.mag b/technology/scn4m_subm/mag_lib/dummy_cell_6t.mag index 74562f15..7f7591ba 100644 --- a/technology/scn4m_subm/mag_lib/dummy_cell_6t.mag +++ b/technology/scn4m_subm/mag_lib/dummy_cell_6t.mag @@ -1,18 +1,28 @@ magic tech scmos -timestamp 1560809362 -<< nwell >> -rect -8 35 42 57 +timestamp 1572949665 << pwell >> rect -8 -2 42 35 -<< ntransistor >> -rect 7 16 9 24 -rect 29 16 31 24 -rect 10 9 14 11 -rect 24 9 28 11 -<< ptransistor >> -rect 7 43 11 46 -rect 27 43 31 46 +<< nwell >> +rect -8 35 42 57 +<< polysilicon >> +rect 7 46 11 48 +rect 27 46 31 48 +rect 7 41 11 43 +rect 7 27 9 41 +rect 27 40 31 43 +rect 15 39 31 40 +rect 19 38 31 39 +rect 7 26 21 27 +rect 7 25 24 26 +rect 7 24 9 25 +rect 29 24 31 38 +rect 7 14 9 16 +rect 17 11 21 12 +rect 29 14 31 16 +rect -2 9 10 11 +rect 14 9 24 11 +rect 28 9 36 11 << ndiffusion >> rect -2 22 7 24 rect 2 18 7 22 @@ -33,45 +43,6 @@ rect 2 43 7 46 rect 11 43 12 46 rect 26 43 27 46 rect 31 43 32 46 -<< ndcontact >> -rect -2 18 2 22 -rect 10 20 14 24 -rect 24 20 28 24 -rect 32 18 36 22 -rect 10 4 14 8 -rect 24 4 28 8 -<< pdcontact >> -rect -2 42 2 46 -rect 12 42 16 46 -rect 22 42 26 46 -rect 32 42 36 46 -<< psubstratepcontact >> -rect -2 28 2 32 -rect 32 28 36 32 -<< nsubstratencontact >> -rect 32 50 36 54 -<< polysilicon >> -rect 7 46 11 48 -rect 27 46 31 48 -rect 7 41 11 43 -rect 7 27 9 41 -rect 27 40 31 43 -rect 15 39 31 40 -rect 19 38 31 39 -rect 7 26 21 27 -rect 7 25 24 26 -rect 7 24 9 25 -rect 29 24 31 38 -rect 7 14 9 16 -rect 17 11 21 12 -rect 29 14 31 16 -rect -2 9 10 11 -rect 14 9 24 11 -rect 28 9 36 11 -<< polycontact >> -rect 15 35 19 39 -rect 21 26 25 30 -rect 17 12 21 16 << metal1 >> rect -2 50 15 54 rect 19 50 32 54 @@ -92,10 +63,6 @@ rect 32 22 36 28 rect -2 12 17 15 rect 21 12 36 15 rect -2 11 36 12 -<< m2contact >> -rect 15 50 19 54 -rect -2 35 2 39 -rect 32 35 36 39 << metal2 >> rect -2 39 2 54 rect -2 0 2 35 @@ -103,8 +70,39 @@ rect 6 0 10 54 rect 24 0 28 54 rect 32 39 36 54 rect 32 0 36 35 -<< bb >> -rect 0 0 34 52 +<< ntransistor >> +rect 7 16 9 24 +rect 29 16 31 24 +rect 10 9 14 11 +rect 24 9 28 11 +<< ptransistor >> +rect 7 43 11 46 +rect 27 43 31 46 +<< polycontact >> +rect 15 35 19 39 +rect 21 26 25 30 +rect 17 12 21 16 +<< ndcontact >> +rect -2 18 2 22 +rect 10 20 14 24 +rect 24 20 28 24 +rect 32 18 36 22 +rect 10 4 14 8 +rect 24 4 28 8 +<< pdcontact >> +rect -2 42 2 46 +rect 12 42 16 46 +rect 22 42 26 46 +rect 32 42 36 46 +<< m2contact >> +rect 15 50 19 54 +rect -2 35 2 39 +rect 32 35 36 39 +<< psubstratepcontact >> +rect -2 28 2 32 +rect 32 28 36 32 +<< nsubstratencontact >> +rect 32 50 36 54 << labels >> rlabel metal2 0 6 0 6 1 gnd rlabel metal2 34 6 34 6 1 gnd @@ -112,4 +110,6 @@ rlabel m2contact 17 52 17 52 5 vdd rlabel metal2 8 49 8 49 1 bl rlabel metal2 26 49 26 49 1 br rlabel metal1 4 13 4 13 1 wl +rlabel polycontact 17 37 17 37 1 Q +rlabel polycontact 23 28 23 28 1 Q_bar << end >> diff --git a/technology/scn4m_subm/mag_lib/replica_cell_1rw_1r.mag b/technology/scn4m_subm/mag_lib/replica_cell_1rw_1r.mag index f215ff04..9b6e203b 100644 --- a/technology/scn4m_subm/mag_lib/replica_cell_1rw_1r.mag +++ b/technology/scn4m_subm/mag_lib/replica_cell_1rw_1r.mag @@ -1,63 +1,10 @@ magic tech scmos -timestamp 1542221056 -<< nwell >> -rect 0 46 54 75 +timestamp 1572949704 << pwell >> rect 0 0 54 46 -<< ntransistor >> -rect 14 33 16 37 -rect 22 29 24 37 -rect 30 29 32 37 -rect 38 33 40 37 -rect 14 17 16 23 -rect 22 17 24 23 -rect 30 17 32 23 -rect 38 17 40 23 -<< ptransistor >> -rect 22 54 24 57 -rect 30 54 32 57 -<< ndiffusion >> -rect 13 33 14 37 -rect 16 33 17 37 -rect 21 33 22 37 -rect 17 29 22 33 -rect 24 29 25 37 -rect 29 29 30 37 -rect 32 33 33 37 -rect 37 33 38 37 -rect 40 33 41 37 -rect 32 29 37 33 -rect 9 21 14 23 -rect 13 17 14 21 -rect 16 17 22 23 -rect 24 17 25 23 -rect 29 17 30 23 -rect 32 17 38 23 -rect 40 21 45 23 -rect 40 17 41 21 -<< pdiffusion >> -rect 21 54 22 57 -rect 24 54 25 57 -rect 29 54 30 57 -rect 32 54 33 57 -<< ndcontact >> -rect 9 33 13 37 -rect 17 33 21 37 -rect 25 29 29 37 -rect 33 33 37 37 -rect 41 33 45 37 -rect 9 17 13 21 -rect 25 17 29 23 -rect 41 17 45 21 -<< pdcontact >> -rect 17 54 21 58 -rect 25 54 29 58 -rect 33 54 37 58 -<< psubstratepcontact >> -rect 25 9 29 13 -<< nsubstratencontact >> -rect 25 68 29 72 +<< nwell >> +rect 0 46 54 75 << polysilicon >> rect 22 57 24 60 rect 30 57 32 60 @@ -79,13 +26,28 @@ rect 14 15 16 17 rect 22 15 24 17 rect 30 15 32 17 rect 38 15 40 17 -<< polycontact >> -rect 27 47 31 51 -rect 10 40 14 44 -rect 23 40 27 44 -rect 40 40 44 44 -rect 12 24 16 28 -rect 38 24 42 28 +<< ndiffusion >> +rect 13 33 14 37 +rect 16 33 17 37 +rect 21 33 22 37 +rect 17 29 22 33 +rect 24 29 25 37 +rect 29 29 30 37 +rect 32 33 33 37 +rect 37 33 38 37 +rect 40 33 41 37 +rect 32 29 37 33 +rect 9 17 14 23 +rect 16 17 22 23 +rect 24 17 25 23 +rect 29 17 30 23 +rect 32 17 38 23 +rect 40 17 45 23 +<< pdiffusion >> +rect 25 57 29 58 +rect 21 54 22 57 +rect 24 54 30 57 +rect 32 54 33 57 << metal1 >> rect 0 68 25 72 rect 29 68 54 72 @@ -108,17 +70,6 @@ rect 29 9 54 13 rect 0 2 16 6 rect 20 2 34 6 rect 38 2 54 6 -<< m2contact >> -rect 25 68 29 72 -rect 25 54 29 58 -rect 2 33 6 37 -rect 48 33 52 37 -rect 16 24 20 28 -rect 34 24 38 28 -rect 9 17 13 21 -rect 41 17 45 21 -rect 16 2 20 6 -rect 34 2 38 6 << metal2 >> rect 2 37 6 72 rect 2 0 6 33 @@ -131,8 +82,50 @@ rect 41 21 45 72 rect 41 0 45 17 rect 48 37 52 72 rect 48 0 52 33 -<< comment >> -rect 0 0 54 70 +<< ntransistor >> +rect 14 33 16 37 +rect 22 29 24 37 +rect 30 29 32 37 +rect 38 33 40 37 +rect 14 17 16 23 +rect 22 17 24 23 +rect 30 17 32 23 +rect 38 17 40 23 +<< ptransistor >> +rect 22 54 24 57 +rect 30 54 32 57 +<< polycontact >> +rect 27 47 31 51 +rect 10 40 14 44 +rect 23 40 27 44 +rect 40 40 44 44 +rect 12 24 16 28 +rect 38 24 42 28 +<< ndcontact >> +rect 9 33 13 37 +rect 17 33 21 37 +rect 25 29 29 37 +rect 33 33 37 37 +rect 41 33 45 37 +rect 25 17 29 23 +<< pdcontact >> +rect 17 54 21 58 +rect 33 54 37 58 +<< m2contact >> +rect 25 68 29 72 +rect 25 54 29 58 +rect 2 33 6 37 +rect 48 33 52 37 +rect 16 24 20 28 +rect 34 24 38 28 +rect 9 17 13 21 +rect 41 17 45 21 +rect 16 2 20 6 +rect 34 2 38 6 +<< psubstratepcontact >> +rect 25 9 29 13 +<< nsubstratendiff >> +rect 25 68 29 72 << labels >> rlabel metal1 19 63 19 63 1 wl0 rlabel metal1 19 70 19 70 5 vdd @@ -142,4 +135,6 @@ rlabel metal2 4 7 4 7 2 bl0 rlabel metal2 11 7 11 7 1 bl1 rlabel metal2 43 7 43 7 1 br1 rlabel metal2 50 7 50 7 8 br0 +rlabel polycontact 29 49 29 49 1 Q +rlabel polycontact 25 42 25 42 1 Q_bar << end >> diff --git a/technology/scn4m_subm/mag_lib/replica_cell_1w_1r.mag b/technology/scn4m_subm/mag_lib/replica_cell_1w_1r.mag index f215ff04..b2a525e8 100644 --- a/technology/scn4m_subm/mag_lib/replica_cell_1w_1r.mag +++ b/technology/scn4m_subm/mag_lib/replica_cell_1w_1r.mag @@ -1,63 +1,10 @@ magic tech scmos -timestamp 1542221056 -<< nwell >> -rect 0 46 54 75 +timestamp 1572949741 << pwell >> rect 0 0 54 46 -<< ntransistor >> -rect 14 33 16 37 -rect 22 29 24 37 -rect 30 29 32 37 -rect 38 33 40 37 -rect 14 17 16 23 -rect 22 17 24 23 -rect 30 17 32 23 -rect 38 17 40 23 -<< ptransistor >> -rect 22 54 24 57 -rect 30 54 32 57 -<< ndiffusion >> -rect 13 33 14 37 -rect 16 33 17 37 -rect 21 33 22 37 -rect 17 29 22 33 -rect 24 29 25 37 -rect 29 29 30 37 -rect 32 33 33 37 -rect 37 33 38 37 -rect 40 33 41 37 -rect 32 29 37 33 -rect 9 21 14 23 -rect 13 17 14 21 -rect 16 17 22 23 -rect 24 17 25 23 -rect 29 17 30 23 -rect 32 17 38 23 -rect 40 21 45 23 -rect 40 17 41 21 -<< pdiffusion >> -rect 21 54 22 57 -rect 24 54 25 57 -rect 29 54 30 57 -rect 32 54 33 57 -<< ndcontact >> -rect 9 33 13 37 -rect 17 33 21 37 -rect 25 29 29 37 -rect 33 33 37 37 -rect 41 33 45 37 -rect 9 17 13 21 -rect 25 17 29 23 -rect 41 17 45 21 -<< pdcontact >> -rect 17 54 21 58 -rect 25 54 29 58 -rect 33 54 37 58 -<< psubstratepcontact >> -rect 25 9 29 13 -<< nsubstratencontact >> -rect 25 68 29 72 +<< nwell >> +rect 0 46 54 75 << polysilicon >> rect 22 57 24 60 rect 30 57 32 60 @@ -79,13 +26,28 @@ rect 14 15 16 17 rect 22 15 24 17 rect 30 15 32 17 rect 38 15 40 17 -<< polycontact >> -rect 27 47 31 51 -rect 10 40 14 44 -rect 23 40 27 44 -rect 40 40 44 44 -rect 12 24 16 28 -rect 38 24 42 28 +<< ndiffusion >> +rect 13 33 14 37 +rect 16 33 17 37 +rect 21 33 22 37 +rect 17 29 22 33 +rect 24 29 25 37 +rect 29 29 30 37 +rect 32 33 33 37 +rect 37 33 38 37 +rect 40 33 41 37 +rect 32 29 37 33 +rect 9 17 14 23 +rect 16 17 22 23 +rect 24 17 25 23 +rect 29 17 30 23 +rect 32 17 38 23 +rect 40 17 45 23 +<< pdiffusion >> +rect 25 57 29 58 +rect 21 54 22 57 +rect 24 54 30 57 +rect 32 54 33 57 << metal1 >> rect 0 68 25 72 rect 29 68 54 72 @@ -108,17 +70,6 @@ rect 29 9 54 13 rect 0 2 16 6 rect 20 2 34 6 rect 38 2 54 6 -<< m2contact >> -rect 25 68 29 72 -rect 25 54 29 58 -rect 2 33 6 37 -rect 48 33 52 37 -rect 16 24 20 28 -rect 34 24 38 28 -rect 9 17 13 21 -rect 41 17 45 21 -rect 16 2 20 6 -rect 34 2 38 6 << metal2 >> rect 2 37 6 72 rect 2 0 6 33 @@ -131,8 +82,50 @@ rect 41 21 45 72 rect 41 0 45 17 rect 48 37 52 72 rect 48 0 52 33 -<< comment >> -rect 0 0 54 70 +<< ntransistor >> +rect 14 33 16 37 +rect 22 29 24 37 +rect 30 29 32 37 +rect 38 33 40 37 +rect 14 17 16 23 +rect 22 17 24 23 +rect 30 17 32 23 +rect 38 17 40 23 +<< ptransistor >> +rect 22 54 24 57 +rect 30 54 32 57 +<< polycontact >> +rect 27 47 31 51 +rect 10 40 14 44 +rect 23 40 27 44 +rect 40 40 44 44 +rect 12 24 16 28 +rect 38 24 42 28 +<< ndcontact >> +rect 9 33 13 37 +rect 17 33 21 37 +rect 25 29 29 37 +rect 33 33 37 37 +rect 41 33 45 37 +rect 25 17 29 23 +<< pdcontact >> +rect 17 54 21 58 +rect 33 54 37 58 +<< m2contact >> +rect 25 68 29 72 +rect 25 54 29 58 +rect 2 33 6 37 +rect 48 33 52 37 +rect 16 24 20 28 +rect 34 24 38 28 +rect 9 17 13 21 +rect 41 17 45 21 +rect 16 2 20 6 +rect 34 2 38 6 +<< psubstratepcontact >> +rect 25 9 29 13 +<< nsubstratendiff >> +rect 25 68 29 72 << labels >> rlabel metal1 19 63 19 63 1 wl0 rlabel metal1 19 70 19 70 5 vdd @@ -142,4 +135,6 @@ rlabel metal2 4 7 4 7 2 bl0 rlabel metal2 11 7 11 7 1 bl1 rlabel metal2 43 7 43 7 1 br1 rlabel metal2 50 7 50 7 8 br0 +rlabel polycontact 29 49 29 49 1 Q +rlabel polycontact 25 42 25 42 1 Q_bar << end >> diff --git a/technology/scn4m_subm/mag_lib/replica_cell_6t.mag b/technology/scn4m_subm/mag_lib/replica_cell_6t.mag index b5a5f7b8..316082ca 100644 --- a/technology/scn4m_subm/mag_lib/replica_cell_6t.mag +++ b/technology/scn4m_subm/mag_lib/replica_cell_6t.mag @@ -1,18 +1,28 @@ magic tech scmos -timestamp 1560809329 -<< nwell >> -rect -8 35 42 57 +timestamp 1572949776 << pwell >> rect -8 -2 42 35 -<< ntransistor >> -rect 7 16 9 24 -rect 29 16 31 24 -rect 10 9 14 11 -rect 24 9 28 11 -<< ptransistor >> -rect 7 43 11 46 -rect 27 43 31 46 +<< nwell >> +rect -8 35 42 57 +<< polysilicon >> +rect 7 46 11 48 +rect 27 46 31 48 +rect 7 41 11 43 +rect 7 27 9 41 +rect 27 40 31 43 +rect 15 39 31 40 +rect 19 38 31 39 +rect 7 26 21 27 +rect 7 25 24 26 +rect 7 24 9 25 +rect 29 24 31 38 +rect 7 14 9 16 +rect 17 11 21 12 +rect 29 14 31 16 +rect -2 9 10 11 +rect 14 9 24 11 +rect 28 9 36 11 << ndiffusion >> rect -2 22 7 24 rect 2 18 7 22 @@ -33,45 +43,6 @@ rect 2 43 7 46 rect 11 43 12 46 rect 26 43 27 46 rect 31 43 32 46 -<< ndcontact >> -rect -2 18 2 22 -rect 10 20 14 24 -rect 24 20 28 24 -rect 32 18 36 22 -rect 10 4 14 8 -rect 24 4 28 8 -<< pdcontact >> -rect -2 42 2 46 -rect 12 42 16 46 -rect 22 42 26 46 -rect 32 42 36 46 -<< psubstratepcontact >> -rect -2 28 2 32 -rect 32 28 36 32 -<< nsubstratencontact >> -rect 32 50 36 54 -<< polysilicon >> -rect 7 46 11 48 -rect 27 46 31 48 -rect 7 41 11 43 -rect 7 27 9 41 -rect 27 40 31 43 -rect 15 39 31 40 -rect 19 38 31 39 -rect 7 26 21 27 -rect 7 25 24 26 -rect 7 24 9 25 -rect 29 24 31 38 -rect 7 14 9 16 -rect 17 11 21 12 -rect 29 14 31 16 -rect -2 9 10 11 -rect 14 9 24 11 -rect 28 9 36 11 -<< polycontact >> -rect 15 35 19 39 -rect 21 26 25 30 -rect 17 12 21 16 << metal1 >> rect -2 50 15 54 rect 19 50 32 54 @@ -93,12 +64,6 @@ rect 32 22 36 28 rect -2 12 17 15 rect 21 12 36 15 rect -2 11 36 12 -<< m2contact >> -rect 15 50 19 54 -rect -2 35 2 39 -rect 32 35 36 39 -rect 6 4 10 8 -rect 20 4 24 8 << metal2 >> rect -2 39 2 54 rect -2 0 2 35 @@ -107,8 +72,41 @@ rect 6 0 10 4 rect 24 0 28 54 rect 32 39 36 54 rect 32 0 36 35 -<< bb >> -rect 0 0 34 52 +<< ntransistor >> +rect 7 16 9 24 +rect 29 16 31 24 +rect 10 9 14 11 +rect 24 9 28 11 +<< ptransistor >> +rect 7 43 11 46 +rect 27 43 31 46 +<< polycontact >> +rect 15 35 19 39 +rect 21 26 25 30 +rect 17 12 21 16 +<< ndcontact >> +rect -2 18 2 22 +rect 10 20 14 24 +rect 24 20 28 24 +rect 32 18 36 22 +rect 10 4 14 8 +rect 24 4 28 8 +<< pdcontact >> +rect -2 42 2 46 +rect 12 42 16 46 +rect 22 42 26 46 +rect 32 42 36 46 +<< m2contact >> +rect 15 50 19 54 +rect -2 35 2 39 +rect 32 35 36 39 +rect 6 4 10 8 +rect 20 4 24 8 +<< psubstratepcontact >> +rect -2 28 2 32 +rect 32 28 36 32 +<< nsubstratencontact >> +rect 32 50 36 54 << labels >> rlabel metal2 0 6 0 6 1 gnd rlabel metal2 34 6 34 6 1 gnd @@ -116,4 +114,6 @@ rlabel m2contact 17 52 17 52 5 vdd rlabel metal2 8 49 8 49 1 bl rlabel metal2 26 49 26 49 1 br rlabel metal1 4 13 4 13 1 wl +rlabel polycontact 17 37 17 37 1 Q +rlabel polycontact 23 28 23 28 1 Q_bar << end >>