From f01e73328dd03a150b008f2a543dbb14785b1bb7 Mon Sep 17 00:00:00 2001
From: samuelkcrow <samuelkcrow@gmail.com>
Date: Fri, 22 Jul 2022 13:03:09 -0700
Subject: [PATCH] remove superfluous imports from multiport test

---
 compiler/tests/16_control_logic_delay_multiport_test.py | 2 --
 1 file changed, 2 deletions(-)

diff --git a/compiler/tests/16_control_logic_delay_multiport_test.py b/compiler/tests/16_control_logic_delay_multiport_test.py
index 7ea40309..590b2d7c 100755
--- a/compiler/tests/16_control_logic_delay_multiport_test.py
+++ b/compiler/tests/16_control_logic_delay_multiport_test.py
@@ -24,8 +24,6 @@ class control_logic_delay_test(openram_test):
     def runTest(self):
         config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME"))
         globals.init_openram(config_file)
-        import control_logic_delay
-        import tech
 
         # check control logic for multi-port
         OPTS.bitcell = "pbitcell"