From eec0f02bb87ff53535f5a684717edcd0042b4f5e Mon Sep 17 00:00:00 2001
From: Jacob Walker <jswalker@ucsc.edu>
Date: Thu, 9 Mar 2023 14:20:02 -0800
Subject: [PATCH] skip test file

---
 compiler/rom.py                               |  2 +-
 compiler/tests/05_rom_base_bank_small_test.py | 38 -------------------
 compiler/tests/skip_tests_freepdk45.txt       |  9 +++++
 3 files changed, 10 insertions(+), 39 deletions(-)
 delete mode 100644 compiler/tests/05_rom_base_bank_small_test.py
 create mode 100644 compiler/tests/skip_tests_freepdk45.txt

diff --git a/compiler/rom.py b/compiler/rom.py
index 8180b36c..0c84c8f0 100644
--- a/compiler/rom.py
+++ b/compiler/rom.py
@@ -25,7 +25,7 @@ class rom():
                                 word_size=OPTS.word_size,
                                 words_per_row=OPTS.words_per_row,
                                 rom_endian=OPTS.rom_endian,
-                                scramble_bits=OPTS.scramble_bits
+                                scramble_bits=OPTS.scramble_bits,
                                 strap_spacing=OPTS.strap_spacing)
 
         if name is None:
diff --git a/compiler/tests/05_rom_base_bank_small_test.py b/compiler/tests/05_rom_base_bank_small_test.py
deleted file mode 100644
index e752db77..00000000
--- a/compiler/tests/05_rom_base_bank_small_test.py
+++ /dev/null
@@ -1,38 +0,0 @@
-#!/usr/bin/env python3
-# See LICENSE for licensing information.
-#
-# Copyright (c) 2016-2023 Regents of the University of California and The Board
-# of Regents for the Oklahoma Agricultural and Mechanical College
-# (acting for and on behalf of Oklahoma State University)
-# All rights reserved.
-#
-import unittest
-from testutils import *
-import sys, os
-
-import openram
-from openram import OPTS
-from openram.sram_factory import factory
-from openram import debug
-
-
-class rom_bank_test(openram_test):
-
-    def runTest(self):
-        config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME"))
-        openram.init_openram(config_file, is_unit_test=True)
-        debug.info(1, "Testing 64 byte rom cell")
-
-        test_data = "{0}/{1}/rom_data_64B".format(os.getenv("OPENRAM_HOME"), OPTS.rom_data_dir)
-        a = factory.create(module_type="rom_base_bank", strap_spacing = 8, data_file = test_data, word_size = 1)
-
-        self.local_check(a)
-        a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
-        openram.end_openram()
-
-# run the test from the command line
-if __name__ == "__main__":
-    (OPTS, args) = openram.parse_args()
-    del sys.argv[1:]
-    header(__file__, OPTS.tech_name)
-    unittest.main(testRunner=debugTestRunner())
diff --git a/compiler/tests/skip_tests_freepdk45.txt b/compiler/tests/skip_tests_freepdk45.txt
new file mode 100644
index 00000000..2e0734d5
--- /dev/null
+++ b/compiler/tests/skip_tests_freepdk45.txt
@@ -0,0 +1,9 @@
+05_rom_base_bank_1kB_test.py
+05_rom_base_bank_4kB_test.py
+05_rom_array_test.py
+05_rom_decoder_test.py
+05_rom_precharge_array_test.py
+05_rom_wordline_driver_array_test.py
+05_rom_decoder_buffer_array_test.py
+05_rom_column_mux_array_test.py
+05_rom_control_logic_test.py
\ No newline at end of file