From ed11145ca49a365cd46641d288fb1ef64b55b91b Mon Sep 17 00:00:00 2001 From: jcirimel Date: Tue, 4 Feb 2020 23:35:06 -0800 Subject: [PATCH] add custom module file, make dff clk pin dynamic --- compiler/modules/custom_module_properties.py | 8 +++++--- compiler/modules/dff.py | 2 ++ compiler/modules/dff_array.py | 15 ++++++++------- 3 files changed, 15 insertions(+), 10 deletions(-) diff --git a/compiler/modules/custom_module_properties.py b/compiler/modules/custom_module_properties.py index 43c140b0..e27741ea 100644 --- a/compiler/modules/custom_module_properties.py +++ b/compiler/modules/custom_module_properties.py @@ -7,10 +7,11 @@ # class _dff: - def __init__(self, use_custom_ports, custom_port_list, custom_type_list): + def __init__(self, use_custom_ports, custom_port_list, custom_type_list, clk_pin): self.use_custom_ports = use_custom_ports self.custom_port_list = custom_port_list self.custom_type_list = custom_type_list + self.clk_pin = clk_pin class module_properties(): """ @@ -19,8 +20,9 @@ class module_properties(): def __init__(self): self.names = {} self._dff = _dff(use_custom_ports = False, - custom_port_list = [], - custom_type_list = []) + custom_port_list = ["D", "Q", "clk", "vdd", "gnd"], + custom_type_list = ["INPUT", "OUTPUT", "INPUT", "POWER", "GROUND"], + clk_pin= "clk") @property def dff(self): diff --git a/compiler/modules/dff.py b/compiler/modules/dff.py index 1078088e..45d20a62 100644 --- a/compiler/modules/dff.py +++ b/compiler/modules/dff.py @@ -18,9 +18,11 @@ class dff(design.design): if not module_properties.dff.use_custom_ports: pin_names = ["D", "Q", "clk", "vdd", "gnd"] type_list = ["INPUT", "OUTPUT", "INPUT", "POWER", "GROUND"] + clk_pin = "clk" else: pin_names = module_properties.dff.custom_port_list type_list = module_properties.dff.custom_type_list + clk_pin = module_properties.dff.clk_pin (width, height) = utils.get_libcell_size("dff", GDS["unit"], diff --git a/compiler/modules/dff_array.py b/compiler/modules/dff_array.py index 6ba020c7..62464834 100644 --- a/compiler/modules/dff_array.py +++ b/compiler/modules/dff_array.py @@ -69,11 +69,12 @@ class dff_array(design.design): name = "dff_r{0}_c{1}".format(row,col) self.dff_insts[row,col]=self.add_inst(name=name, mod=self.dff) - self.connect_inst([self.get_din_name(row,col), - self.get_dout_name(row,col), - "clk", - "vdd", - "gnd"]) + instance_ports = [self.get_din_name(row,col), + self.get_dout_name(row,col)] + for port in self.dff.pin_names: + if port != 'D' and port != 'Q': + instance_ports.append(port) + self.connect_inst(instance_ports) def place_dff_array(self): for row in range(self.rows): @@ -142,7 +143,7 @@ class dff_array(design.design): # Create vertical spines to a single horizontal rail - clk_pin = self.dff_insts[0,0].get_pin("clk") + clk_pin = self.dff_insts[0,0].get_pin(self.dff.clk_pin) clk_ypos = 2*self.m3_pitch+self.m3_width debug.check(clk_pin.layer=="m2","DFF clk pin not on metal2") self.add_layout_pin_segment_center(text="clk", @@ -150,7 +151,7 @@ class dff_array(design.design): start=vector(0,clk_ypos), end=vector(self.width,clk_ypos)) for col in range(self.columns): - clk_pin = self.dff_insts[0,col].get_pin("clk") + clk_pin = self.dff_insts[0,col].get_pin(self.dff.clk_pin) # Make a vertical strip for each column self.add_rect(layer="m2", offset=clk_pin.ll().scale(1,0),