diff --git a/compiler/characterizer/functional.py b/compiler/characterizer/functional.py
index cf0a30c4..743520e8 100644
--- a/compiler/characterizer/functional.py
+++ b/compiler/characterizer/functional.py
@@ -57,8 +57,7 @@ class functional(simulation):
                     self.wmask[self.num_wmask-1 - bit] = 1
                 else:
                     self.wmask[self.num_wmask-1 - bit] = 0
-            print(self.wmask)
-    
+
     def run(self, feasible_period=None):
         if feasible_period: #period defaults to tech.py feasible period otherwise.
             self.period = feasible_period
@@ -110,7 +109,7 @@ class functional(simulation):
                     elif bit == 0:
                         word = old_word[lower:upper+1] + word [upper+1:self.word_size]
                     else:
-                        word = word[0:lower] + old_word[lower:upper+1] + word [upper+1:self.word_size]cfusms
+                        word = word[0:lower] + old_word[lower:upper+1] + word [upper+1:self.word_size]
                     #word = word.replace(word[lower:upper+1],old_word[lower:upper+1],1)
             self.stored_words[addr] = word
         else:
diff --git a/compiler/modules/port_data.py b/compiler/modules/port_data.py
index b0c74a8d..2f5b634f 100644
--- a/compiler/modules/port_data.py
+++ b/compiler/modules/port_data.py
@@ -56,9 +56,12 @@ class port_data(design.design):
             self.create_write_driver_array()
             if (self.word_size != self.write_size):
                 self.create_write_mask_array()
+            else:
+                self.write_mask_array_inst = None
         else:
             self.write_driver_array_inst = None
-            
+            self.write_mask_array_inst = None
+
         if self.column_mux_array:
             self.create_column_mux_array()
         else:
@@ -173,9 +176,12 @@ class port_data(design.design):
                                                          word_size=self.word_size,
                                                          write_size=self.write_size)
                 self.add_mod(self.write_driver_array)
+            else:
+                self.write_mask_array_inst = None
+
         else:
             self.write_driver_array = None
-
+            self.write_mask_array = None
 
     def precompute_constants(self):
         """  Get some preliminary data ready """
diff --git a/compiler/options.py b/compiler/options.py
index 833d5289..a80790eb 100644
--- a/compiler/options.py
+++ b/compiler/options.py
@@ -142,4 +142,5 @@ class options(optparse.Values):
     wordline_driver = "wordline_driver"
     write_driver_array = "write_driver_array"
     write_driver = "write_driver"
+    write_mask_array = "write_mask_array"
 
diff --git a/compiler/sram/sram_config.py b/compiler/sram/sram_config.py
index ded595e0..67bfc452 100644
--- a/compiler/sram/sram_config.py
+++ b/compiler/sram/sram_config.py
@@ -73,6 +73,10 @@ class sram_config:
         SRAM for testing.
         """
 
+        # This function is ran without the write mask option, but word_size can be redefined
+        # which makes the tests think there is a write mask.
+        self.write_size = self.word_size
+
         # If the banks changed
         self.num_words_per_bank = self.num_words/self.num_banks
         self.num_bits_per_bank = self.word_size*self.num_words_per_bank