From e611f66767f7a167755d82acbf25c048a3fce7c2 Mon Sep 17 00:00:00 2001 From: mrg Date: Tue, 25 May 2021 13:26:01 -0700 Subject: [PATCH] Add dnwell --- compiler/sram/sram_1bank.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/compiler/sram/sram_1bank.py b/compiler/sram/sram_1bank.py index a6eb9b71..327ce209 100644 --- a/compiler/sram/sram_1bank.py +++ b/compiler/sram/sram_1bank.py @@ -326,6 +326,9 @@ class sram_1bank(sram_base): # they might create some blockages self.add_layout_pins() + # Some technologies have an isolation + self.add_dnwell(inflate=2) + # Route the pins to the perimeter if OPTS.perimeter_pins: self.route_escape_pins()