diff --git a/compiler/options.py b/compiler/options.py
index e4a61052..2a5c6a6f 100644
--- a/compiler/options.py
+++ b/compiler/options.py
@@ -92,7 +92,7 @@ class options(optparse.Values):
     # When enabled, layout is not generated (and no DRC or LVS are performed)
     netlist_only = False
     # Whether we should do the final power routing
-    route_supplies = False
+    route_supplies = "tree"
     # This determines whether LVS and DRC is checked at all.
     check_lvsdrc = False
     # This determines whether LVS and DRC is checked for every submodule.
@@ -141,7 +141,7 @@ class options(optparse.Values):
     # run (doesn't purge on errors, anyhow)
 
     # Route the input/output pins to the perimeter
-    perimeter_pins = False
+    perimeter_pins = True
 
     keep_temp = False
 
diff --git a/compiler/tests/configs/config.py b/compiler/tests/configs/config.py
index d6080041..9b88c986 100644
--- a/compiler/tests/configs/config.py
+++ b/compiler/tests/configs/config.py
@@ -11,9 +11,6 @@ num_words = 16
 
 tech_name = OPTS.tech_name
 
-perimeter_pins = True
-
 nominal_corner_only = True
-route_supplies = "tree"
 check_lvsdrc = True