From d6d96907efc3c9959c7956154e44effd78650772 Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Fri, 2 Feb 2018 15:50:45 -0800 Subject: [PATCH] Route to the right in the bank decode for DRC. --- compiler/sram.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler/sram.py b/compiler/sram.py index 9d602097..70e6f80a 100644 --- a/compiler/sram.py +++ b/compiler/sram.py @@ -650,7 +650,7 @@ class sram(design.design): # Connect the output bar to select 0 msb_out_pin = self.msb_address_inst.get_pin("dout_bar[0]") msb_out_pos = msb_out_pin.rc() - out_extend_right_pos = msb_out_pos + vector(self.m2_pitch,0) + out_extend_right_pos = msb_out_pos + vector(2*self.m2_pitch,0) out_extend_up_pos = out_extend_right_pos + vector(0,self.m2_width) rail_pos = vector(self.vert_control_bus_positions["bank_sel[0]"].x,out_extend_up_pos.y) self.add_path("metal2",[msb_out_pos,out_extend_right_pos,out_extend_up_pos]) @@ -660,7 +660,7 @@ class sram(design.design): # Connect the output to select 1 msb_out_pin = self.msb_address_inst.get_pin("dout[0]") msb_out_pos = msb_out_pin.rc() - out_extend_right_pos = msb_out_pos + vector(self.m2_pitch,0) + out_extend_right_pos = msb_out_pos + vector(2*self.m2_pitch,0) out_extend_down_pos = out_extend_right_pos - vector(0,2*self.m1_pitch) rail_pos = vector(self.vert_control_bus_positions["bank_sel[1]"].x,out_extend_down_pos.y) self.add_path("metal2",[msb_out_pos,out_extend_right_pos,out_extend_down_pos])