diff --git a/compiler/characterizer/lib.py b/compiler/characterizer/lib.py
index ac15a23f..3441156f 100644
--- a/compiler/characterizer/lib.py
+++ b/compiler/characterizer/lib.py
@@ -502,6 +502,7 @@ class lib:
                 
                 
     def parse_info(self,corner,lib_name):
+        """ Copies important characterization data to datasheet.info to be added to datasheet """
         if OPTS.is_unit_test:
             return
         datasheet = open(OPTS.openram_temp +'/datasheet.info', 'a+')
diff --git a/compiler/datasheet/datasheet_gen.py b/compiler/datasheet/datasheet_gen.py
index 4609514e..5f163904 100644
--- a/compiler/datasheet/datasheet_gen.py
+++ b/compiler/datasheet/datasheet_gen.py
@@ -7,7 +7,6 @@ packages to be installed.
 #TODO:
 #locate all port elements in .lib
 #Locate all timing elements in .lib
-#Calculate area from .gds file
 #Diagram generation
 #Improve css
 
@@ -43,7 +42,7 @@ def process_name(corner):
     else:
         return "custom"
 
-def parse_characterizer_csv(f,pages):
+def parse_characterizer_csv(sram,f,pages):
     """
     Parses output data of the Liberty file generator in order to construct the timing and
     current table
@@ -174,8 +173,7 @@ def parse_characterizer_csv(f,pages):
                 new_sheet.timing.append(timing_and_current_data_item('CSb hold falling',FF_HOLD_HL_MIN,FF_HOLD_HL_MAX,'ns'))
                 new_sheet.timing.append(timing_and_current_data_item('AC current','2','3','4'))
                 new_sheet.timing.append(timing_and_current_data_item('Standby current','2','3','4'))
-                new_sheet.timing.append(timing_and_current_data_item('Area','2','3','4'))
-
+                
                 if not OPTS.netlist_only:
                     #physical layout files should not be generated in netlist only mode
                     new_sheet.dlv.append(deliverables_item('.gds','GDSII layout views','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,OPTS.output_name,'gds')))
@@ -197,13 +195,15 @@ def parse_characterizer_csv(f,pages):
                 new_sheet.io.append(in_out_item('NUM_RW_PORTS',NUM_RW_PORTS))
                 new_sheet.io.append(in_out_item('NUM_R_PORTS',NUM_R_PORTS))
                 new_sheet.io.append(in_out_item('NUM_W_PORTS',NUM_W_PORTS))
+                new_sheet.io.append(in_out_item('Area',sram.width * sram.height))
+                
 
 
 
 
 
 class datasheet_gen():
-     def datasheet_write(name):
+     def datasheet_write(sram,name):
         
         if OPTS.datasheet_gen:
             in_dir = OPTS.openram_temp
@@ -213,7 +213,7 @@ class datasheet_gen():
 
 
             datasheets = []
-            parse_characterizer_csv(in_dir + "/datasheet.info", datasheets)
+            parse_characterizer_csv(sram, in_dir + "/datasheet.info", datasheets)
 
 
             for sheets in datasheets:
diff --git a/compiler/sram.py b/compiler/sram.py
index 1ae11762..0c977868 100644
--- a/compiler/sram.py
+++ b/compiler/sram.py
@@ -122,7 +122,7 @@ class sram():
         from datasheet_gen import datasheet_gen
         dname = OPTS.output_path + self.s.name + ".html"
         print("Datasheet: writing to {0}".format(dname))
-        datasheet_gen.datasheet_write(dname)
+        datasheet_gen.datasheet_write(self.s,dname)
         print_time("Datasheet", datetime.datetime.now(), start_time)
 
         # Write a verilog model