diff --git a/compiler/modules/dff_array.py b/compiler/modules/dff_array.py
index c1fe54b1..86805407 100644
--- a/compiler/modules/dff_array.py
+++ b/compiler/modules/dff_array.py
@@ -124,7 +124,7 @@ class dff_array(design.design):
             # Add connections every 4 cells
             for col in range(0, self.columns, 4):
                 gnd_pin=self.dff_insts[0, col].get_pin("gnd")
-                self.add_power_pin("gnd", gnd_pin.rc(), start_layer=vdd_pin.layer)
+                self.add_power_pin("gnd", gnd_pin.rc(), start_layer=gnd_pin.layer)
 
     def add_layout_pins(self):
         for row in range(self.rows):
diff --git a/compiler/modules/dff_inv_array.py b/compiler/modules/dff_inv_array.py
index eb3a26d8..20d59939 100644
--- a/compiler/modules/dff_inv_array.py
+++ b/compiler/modules/dff_inv_array.py
@@ -128,11 +128,11 @@ class dff_inv_array(design.design):
             for col in range(self.columns):
                 # Adds power pin on left of row
                 vdd_pin=self.dff_insts[row,col].get_pin("vdd")
-                self.add_power_pin(vdd_pin, loc=vdd_pin.lc())
+                self.add_power_pin(vdd_pin, loc=vdd_pin.lc(), start_layer=vdd_pin.layer)
 
                 # Adds gnd pin on left of row
                 gnd_pin=self.dff_insts[row,col].get_pin("gnd")
-                self.add_power_pin(gnd_pin, loc=gnd_pin.lc())
+                self.add_power_pin(gnd_pin, loc=gnd_pin.lc(), start_layer=gnd_pin.layer)
 
         for row in range(self.rows):
             for col in range(self.columns):