diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py
index 1ea03974..4799ce13 100644
--- a/compiler/verify/magic.py
+++ b/compiler/verify/magic.py
@@ -97,10 +97,11 @@ def write_netgen_script(cell_name, sp_name):
 
     global OPTS
 
-    setup_file = OPTS.openram_tech + "mag_lib/setup.tcl"
-    if os.path.exists(setup_file):
+    setup_file = "setup.tcl"
+    full_setup_file = OPTS.openram_tech + "mag_lib/" + setup_file
+    if os.path.exists(full_setup_file):
         # Copy setup.tcl file into temp dir
-        shutil.copy(setup_file, OPTS.openram_temp)
+        shutil.copy(full_setup_file, OPTS.openram_temp)
     else:
         setup_file = 'nosetup'
 
diff --git a/technology/scn4m_subm/mag_lib/setup.tcl b/technology/scn4m_subm/mag_lib/setup.tcl
index 1799e910..01639fe2 100644
--- a/technology/scn4m_subm/mag_lib/setup.tcl
+++ b/technology/scn4m_subm/mag_lib/setup.tcl
@@ -4,8 +4,8 @@ equate class {-circuit1 nfet} {-circuit2 n}
 equate class {-circuit1 pfet} {-circuit2 p}
 # This circuit has symmetries and needs to be flattened to resolve them
 # or the banks won't pass
-#flatten class {-circuit1 bitcell_array_0}
-#flatten class {-circuit1 bitcell_array_1}
+flatten class {-circuit1 bitcell_array_0}
+flatten class {-circuit1 bitcell_array_1}
 #flatten class {-circuit1 precharge_array_0}
 #flatten class {-circuit1 precharge_array_1}
 #flatten class {-circuit1 precharge_array_2}