From ce5001e0afba51d0272ec60b8091ee01c0185f13 Mon Sep 17 00:00:00 2001
From: Jesse Cirimelli-Low <jcirimel@ucsc.edu>
Date: Wed, 31 Oct 2018 12:29:13 -0700
Subject: [PATCH] added config file to datasheet and output files

---
 compiler/datasheet/datasheet.py     | 14 +++++++++++++-
 compiler/datasheet/datasheet_gen.py |  4 +++-
 compiler/globals.py                 |  3 ++-
 compiler/openram.py                 |  2 +-
 compiler/sram.py                    | 10 +++++++++-
 5 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/compiler/datasheet/datasheet.py b/compiler/datasheet/datasheet.py
index 4a3b3b69..700babbb 100644
--- a/compiler/datasheet/datasheet.py
+++ b/compiler/datasheet/datasheet.py
@@ -28,8 +28,20 @@ class datasheet():
         with open(os.path.abspath(os.environ.get("OPENRAM_HOME")) + '/datasheet/assets/datasheet.css', 'r') as datasheet_css:
             #css styling is kept in a seperate file
             self.html += datasheet_css.read()
-         
+
+#        if OPTS.check_lvsdrc:
+#            DVS = 'checked'
+#            LVS = 'checked'
+#            PEX = 'checked'
+#        else:
+#            DVS = 'skipped'
+#            LVS = 'skipped'
+#            PEX = 'skipped'
+        
+
         self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>'+ self.name + '.html' + '</p>'
+#        self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>'+ 'DVS: ' + DVS  + '</p>'
+#        self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>'+ 'LVS: ' + LVS  + '</p>'
 
         self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Ports and Configuration (DEBUG)</p>'
         self.html += in_out(self.io,table_id='data').__html__().replace('&lt;','<').replace('&#34;','"').replace('&gt;',">")
diff --git a/compiler/datasheet/datasheet_gen.py b/compiler/datasheet/datasheet_gen.py
index 125511f4..4609514e 100644
--- a/compiler/datasheet/datasheet_gen.py
+++ b/compiler/datasheet/datasheet_gen.py
@@ -185,7 +185,9 @@ def parse_characterizer_csv(f,pages):
                 new_sheet.dlv.append(deliverables_item('.sp','SPICE netlists','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,OPTS.output_name,'sp')))
                 new_sheet.dlv.append(deliverables_item('.v','Verilog simulation models','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,OPTS.output_name,'v')))
                 new_sheet.dlv.append(deliverables_item('.html','This datasheet','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,OPTS.output_name,'html')))
-                new_sheet.dlv.append(deliverables_item('.lib','Synthesis models','<a href="file://{0}">{1}</a>'.format(LIB_NAME,LIB_NAME.replace(OUT_DIR,''))))
+                new_sheet.dlv.append(deliverables_item('.lib','Synthesis models','<a href="file://{0}">{1}</a>'.format(LIB_NAME,LIB_NAME.replace(OUT_DIR,'lib'))))
+                new_sheet.dlv.append(deliverables_item('.py','OpenRAM configuration file','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,OPTS.output_name,'py')))
+
 
 
                 #debug table for multiport information
diff --git a/compiler/globals.py b/compiler/globals.py
index 0b04079b..887b092e 100644
--- a/compiler/globals.py
+++ b/compiler/globals.py
@@ -197,6 +197,7 @@ def read_config(config_file, is_unit_test=True):
     config_file = re.sub(r'\.py$', "", config_file)
     # Expand the user if it is used
     config_file = os.path.expanduser(config_file)
+    OPTS.config_file = config_file
     # Add the path to the system path so we can import things in the other directory
     dir_name = os.path.dirname(config_file)
     file_name = os.path.basename(config_file)
@@ -244,7 +245,7 @@ def read_config(config_file, is_unit_test=True):
                                                          OPTS.num_words,
                                                          ports,
                                                          OPTS.tech_name)
-        
+    
 
         
 def end_openram():
diff --git a/compiler/openram.py b/compiler/openram.py
index ee43749f..d419ea4b 100755
--- a/compiler/openram.py
+++ b/compiler/openram.py
@@ -39,7 +39,7 @@ import verify
 from sram import sram
 from sram_config import sram_config
 #from parser import *
-output_extensions = ["sp","v","lib"]
+output_extensions = ["sp","v","lib","py"]
 if OPTS.datasheet_gen:
     output_extensions.append("html")
 if not OPTS.netlist_only:
diff --git a/compiler/sram.py b/compiler/sram.py
index 1b6b104f..1ae11762 100644
--- a/compiler/sram.py
+++ b/compiler/sram.py
@@ -108,7 +108,15 @@ class sram():
                 print("Trimming netlist to speed up characterization.")
         lib(out_dir=OPTS.output_path, sram=self.s, sp_file=sp_file)
         print_time("Characterization", datetime.datetime.now(), start_time)
-        
+       
+
+        # Write the config file
+        start_time = datetime.datetime.now()
+        from shutil import copyfile
+        copyfile(OPTS.config_file + '.py', OPTS.output_path + OPTS.output_name + '.py')
+        print("Config: writing to {0}".format(OPTS.output_path + OPTS.output_name + '.py'))
+        print_time("Config", datetime.datetime.now(), start_time)
+
         # Write the datasheet
         start_time = datetime.datetime.now()
         from datasheet_gen import datasheet_gen