From c9c839ca461c14348e1350ec2d1b3bffe18b2337 Mon Sep 17 00:00:00 2001 From: Bin Wu Date: Wed, 10 Jul 2019 04:39:40 -0700 Subject: [PATCH] fix the delay measure bug in pex tests --- compiler/tests/26_hspice_pex_pinv_test.py | 12 +++++++++--- compiler/tests/26_ngspice_pex_pinv_test.py | 14 ++++++++++---- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/compiler/tests/26_hspice_pex_pinv_test.py b/compiler/tests/26_hspice_pex_pinv_test.py index 90ce5d90..f0cccba3 100755 --- a/compiler/tests/26_hspice_pex_pinv_test.py +++ b/compiler/tests/26_hspice_pex_pinv_test.py @@ -24,8 +24,13 @@ class hspice_pex_pinv_test(openram_test): import pinv # load the hspice - OPTS.spice_name = "hspice" - OPTS.spice_exe = "hspice" + OPTS.spice_name="hspice" + OPTS.analytical_delay = False + + # This is a hack to reload the characterizer __init__ with the spice version + from importlib import reload + import characterizer + reload(characterizer) # generate the pinv prev_purge_value = OPTS.purge_temp @@ -111,7 +116,8 @@ class hspice_pex_pinv_test(openram_test): trig_name = "input", targ_name = "output", trig_dir_str = "FALL", - targ_dir_str = "RISE") + targ_dir_str = "RISE", + has_port = False) trig_td = trag_td = 0.01 * run_time rest_info = trig_td,trag_td,tech.spice["nom_supply_voltage"] delay_measure.write_measure(simulation, rest_info) diff --git a/compiler/tests/26_ngspice_pex_pinv_test.py b/compiler/tests/26_ngspice_pex_pinv_test.py index 42181630..2eb95948 100755 --- a/compiler/tests/26_ngspice_pex_pinv_test.py +++ b/compiler/tests/26_ngspice_pex_pinv_test.py @@ -22,9 +22,14 @@ class ngspice_pex_pinv_test(openram_test): globals.init_openram("config_{0}".format(OPTS.tech_name)) import pinv - # load the hspice - OPTS.spice_name = "ngspice" - OPTS.spice_exe = "ngspice" + # load the ngspice + OPTS.spice_name="ngspice" + OPTS.analytical_delay = False + + # This is a hack to reload the characterizer __init__ with the spice version + from importlib import reload + import characterizer + reload(characterizer) # generate the pinv module prev_purge_value = OPTS.purge_temp @@ -114,7 +119,8 @@ class ngspice_pex_pinv_test(openram_test): trig_name = "input", targ_name = "output", trig_dir_str = "FALL", - targ_dir_str = "RISE") + targ_dir_str = "RISE", + has_port = False) trig_td = trag_td = 0.01 * run_time rest_info = trig_td,trag_td,tech.spice["nom_supply_voltage"] delay_measure.write_measure(simulation, rest_info)