From c3d6be27bef0869060b548eb96cfdeb15bec2a89 Mon Sep 17 00:00:00 2001 From: mrg Date: Thu, 8 Oct 2020 16:58:38 -0700 Subject: [PATCH] Fix argument name bug for remove wordlines --- compiler/modules/bitcell_base_array.py | 4 ++-- compiler/modules/replica_column.py | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/compiler/modules/bitcell_base_array.py b/compiler/modules/bitcell_base_array.py index 71225c2c..244a9928 100644 --- a/compiler/modules/bitcell_base_array.py +++ b/compiler/modules/bitcell_base_array.py @@ -56,8 +56,8 @@ class bitcell_base_array(design.design): # def get_all_wordline_names(self, prefix=""): # return [prefix + x for x in self.all_wordline_names] - def create_all_wordline_names(self, num_remove_wordline=0): - for row in range(self.row_size - num_remove_wordline): + def create_all_wordline_names(self, remove_num_wordlines=0): + for row in range(self.row_size - remove_num_wordlines): for port in self.all_ports: if not cell_properties.compare_ports(cell_properties.bitcell.split_wl): self.wordline_names[port].append("wl_{0}_{1}".format(port, row)) diff --git a/compiler/modules/replica_column.py b/compiler/modules/replica_column.py index 58939ad1..82ba1340 100644 --- a/compiler/modules/replica_column.py +++ b/compiler/modules/replica_column.py @@ -67,7 +67,7 @@ class replica_column(bitcell_base_array): try: if cell_properties.bitcell.end_caps: # remove 2 wordlines to account for top/bot - self.create_all_wordline_names(num_remove_wordlines=2) + self.create_all_wordline_names(remove_num_wordlines=2) else: self.create_all_wordline_names() except AttributeError: