From c14190c5aa20b9bf6f4a743a385949e41d149396 Mon Sep 17 00:00:00 2001 From: Aditi Sinha Date: Thu, 14 May 2020 10:41:54 +0000 Subject: [PATCH] Changes in control logic for spare columns --- compiler/modules/control_logic.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler/modules/control_logic.py b/compiler/modules/control_logic.py index c8805049..e09a6615 100644 --- a/compiler/modules/control_logic.py +++ b/compiler/modules/control_logic.py @@ -36,9 +36,9 @@ class control_logic(design.design): self.port_type = port_type if not spare_columns: - self.num_spare_cols = spare_columns - else: self.num_spare_cols = 0 + else: + self.num_spare_cols = spare_columns self.num_cols = word_size * words_per_row + self.num_spare_cols self.num_words = num_rows * words_per_row