From bad1274bdbe1fcc1fb7feb163f25408d073cb21b Mon Sep 17 00:00:00 2001 From: mrg Date: Thu, 3 Dec 2020 10:03:47 -0800 Subject: [PATCH] Use internal name for col/row caps. gds ordered read enabled. --- compiler/modules/col_cap_array.py | 2 +- compiler/modules/row_cap_array.py | 2 +- compiler/verify/calibre.py | 10 ++++------ compiler/verify/magic.py | 1 + 4 files changed, 7 insertions(+), 8 deletions(-) diff --git a/compiler/modules/col_cap_array.py b/compiler/modules/col_cap_array.py index 1b7a1f49..1be29327 100644 --- a/compiler/modules/col_cap_array.py +++ b/compiler/modules/col_cap_array.py @@ -100,7 +100,7 @@ class col_cap_array(bitcell_base_array): inst = self.cell_inst[row, col] for pin_name in ["vdd", "gnd"]: for pin in inst.get_pins(pin_name): - self.add_power_pin(name=pin.name, + self.add_power_pin(name=pin_name, loc=pin.center(), start_layer=pin.layer) diff --git a/compiler/modules/row_cap_array.py b/compiler/modules/row_cap_array.py index 5cee866a..850dd5f9 100644 --- a/compiler/modules/row_cap_array.py +++ b/compiler/modules/row_cap_array.py @@ -113,7 +113,7 @@ class row_cap_array(bitcell_base_array): inst = self.cell_inst[row, col] for pin_name in ["vdd", "gnd"]: for pin in inst.get_pins(pin_name): - self.add_power_pin(name=pin.name, + self.add_power_pin(name=pin_name, loc=pin.center(), start_layer=pin.layer) diff --git a/compiler/verify/calibre.py b/compiler/verify/calibre.py index a6376a16..9d079c2a 100644 --- a/compiler/verify/calibre.py +++ b/compiler/verify/calibre.py @@ -103,10 +103,10 @@ def write_lvs_script(cell_name, gds_name, sp_name, final_verification=False, out 'cmnTranscriptEchoToFile': 1, 'lvsRecognizeGates': 'NONE', } - # FIXME: Remove when vdd/gnd connected - #'cmnVConnectNamesState' : 'ALL', #connects all nets with the same namee - # FIXME: Remove when vdd/gnd connected - #'lvsAbortOnSupplyError' : 0 + # FIXME: Remove when vdd/gnd connected + # 'cmnVConnectNamesState' : 'ALL', #connects all nets with the same namee + # FIXME: Remove when vdd/gnd connected + # 'lvsAbortOnSupplyError' : 0 if not final_verification or not OPTS.route_supplies: lvs_runset['cmnVConnectReport']=1 @@ -115,8 +115,6 @@ def write_lvs_script(cell_name, gds_name, sp_name, final_verification=False, out else: lvs_runset['lvsAbortOnSupplyError']=1 - - # write the runset file f = open(output_path + "lvs_runset", "w") for k in sorted(iter(lvs_runset.keys())): diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py index 605303bd..07a2efab 100644 --- a/compiler/verify/magic.py +++ b/compiler/verify/magic.py @@ -89,6 +89,7 @@ def write_drc_script(cell_name, gds_name, extract, final_verification, output_pa f.write("gds warning default\n") f.write("gds flatten true\n") f.write("gds readonly true\n") + f.write("gds ordering true\n") f.write("gds read {}\n".format(gds_name)) f.write('puts "Finished reading gds {}"\n'.format(gds_name)) f.write("load {}\n".format(cell_name))