diff --git a/compiler/router/grid.py b/compiler/router/grid.py index 6a22b8ab..97db164f 100644 --- a/compiler/router/grid.py +++ b/compiler/router/grid.py @@ -192,7 +192,7 @@ class grid: We will use an A* search, so this cost must be pessimistic. Cost so far will be the length of the path. """ - debug.info(0,"Initializing queue.") + debug.info(1,"Initializing queue.") for s in self.source: cost = self.cost_to_target(s) debug.info(2,"Init: cost=" + str(cost) + " " + str([s])) diff --git a/compiler/router/router.py b/compiler/router/router.py index 01b252a8..c5fa65d4 100644 --- a/compiler/router/router.py +++ b/compiler/router/router.py @@ -30,7 +30,6 @@ class router: self.pin_layers = {} self.boundary = self.layout.measureBoundary(self.top_name) - #print "Boundary: ",self.boundary self.ll = vector(self.boundary[0]) self.ur = vector(self.boundary[1]) self.size = self.ur - self.ll @@ -60,7 +59,7 @@ class router: # This is so we can use a single resolution grid for both layers self.track_width = max(self.horiz_track_width,self.vert_track_width) - print "Track width:",self.track_width + debug.info(1,"Track width:"+str(self.track_width)) @@ -72,16 +71,16 @@ class router: # We will offset so ll is at (-track_halo*track_width,-track_halo*track_width) track_width_offset = vector([track_halo*self.track_width]*2) self.offset = self.ll - track_width_offset - print "Offset: ",self.offset + debug.info(1,"Offset: "+str(self.offset)) width = self.size.x height = self.size.y - print "Size: ", width,height + debug.info(1,"Size: {0} x {1}".format(width,height)) # pad the tracks on each side by the halo as well self.width_in_tracks = int(math.ceil(width/self.track_width)) + 2*track_halo self.height_in_tracks = int(math.ceil(height/self.track_width)) + 2*track_halo - print "Size (in tracks): ", self.width_in_tracks, self.height_in_tracks + debug.info(1,"Size (in tracks): {0} x {1}".format(self.width_in_tracks, self.height_in_tracks)) self.rg = grid.grid(self.width_in_tracks,self.height_in_tracks) @@ -92,9 +91,7 @@ class router: debug.info(3,"Find pin {0} layer {1} shape {2}".format(pin_name,str(pin_layer),str(pin_shape))) # repack the shape as a pair of vectors rather than four values shape=[vector(pin_shape[0],pin_shape[1]),vector(pin_shape[2],pin_shape[3])] - print shape new_shape = self.convert_shape_to_tracks(shape,round_bigger=False) - print new_shape self.pin_names.append(pin_name) self.pin_shapes[str(pin)] = new_shape self.pin_layers[str(pin)] = pin_layer @@ -116,7 +113,7 @@ class router: self.find_blockages() # returns the path in tracks path = self.rg.route() - debug.info(0,"Found path. ") + debug.info(1,"Found path. ") debug.info(2,str(path)) self.set_path(path) # First, simplify the path. diff --git a/compiler/router/tests/01_no_blockages_test.py b/compiler/router/tests/01_no_blockages_test.py index 2254ba5e..47e534e3 100644 --- a/compiler/router/tests/01_no_blockages_test.py +++ b/compiler/router/tests/01_no_blockages_test.py @@ -54,20 +54,10 @@ class no_blockages_test(unittest.TestCase): self.add_wire(layer_stack,path) - r = routing("test1", "A_to_B_no_blockages") - self.local_check(r) - - r = routing("A_to_B_m1m2_blockages") - self.local_check(r) - - r = routing("A_to_B_m1m2_same_layer_pins") - self.local_check(r) - - r = routing("A_to_B_m1m2_diff_layer_pins") + r = routing("test1", "AB_no_blockages") self.local_check(r) # fails if there are any DRC errors on any cells - self.assertEqual(drc_errors, 0) globals.end_openram() @@ -76,7 +66,7 @@ class no_blockages_test(unittest.TestCase): r.gds_write(tempgds) self.assertFalse(calibre.run_drc(r.name, tempgds)) os.remove(tempgds) - assert(0) + diff --git a/compiler/router/tests/02_blockages_test.py b/compiler/router/tests/02_blockages_test.py new file mode 100644 index 00000000..485b39f6 --- /dev/null +++ b/compiler/router/tests/02_blockages_test.py @@ -0,0 +1,79 @@ +#!/usr/bin/env python2.7 +"Run a regresion test the library cells for DRC" + +import unittest +from testutils import header +import sys,os +sys.path.append(os.path.join(sys.path[0],"../..")) +sys.path.append(os.path.join(sys.path[0],"..")) +import globals +import debug +import calibre + + +class no_blockages_test(unittest.TestCase): + + def runTest(self): + globals.init_openram("config_{0}".format(OPTS.tech_name)) + + import design + import router + + class gdscell(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name): + #design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + self.name = name + self.gds_file = name + ".gds" + self.sp_file = name + ".sp" + design.hierarchy_layout.layout.__init__(self, name) + design.hierarchy_spice.spice.__init__(self, name) + + class routing(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name, gdsname): + design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + + cell = gdscell(gdsname) + self.add_inst(name=gdsname, + mod=cell, + offset=[0,0]) + self.connect_inst([]) + + r=router.router(gdsname+".gds") + layer_stack =("metal1","via1","metal2") + path=r.route(layer_stack,src="A",dest="B") + r.rg.view() + + self.add_wire(layer_stack,path) + + + r = routing("test1", "AB_blockages") + self.local_check(r) + + # fails if there are any DRC errors on any cells + globals.end_openram() + + + def local_check(self, r): + tempgds = OPTS.openram_temp + "temp.gds" + r.gds_write(tempgds) + self.assertFalse(calibre.run_drc(r.name, tempgds)) + os.remove(tempgds) + + + + + +# instantiate a copy of the class to actually run the test +if __name__ == "__main__": + (OPTS, args) = globals.parse_args() + del sys.argv[1:] + header(__file__, OPTS.tech_name) + unittest.main() diff --git a/compiler/router/tests/03_same_layer_pins_test.py b/compiler/router/tests/03_same_layer_pins_test.py new file mode 100644 index 00000000..c8b10142 --- /dev/null +++ b/compiler/router/tests/03_same_layer_pins_test.py @@ -0,0 +1,80 @@ +#!/usr/bin/env python2.7 +"Run a regresion test the library cells for DRC" + +import unittest +from testutils import header +import sys,os +sys.path.append(os.path.join(sys.path[0],"../..")) +sys.path.append(os.path.join(sys.path[0],"..")) +import globals +import debug +import calibre + + +class no_blockages_test(unittest.TestCase): + + def runTest(self): + globals.init_openram("config_{0}".format(OPTS.tech_name)) + + import design + import router + + class gdscell(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name): + #design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + self.name = name + self.gds_file = name + ".gds" + self.sp_file = name + ".sp" + design.hierarchy_layout.layout.__init__(self, name) + design.hierarchy_spice.spice.__init__(self, name) + + class routing(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name, gdsname): + design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + + cell = gdscell(gdsname) + self.add_inst(name=gdsname, + mod=cell, + offset=[0,0]) + self.connect_inst([]) + + r=router.router(gdsname+".gds") + layer_stack =("metal1","via1","metal2") + path=r.route(layer_stack,src="A",dest="B") + r.rg.view() + + self.add_wire(layer_stack,path) + + + r = routing("test1", "AB_same_layer_pins") + self.local_check(r) + + + # fails if there are any DRC errors on any cells + globals.end_openram() + + + def local_check(self, r): + tempgds = OPTS.openram_temp + "temp.gds" + r.gds_write(tempgds) + self.assertFalse(calibre.run_drc(r.name, tempgds)) + os.remove(tempgds) + + + + + +# instantiate a copy of the class to actually run the test +if __name__ == "__main__": + (OPTS, args) = globals.parse_args() + del sys.argv[1:] + header(__file__, OPTS.tech_name) + unittest.main() diff --git a/compiler/router/tests/04_diff_layer_pins_test.py b/compiler/router/tests/04_diff_layer_pins_test.py new file mode 100644 index 00000000..0577c966 --- /dev/null +++ b/compiler/router/tests/04_diff_layer_pins_test.py @@ -0,0 +1,80 @@ +#!/usr/bin/env python2.7 +"Run a regresion test the library cells for DRC" + +import unittest +from testutils import header +import sys,os +sys.path.append(os.path.join(sys.path[0],"../..")) +sys.path.append(os.path.join(sys.path[0],"..")) +import globals +import debug +import calibre + + +class no_blockages_test(unittest.TestCase): + + def runTest(self): + globals.init_openram("config_{0}".format(OPTS.tech_name)) + + import design + import router + + class gdscell(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name): + #design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + self.name = name + self.gds_file = name + ".gds" + self.sp_file = name + ".sp" + design.hierarchy_layout.layout.__init__(self, name) + design.hierarchy_spice.spice.__init__(self, name) + + class routing(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name, gdsname): + design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + + cell = gdscell(gdsname) + self.add_inst(name=gdsname, + mod=cell, + offset=[0,0]) + self.connect_inst([]) + + r=router.router(gdsname+".gds") + layer_stack =("metal1","via1","metal2") + path=r.route(layer_stack,src="A",dest="B") + r.rg.view() + + self.add_wire(layer_stack,path) + + + + r = routing("test1", "AB_diff_layer_pins") + self.local_check(r) + + # fails if there are any DRC errors on any cells + globals.end_openram() + + + def local_check(self, r): + tempgds = OPTS.openram_temp + "temp.gds" + r.gds_write(tempgds) + self.assertFalse(calibre.run_drc(r.name, tempgds)) + os.remove(tempgds) + + + + + +# instantiate a copy of the class to actually run the test +if __name__ == "__main__": + (OPTS, args) = globals.parse_args() + del sys.argv[1:] + header(__file__, OPTS.tech_name) + unittest.main() diff --git a/compiler/router/tests/05_two_nets_test.py b/compiler/router/tests/05_two_nets_test.py new file mode 100644 index 00000000..0577c966 --- /dev/null +++ b/compiler/router/tests/05_two_nets_test.py @@ -0,0 +1,80 @@ +#!/usr/bin/env python2.7 +"Run a regresion test the library cells for DRC" + +import unittest +from testutils import header +import sys,os +sys.path.append(os.path.join(sys.path[0],"../..")) +sys.path.append(os.path.join(sys.path[0],"..")) +import globals +import debug +import calibre + + +class no_blockages_test(unittest.TestCase): + + def runTest(self): + globals.init_openram("config_{0}".format(OPTS.tech_name)) + + import design + import router + + class gdscell(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name): + #design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + self.name = name + self.gds_file = name + ".gds" + self.sp_file = name + ".sp" + design.hierarchy_layout.layout.__init__(self, name) + design.hierarchy_spice.spice.__init__(self, name) + + class routing(design.design): + """ + A generic GDS design that we can route on. + """ + def __init__(self, name, gdsname): + design.design.__init__(self, name) + debug.info(2, "Create {0} object".format(name)) + + cell = gdscell(gdsname) + self.add_inst(name=gdsname, + mod=cell, + offset=[0,0]) + self.connect_inst([]) + + r=router.router(gdsname+".gds") + layer_stack =("metal1","via1","metal2") + path=r.route(layer_stack,src="A",dest="B") + r.rg.view() + + self.add_wire(layer_stack,path) + + + + r = routing("test1", "AB_diff_layer_pins") + self.local_check(r) + + # fails if there are any DRC errors on any cells + globals.end_openram() + + + def local_check(self, r): + tempgds = OPTS.openram_temp + "temp.gds" + r.gds_write(tempgds) + self.assertFalse(calibre.run_drc(r.name, tempgds)) + os.remove(tempgds) + + + + + +# instantiate a copy of the class to actually run the test +if __name__ == "__main__": + (OPTS, args) = globals.parse_args() + del sys.argv[1:] + header(__file__, OPTS.tech_name) + unittest.main() diff --git a/compiler/router/tests/ABCD_m1m2_diff_layer_pins.gds b/compiler/router/tests/ABCD_m1m2_diff_layer_pins.gds new file mode 100644 index 00000000..ea4852c9 Binary files /dev/null and b/compiler/router/tests/ABCD_m1m2_diff_layer_pins.gds differ diff --git a/compiler/router/tests/A_to_B_m1m2_blockages.gds b/compiler/router/tests/AB_blockages.gds similarity index 100% rename from compiler/router/tests/A_to_B_m1m2_blockages.gds rename to compiler/router/tests/AB_blockages.gds diff --git a/compiler/router/tests/A_to_B_m1m2_blockages.sp b/compiler/router/tests/AB_blockages.sp similarity index 100% rename from compiler/router/tests/A_to_B_m1m2_blockages.sp rename to compiler/router/tests/AB_blockages.sp diff --git a/compiler/router/tests/A_to_B_m1m2_diff_layer_pins.gds b/compiler/router/tests/AB_diff_layer_pins.gds similarity index 100% rename from compiler/router/tests/A_to_B_m1m2_diff_layer_pins.gds rename to compiler/router/tests/AB_diff_layer_pins.gds diff --git a/compiler/router/tests/A_to_B_m1m2_diff_layer_pins.sp b/compiler/router/tests/AB_diff_layer_pins.sp similarity index 100% rename from compiler/router/tests/A_to_B_m1m2_diff_layer_pins.sp rename to compiler/router/tests/AB_diff_layer_pins.sp diff --git a/compiler/router/tests/A_to_B_no_blockages.gds b/compiler/router/tests/AB_no_blockages.gds similarity index 100% rename from compiler/router/tests/A_to_B_no_blockages.gds rename to compiler/router/tests/AB_no_blockages.gds diff --git a/compiler/router/tests/A_to_B_m1m2_same_layer_pins.sp b/compiler/router/tests/AB_no_blockages.sp similarity index 100% rename from compiler/router/tests/A_to_B_m1m2_same_layer_pins.sp rename to compiler/router/tests/AB_no_blockages.sp diff --git a/compiler/router/tests/A_to_B_m1m2_same_layer_pins.gds b/compiler/router/tests/AB_same_layer_pins.gds similarity index 100% rename from compiler/router/tests/A_to_B_m1m2_same_layer_pins.gds rename to compiler/router/tests/AB_same_layer_pins.gds diff --git a/compiler/router/tests/A_to_B_no_blockages.sp b/compiler/router/tests/AB_same_layer_pins.sp similarity index 100% rename from compiler/router/tests/A_to_B_no_blockages.sp rename to compiler/router/tests/AB_same_layer_pins.sp diff --git a/compiler/router/tests/A_to_B_m1_only.gds b/compiler/router/tests/A_to_B_m1_only.gds deleted file mode 100644 index 71d3fa76..00000000 Binary files a/compiler/router/tests/A_to_B_m1_only.gds and /dev/null differ diff --git a/compiler/router/tests/temp.gds b/compiler/router/tests/temp.gds new file mode 100644 index 00000000..4da06d4c Binary files /dev/null and b/compiler/router/tests/temp.gds differ