diff --git a/technology/freepdk45/gds_lib/dummy_cell_1rw_1r.gds b/technology/freepdk45/gds_lib/dummy_cell_1rw_1r.gds
new file mode 100644
index 00000000..2ac1a287
Binary files /dev/null and b/technology/freepdk45/gds_lib/dummy_cell_1rw_1r.gds differ
diff --git a/technology/freepdk45/gds_lib/dummy_cell_1w_1r.gds b/technology/freepdk45/gds_lib/dummy_cell_1w_1r.gds
new file mode 100644
index 00000000..fa89439e
Binary files /dev/null and b/technology/freepdk45/gds_lib/dummy_cell_1w_1r.gds differ
diff --git a/technology/freepdk45/gds_lib/dummy_cell_6t.gds b/technology/freepdk45/gds_lib/dummy_cell_6t.gds
new file mode 100644
index 00000000..c6575122
Binary files /dev/null and b/technology/freepdk45/gds_lib/dummy_cell_6t.gds differ
diff --git a/technology/freepdk45/sp_lib/dummy_cell_1rw_1r.sp b/technology/freepdk45/sp_lib/dummy_cell_1rw_1r.sp
new file mode 100644
index 00000000..c3c082ee
--- /dev/null
+++ b/technology/freepdk45/sp_lib/dummy_cell_1rw_1r.sp
@@ -0,0 +1,14 @@
+
+.SUBCKT dummy_cell_1rw_1r bl0 br0 bl1 br1 wl0 wl1 vdd gnd
+MM9 RA_to_R_right wl1 br1_noconn gnd NMOS_VTG W=180.0n L=50n m=1
+MM8 RA_to_R_right Q gnd gnd NMOS_VTG W=180.0n L=50n m=1
+MM7 RA_to_R_left Q_bar gnd gnd NMOS_VTG W=180.0n L=50n m=1
+MM6 RA_to_R_left wl1 bl1_noconn gnd NMOS_VTG W=180.0n L=50n m=1
+MM5 Q wl0 bl0_noconn gnd NMOS_VTG W=135.00n L=50n m=1
+MM4 Q_bar wl0 br0_noconn gnd NMOS_VTG W=135.00n L=50n m=1
+MM1 Q Q_bar gnd gnd NMOS_VTG W=205.0n L=50n m=1
+MM0 Q_bar Q gnd gnd NMOS_VTG W=205.0n L=50n m=1
+MM3 Q Q_bar vdd vdd PMOS_VTG W=90n L=50n m=1
+MM2 Q_bar Q vdd vdd PMOS_VTG W=90n L=50n m=1
+.ENDS
+
diff --git a/technology/freepdk45/sp_lib/dummy_cell_1w_1r.sp b/technology/freepdk45/sp_lib/dummy_cell_1w_1r.sp
new file mode 100644
index 00000000..72d7553f
--- /dev/null
+++ b/technology/freepdk45/sp_lib/dummy_cell_1w_1r.sp
@@ -0,0 +1,14 @@
+
+.SUBCKT dummy_cell_1w_1r bl0 br0 bl1 br1 wl0 wl1 vdd gnd
+MM9 RA_to_R_right wl1 br1_noconn gnd NMOS_VTG W=180.0n L=50n m=1
+MM8 RA_to_R_right Q gnd gnd NMOS_VTG W=180.0n L=50n m=1
+MM7 RA_to_R_left Q_bar gnd gnd NMOS_VTG W=180.0n L=50n m=1
+MM6 RA_to_R_left wl1 bl1_noconn gnd NMOS_VTG W=180.0n L=50n m=1
+MM5 Q wl0 bl0_noconn gnd NMOS_VTG W=135.00n L=50n m=1
+MM4 Q_bar wl0 br0_noconn gnd NMOS_VTG W=135.00n L=50n m=1
+MM1 Q Q_bar gnd gnd NMOS_VTG W=205.0n L=50n m=1
+MM0 Q_bar Q gnd gnd NMOS_VTG W=205.0n L=50n m=1
+MM3 Q Q_bar vdd vdd PMOS_VTG W=90n L=50n m=1
+MM2 Q_bar Q vdd vdd PMOS_VTG W=90n L=50n m=1
+.ENDS
+
diff --git a/technology/freepdk45/sp_lib/dummy_cell_6t.sp b/technology/freepdk45/sp_lib/dummy_cell_6t.sp
new file mode 100644
index 00000000..ab862ec5
--- /dev/null
+++ b/technology/freepdk45/sp_lib/dummy_cell_6t.sp
@@ -0,0 +1,15 @@
+
+.SUBCKT dummy_cell_6t bl br wl vdd gnd
+* Inverter 1
+MM0 Qbar Q gnd gnd NMOS_VTG W=205.00n L=50n
+MM4 Qbar Q vdd vdd PMOS_VTG W=90n L=50n
+
+* Inverer 2
+MM1 Q Qbar gnd gnd NMOS_VTG W=205.00n L=50n 
+MM5 Q Qbar vdd vdd PMOS_VTG W=90n L=50n
+
+* Access transistors
+MM3 bl_noconn wl Q gnd NMOS_VTG W=135.00n L=50n
+MM2 br_noconn wl Qbar gnd NMOS_VTG W=135.00n L=50n 
+.ENDS cell_6t
+