From acc9b2d223947c8456e1a5fc0e69479337561d81 Mon Sep 17 00:00:00 2001 From: mrg Date: Mon, 27 Sep 2021 12:30:06 -0700 Subject: [PATCH] Connect pwell and bulk when no tap --- technology/freepdk45/tech/freepdk45.lylvs | 8 ++++---- technology/scn4m_subm/tech/scn4m_subm.lylvs | 14 ++++---------- 2 files changed, 8 insertions(+), 14 deletions(-) diff --git a/technology/freepdk45/tech/freepdk45.lylvs b/technology/freepdk45/tech/freepdk45.lylvs index 64fde014..91009968 100644 --- a/technology/freepdk45/tech/freepdk45.lylvs +++ b/technology/freepdk45/tech/freepdk45.lylvs @@ -214,10 +214,10 @@ end #connect_global(nwell, "NWELL") #connect_global(bulk, "BULK") -#for pat in %w(pnand*_0 and2_dec_0 port_address* replica_bitcell_array) -# connect_explicit(pat, [ "NWELL", "vdd" ]) -# connect_explicit(pat, [ "BULK", "PWELL", "gnd" ]) -#end +for pat in %w(pnand* and?_dec port_address* replica_bitcell_array) + connect_explicit(pat, [ "NWELL", "vdd" ]) + connect_explicit(pat, [ "BULK", "PWELL", "gnd" ]) +end #for pat in %w(XOR* XNOR* TLAT* TINV* TBUF* SDFF* OR* OAI* NOR* NAND* MUX* LOGIC* INV* HA* FILLCELL* # FA* DLL* DLH* DFF* DFFS* DFFR* DFFRS* CLKGATE* CLKBUF* BUF* AOI* ANTENNA* AND*) diff --git a/technology/scn4m_subm/tech/scn4m_subm.lylvs b/technology/scn4m_subm/tech/scn4m_subm.lylvs index 16dd5c6e..46a6c12a 100644 --- a/technology/scn4m_subm/tech/scn4m_subm.lylvs +++ b/technology/scn4m_subm/tech/scn4m_subm.lylvs @@ -164,16 +164,10 @@ connect_global(pwell, "PWELL") connect_global(nwell, "NWELL") #connect_global(bulk, "BULK") -#for pat in %w(pnand*_0 and2_dec_0 port_address* replica_bitcell_array) -# connect_explicit(pat, [ "NWELL", "vdd" ]) -# connect_explicit(pat, [ "BULK", "PWELL", "gnd" ]) -#end - -#for pat in %w(XOR* XNOR* TLAT* TINV* TBUF* SDFF* OR* OAI* NOR* NAND* MUX* LOGIC* INV* HA* FILLCELL* -# FA* DLL* DLH* DFF* DFFS* DFFR* DFFRS* CLKGATE* CLKBUF* BUF* AOI* ANTENNA* AND*) -# connect_explicit(pat, [ "NWELL", "VDD" ]) -# connect_explicit(pat, [ "BULK", "VSS" ]) -#end +for pat in %w(pnand* and?_dec port_address* replica_bitcell_array) + connect_explicit(pat, [ "NWELL", "vdd" ]) + connect_explicit(pat, [ "BULK", "PWELL", "gnd" ]) +end # Actually performs the extraction netlist # ... not really required