From abcb1cfa2c66b6430981af0406d5bc04ed804666 Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Thu, 28 Feb 2019 09:17:24 -0800 Subject: [PATCH] Correct elsif to elif --- compiler/globals.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/globals.py b/compiler/globals.py index 631508f9..67cba281 100644 --- a/compiler/globals.py +++ b/compiler/globals.py @@ -171,7 +171,7 @@ def setup_bitcell(): # If we have non-1rw ports, # and the user didn't over-ride the bitcell manually, # figure out the right bitcell to use - elsif (OPTs.bitcell=="bitcell" and OPTS.replica_bitcell=="replica_bitcell"): + elif (OPTs.bitcell=="bitcell" and OPTS.replica_bitcell=="replica_bitcell"): ports = "" if OPTS.num_rw_ports>0: ports += "{}rw_".format(OPTS.num_rw_ports)