From a5afbfe0aa825847633c456ac24ebae1b17bc0d4 Mon Sep 17 00:00:00 2001 From: Aditi Sinha Date: Sun, 22 Mar 2020 20:54:49 +0000 Subject: [PATCH] Fixed errors in extra rows characterization --- compiler/characterizer/lib.py | 5 ++++- compiler/gen_stimulus.py | 5 ++++- compiler/globals.py | 4 +--- compiler/options.py | 1 + compiler/sram/sram_config.py | 2 +- 5 files changed, 11 insertions(+), 6 deletions(-) diff --git a/compiler/characterizer/lib.py b/compiler/characterizer/lib.py index 6d6c6ce5..e3b1230d 100644 --- a/compiler/characterizer/lib.py +++ b/compiler/characterizer/lib.py @@ -559,7 +559,10 @@ class lib: char_results = self.d.analytical_delay(self.slews,self.loads) self.char_sram_results, self.char_port_results = char_results else: - probe_address = "1" * self.sram.addr_size + if (self.sram.num_spare_rows == 0): + probe_address = "1" * self.sram.addr_size + else: + probe_address = "0" + "1" * (self.sram.addr_size - 1) probe_data = self.sram.word_size - 1 char_results = self.d.analyze(probe_address, probe_data, self.slews, self.loads) self.char_sram_results, self.char_port_results = char_results diff --git a/compiler/gen_stimulus.py b/compiler/gen_stimulus.py index 5e351577..cfea17d4 100755 --- a/compiler/gen_stimulus.py +++ b/compiler/gen_stimulus.py @@ -76,7 +76,10 @@ d.period = period # Set the load of outputs and slew of inputs d.set_load_slew(load,slew) # Set the probe address/bit -probe_address = "1" * sram.addr_size +if (self.num_spare_rows == 0): + probe_address = "1" * sram.addr_size +else: + probe_address = "0" + ("1" * sram.addr_size - 1) probe_data = sram.word_size - 1 d.set_probe(probe_address, probe_data) diff --git a/compiler/globals.py b/compiler/globals.py index c864f53b..f883a648 100644 --- a/compiler/globals.py +++ b/compiler/globals.py @@ -539,9 +539,7 @@ def report_status(): debug.error("{0} is not an integer in config file.".format(OPTS.sram_size)) if type(OPTS.write_size) is not int and OPTS.write_size is not None: debug.error("{0} is not an integer in config file.".format(OPTS.write_size)) - if type(OPTS.num_spare_rows) is not int and OPT.num_spare_rows is not None: - debug.error("{0} is not an integer in config file.".format(OPTS.num_spare_rows)) - + # If a write mask is specified by the user, the mask write size should be the same as # the word size so that an entire word is written at once. if OPTS.write_size is not None: diff --git a/compiler/options.py b/compiler/options.py index d891ebd9..1c5d3e6a 100644 --- a/compiler/options.py +++ b/compiler/options.py @@ -44,6 +44,7 @@ class options(optparse.Values): # word_size = 0 # You can manually specify banks, but it is better to auto-detect it. num_banks = 1 + num_spare_rows = 0 ################### # Optimization options diff --git a/compiler/sram/sram_config.py b/compiler/sram/sram_config.py index cc1b44b5..e5d9c8dc 100644 --- a/compiler/sram/sram_config.py +++ b/compiler/sram/sram_config.py @@ -81,7 +81,7 @@ class sram_config: self.num_cols = int(self.words_per_row*self.word_size) self.num_rows_temp = int(self.num_words_per_bank/self.words_per_row) self.num_rows = self.num_rows_temp + self.num_spare_rows - debug.info(1,"Rows: {} Cols: {}".format(self.num_rows,self.num_cols)) + debug.info(1,"Rows: {} Cols: {}".format(self.num_rows_temp,self.num_cols)) # Compute the address and bank sizes self.row_addr_size = ceil(log(self.num_rows, 2))