From 9d2902de9ea6b1c5f575a434a798c30b860cd942 Mon Sep 17 00:00:00 2001 From: mrg Date: Wed, 15 Apr 2020 15:55:49 -0700 Subject: [PATCH] Conditional well spacing --- compiler/modules/dff_buf.py | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/compiler/modules/dff_buf.py b/compiler/modules/dff_buf.py index e42c01c0..c30f15b6 100644 --- a/compiler/modules/dff_buf.py +++ b/compiler/modules/dff_buf.py @@ -7,13 +7,13 @@ # import debug import design -from tech import drc,parameter +from tech import parameter from tech import cell_properties as props -from math import log from vector import vector from globals import OPTS from sram_factory import factory + class dff_buf(design.design): """ This is a simple buffered DFF. The output is buffered @@ -107,13 +107,23 @@ class dff_buf(design.design): self.dff_inst.place(vector(0,0)) # Add INV1 to the right - well_spacing = max(self.nwell_space, - self.pwell_space, - self.pwell_to_nwell) - self.inv1_inst.place(vector(self.dff_inst.rx() + well_spacing + self.well_extend_active,0)) + well_spacing = 0 + try: + well_spacing = max(well_spacing, self.nwell_space) + except AttributeError: + pass + try: + well_spacing = max(well_spacing, self.pwell_space) + except AttributeError: + pass + try: + well_spacing = max(well_spacing, self.pwell_to_nwell) + except AttributeError: + pass + self.inv1_inst.place(vector(self.dff_inst.rx() + well_spacing + self.well_extend_active, 0)) # Add INV2 to the right - self.inv2_inst.place(vector(self.inv1_inst.rx(),0)) + self.inv2_inst.place(vector(self.inv1_inst.rx(), 0)) def route_wires(self): # Route dff q to inv1 a