From 98a4210b06ed69e162791dc63ff0ef6915ef8c49 Mon Sep 17 00:00:00 2001
From: hadirkhan10 <hadirkhan10@gmail.com>
Date: Sun, 22 Jan 2023 16:37:52 -0800
Subject: [PATCH] added the gds and spice of the bitcell

---
 technology/gf180mcu/gds_lib/cell1rw.gds | Bin 0 -> 2996 bytes
 technology/gf180mcu/sp_lib/cell1rw.sp   |  11 +++++++++++
 2 files changed, 11 insertions(+)
 create mode 100644 technology/gf180mcu/gds_lib/cell1rw.gds
 create mode 100644 technology/gf180mcu/sp_lib/cell1rw.sp

diff --git a/technology/gf180mcu/gds_lib/cell1rw.gds b/technology/gf180mcu/gds_lib/cell1rw.gds
new file mode 100644
index 0000000000000000000000000000000000000000..d8149eb9c7615fa0499e17efa118770770e5521b
GIT binary patch
literal 2996
zcmbW3J!n%=6vxkdNpAAe)F!c3D#ec~1x0F8k;X+-iY=O!qSA^89kdQ5mQulrgNT!&
zIEXk@D58Q6;!qr%96C6OgM)~J6c<GtoD@`y|MSj0y!T9A{V1fraPIw|bM86kUP6Xk
z_Xu@3Zu&hrRHQs@r_S(q+T@yneLbb}_>R$mnTd(1@k0mq42_pY#!J2Bv*n@k*ieaD
z6RBN$F83XHcK`Fv{wLdR-#U7jI#TgI*BAqjzN6z4)oMw6ohp|onISUGE_ISw;Sy0L
zpTPg8Fg_QyOc7<;h?GrpSi480Z2m#y_7Evm2PO+t=l>Y{_b!QlX67wX;!eQa0#T}!
zNSPgx{YuUw`%Us;ay;v=Q9PWdR;yKz<AN}iMN+R3!!kV#A4^0^w&$v{&QzVd(C|E4
z)qj3Y{1>l@Ua9u{T$~<tehjT);)64BenPeTY;-=v=lo?KpM!NxNu}BYeGc2D-)-D)
zv)Z8y<@~O1CMsN^OuHHF??)2cy=8Xa#quQY9vIf$c9u5SS@LspW)S;2ku!s6=$(st
z3)Sv3e71-_joE7YiT;4OH<%Noq*OZ?tM?`)jyEZBv-^~4Up~I~j%Y<UW(;h>Y-Dja
zlxhd#<3q=}vz~Kjy;AL9te*SHahM#}c@<FY%f)9M$6<0@)+^P%T>KPzmb!@#XwXBm
zKcL#d*!)>n=n{R=6}?jJV5~mz5dBA7W^NcWhc`p1b}+1Ov-5Y=pK88a-8et)R`!J4
z4WZaG50%Ifv*GdEU}+xNvs$KlWlhQJ&Jy-mvMzxd3pK9KM)_4FKfIkEB)|M_(JG54
zCBBmFe7BXV1H=B;hVP$y20mZn-hqV<)bB+=wS%#G^HKCn)_Z#cvfi%8=yCQ6YLpZv
z4SH8a4wh<nk`f=K<F^U<N8cu>zr)KXGVNxp63MkMIBTu;6TOrVQ4uw5hC`v+nGyZ8
zuXhM<Rb<cK>et7`&vi+BVZ?X1R+|DnPPmAZqBhPV^1g;Ttx>AoXRJOwFZ<H-qVv8e
z)gI_=tr0(3YfQ>Ybo?~edatc@{9f-I_Rjlz4@T;`B{&yiR(Otu%~0?RDAkU)#Xpyg
z1${IxsK4UndeC47)`erCzm)6p`}|uE13P*WuHmZx)!SU5ugi57uk>rmwwtM0{NO?>
zL%)SK2JuksDo%Eui8tUP-j8Xe+I`0AGlQ}(GblQ*qEvgG9?kH7>;3P{hxCXQ`YYVP
u`}73wgJozbod5H<_<y=Hw%*X!)w>gOc!BFZU0?62A20RqcRY>0CFvJ3<{+>D

literal 0
HcmV?d00001

diff --git a/technology/gf180mcu/sp_lib/cell1rw.sp b/technology/gf180mcu/sp_lib/cell1rw.sp
new file mode 100644
index 00000000..2a199681
--- /dev/null
+++ b/technology/gf180mcu/sp_lib/cell1rw.sp
@@ -0,0 +1,11 @@
+* NGSPICE file created from 018SRAM_cell1_128x8m81.ext - technology: gf180mcuC
+
+.subckt x018SRAM_cell1_128x8m81 VDD WL GND BL BR nwell pwell
+X0 GND a_63_149# a_18_103# pwell nmos_6p0 w=0.95u l=0.6u
+X1 a_18_103# WL BL pwell nmos_6p0 w=0.6u l=0.77u
+X2 a_63_149# a_18_103# VDD nwell pmos_6p0 w=0.6u l=0.6u
+X3 a_63_149# WL BR pwell nmos_6p0 w=0.6u l=0.77u
+X4 VDD a_63_149# a_18_103# nwell pmos_6p0 w=0.6u l=0.6u
+X5 a_63_149# a_18_103# GND pwell nmos_6p0 w=0.95u l=0.6u
+.ends
+