From 8f56953af0e79c41bc819bd5fd28c8ea6b025dc9 Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Thu, 24 Jan 2019 10:20:23 -0800 Subject: [PATCH] Convert wordline driver to use sized pdriver --- compiler/modules/bank.py | 3 ++- compiler/modules/wordline_driver.py | 7 +++++-- compiler/tests/08_wordline_driver_test.py | 4 ++-- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/compiler/modules/bank.py b/compiler/modules/bank.py index fc00e1c4..a7e78980 100644 --- a/compiler/modules/bank.py +++ b/compiler/modules/bank.py @@ -446,7 +446,8 @@ class bank(design.design): self.add_mod(self.row_decoder) self.wordline_driver = factory.create(module_type="wordline_driver", - rows=self.num_rows) + rows=self.num_rows, + cols=self.num_cols) self.add_mod(self.wordline_driver) self.inv = factory.create(module_type="pinv") diff --git a/compiler/modules/wordline_driver.py b/compiler/modules/wordline_driver.py index 72f73a57..9b3d319c 100644 --- a/compiler/modules/wordline_driver.py +++ b/compiler/modules/wordline_driver.py @@ -15,10 +15,11 @@ class wordline_driver(design.design): Generates the wordline-driver to drive the bitcell """ - def __init__(self, name, rows): + def __init__(self, name, rows, cols): design.design.__init__(self, name) self.rows = rows + self.cols = cols self.create_netlist() if not OPTS.netlist_only: @@ -52,7 +53,9 @@ class wordline_driver(design.design): # This is just used for measurements, # so don't add the module - self.inv = factory.create(module_type="pinv") + self.inv = factory.create(module_type="pdriver", + fanout=self.cols, + neg_polarity=True) self.add_mod(self.inv) self.inv_no_output = factory.create(module_type="pinv", diff --git a/compiler/tests/08_wordline_driver_test.py b/compiler/tests/08_wordline_driver_test.py index bfbf54d8..bc69c776 100755 --- a/compiler/tests/08_wordline_driver_test.py +++ b/compiler/tests/08_wordline_driver_test.py @@ -22,7 +22,7 @@ class wordline_driver_test(openram_test): # check wordline driver for single port debug.info(2, "Checking driver") - tx = wordline_driver.wordline_driver(name="wld1", rows=8) + tx = wordline_driver.wordline_driver(name="wld1", rows=8, cols=32) self.local_check(tx) # check wordline driver for multi-port @@ -33,7 +33,7 @@ class wordline_driver_test(openram_test): factory.reset() debug.info(2, "Checking driver (multi-port case)") - tx = wordline_driver.wordline_driver(name="wld2", rows=8) + tx = wordline_driver.wordline_driver(name="wld2", rows=8, cols=64) self.local_check(tx) globals.end_openram()