From 8b6a28b6fd6cf0153b7bbc6ab0519119dbf375f9 Mon Sep 17 00:00:00 2001
From: Hunter Nichols <hznichol@ucsc.edu>
Date: Tue, 13 Nov 2018 22:24:18 -0800
Subject: [PATCH] Changed scmos bitcell 1rw,1r to have same tx widths as
 pbitcell.

---
 compiler/characterizer/functional.py          |   4 +-
 compiler/modules/control_logic.py             |   1 +
 technology/scn4m_subm/gds_lib/cell_1rw_1r.gds | Bin 6202 -> 6266 bytes
 technology/scn4m_subm/mag_lib/cell_1rw_1r.mag | 210 +++++++++---------
 technology/scn4m_subm/sp_lib/cell_1rw_1r.sp   |  20 +-
 5 files changed, 116 insertions(+), 119 deletions(-)

diff --git a/compiler/characterizer/functional.py b/compiler/characterizer/functional.py
index b99e644c..0c60fc23 100644
--- a/compiler/characterizer/functional.py
+++ b/compiler/characterizer/functional.py
@@ -40,8 +40,8 @@ class functional(simulation):
         """Spice constants for functional test"""
         simulation.set_spice_constants(self)
         #Heuristic increase for functional period. Base feasible period typically does not pass the functional test
-        #for column mux of this size. Increase the feasible period by 20% for this case.
-        if self.sram.words_per_row >= 4:
+        #for column mux or srams of this size. Increase the feasible period by 20% for this case.
+        if self.sram.words_per_row >= 4 or self.sram.num_cols*self.sram.num_rows >= 1024:
             self.period = self.period*1.2
     
     def run(self):
diff --git a/compiler/modules/control_logic.py b/compiler/modules/control_logic.py
index 21595698..88b6390c 100644
--- a/compiler/modules/control_logic.py
+++ b/compiler/modules/control_logic.py
@@ -31,6 +31,7 @@ class control_logic(design.design):
         
         #This is needed to resize the delay chain. Likely to be changed at some point.
         self.sram=sram
+        #self.sram=None #disable re-sizing for debugging
         self.wl_timing_tolerance = 1 #Determines how much larger the sen delay should be. Accounts for possible error in model.
         self.parasitic_inv_delay = 0 #Keeping 0 for now until further testing.
         
diff --git a/technology/scn4m_subm/gds_lib/cell_1rw_1r.gds b/technology/scn4m_subm/gds_lib/cell_1rw_1r.gds
index 4254ba26d107b9392f1889275302e2b261d967b4..21f2c8c84ae9852bb18b5b1e63d7161aa74b840d 100644
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diff --git a/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag b/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag
index 85323b17..3c3206dc 100644
--- a/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag
+++ b/technology/scn4m_subm/mag_lib/cell_1rw_1r.mag
@@ -1,110 +1,106 @@
 magic
 tech scmos
-timestamp 1541193956
+timestamp 1542175986
 << nwell >>
-rect 0 50 54 79
+rect 0 46 54 75
 << pwell >>
-rect 0 0 54 50
+rect 0 0 54 46
 << ntransistor >>
-rect 14 35 16 41
-rect 22 29 24 41
-rect 30 29 32 41
-rect 38 35 40 41
-rect 14 17 16 25
-rect 22 17 24 25
-rect 30 17 32 25
-rect 38 17 40 25
+rect 14 33 16 37
+rect 22 29 24 37
+rect 30 29 32 37
+rect 38 33 40 37
+rect 14 17 16 23
+rect 22 17 24 23
+rect 30 17 32 23
+rect 38 17 40 23
 << ptransistor >>
-rect 22 58 24 62
-rect 30 58 32 62
+rect 22 54 24 57
+rect 30 54 32 57
 << ndiffusion >>
-rect 9 39 14 41
-rect 13 35 14 39
-rect 16 35 17 41
-rect 21 33 22 41
+rect 13 33 14 37
+rect 16 33 17 37
+rect 21 33 22 37
 rect 17 29 22 33
-rect 24 29 25 41
-rect 29 29 30 41
-rect 32 33 33 41
-rect 37 35 38 41
-rect 40 39 45 41
-rect 40 35 41 39
+rect 24 29 25 37
+rect 29 29 30 37
+rect 32 33 33 37
+rect 37 33 38 37
+rect 40 33 41 37
 rect 32 29 37 33
-rect 9 23 14 25
-rect 13 19 14 23
-rect 9 17 14 19
-rect 16 17 22 25
-rect 24 17 25 25
-rect 29 17 30 25
-rect 32 17 38 25
-rect 40 23 45 25
-rect 40 19 41 23
-rect 40 17 45 19
+rect 9 21 14 23
+rect 13 17 14 21
+rect 16 17 22 23
+rect 24 17 25 23
+rect 29 17 30 23
+rect 32 17 38 23
+rect 40 21 45 23
+rect 40 17 41 21
 << pdiffusion >>
-rect 21 58 22 62
-rect 24 58 25 62
-rect 29 58 30 62
-rect 32 58 33 62
+rect 21 54 22 57
+rect 24 54 25 57
+rect 29 54 30 57
+rect 32 54 33 57
 << ndcontact >>
-rect 9 35 13 39
-rect 17 33 21 41
-rect 25 29 29 41
-rect 33 33 37 41
-rect 41 35 45 39
-rect 9 19 13 23
-rect 25 17 29 25
-rect 41 19 45 23
+rect 9 33 13 37
+rect 17 33 21 37
+rect 25 29 29 37
+rect 33 33 37 37
+rect 41 33 45 37
+rect 9 17 13 21
+rect 25 17 29 23
+rect 41 17 45 21
 << pdcontact >>
-rect 17 58 21 62
-rect 25 58 29 62
-rect 33 58 37 62
+rect 17 54 21 58
+rect 25 54 29 58
+rect 33 54 37 58
 << psubstratepcontact >>
 rect 25 9 29 13
 << nsubstratencontact >>
-rect 25 72 29 76
+rect 25 68 29 72
 << polysilicon >>
-rect 22 62 24 64
-rect 30 62 32 64
-rect 22 48 24 58
-rect 30 55 32 58
-rect 31 51 32 55
-rect 14 41 16 46
-rect 22 44 23 48
-rect 22 41 24 44
-rect 30 41 32 51
-rect 38 41 40 46
-rect 14 33 16 35
-rect 38 33 40 35
-rect 14 25 16 26
-rect 22 25 24 29
-rect 30 25 32 29
-rect 38 25 40 26
+rect 22 57 24 60
+rect 30 57 32 60
+rect 22 44 24 54
+rect 30 51 32 54
+rect 31 47 32 51
+rect 14 37 16 44
+rect 22 40 23 44
+rect 22 37 24 40
+rect 30 37 32 47
+rect 38 37 40 44
+rect 14 31 16 33
+rect 38 31 40 33
+rect 14 23 16 24
+rect 22 23 24 29
+rect 30 23 32 29
+rect 38 23 40 24
 rect 14 15 16 17
 rect 22 15 24 17
 rect 30 15 32 17
 rect 38 15 40 17
 << polycontact >>
-rect 27 51 31 55
-rect 10 42 14 46
-rect 23 44 27 48
-rect 40 42 44 46
-rect 12 26 16 30
-rect 38 26 42 30
+rect 27 47 31 51
+rect 10 40 14 44
+rect 23 40 27 44
+rect 40 40 44 44
+rect 12 24 16 28
+rect 38 24 42 28
 << metal1 >>
-rect 0 72 25 76
-rect 29 72 54 76
-rect 0 65 54 69
-rect 10 46 14 65
-rect 17 55 20 58
-rect 17 51 27 55
-rect 17 41 20 51
-rect 34 48 37 58
-rect 27 44 37 48
-rect 34 41 37 44
-rect 40 46 44 65
-rect 6 35 9 39
-rect 45 35 48 39
-rect 25 25 29 29
+rect 0 68 25 72
+rect 29 68 54 72
+rect 0 61 54 65
+rect 10 44 14 61
+rect 17 51 20 54
+rect 17 47 27 51
+rect 17 37 20 47
+rect 34 44 37 54
+rect 27 40 37 44
+rect 40 44 44 61
+rect 34 37 37 40
+rect 6 33 9 37
+rect 45 33 48 37
+rect 25 23 29 29
 rect 25 13 29 17
 rect 0 9 25 13
 rect 29 9 54 13
@@ -112,37 +108,37 @@ rect 0 2 16 6
 rect 20 2 34 6
 rect 38 2 54 6
 << m2contact >>
-rect 25 72 29 76
-rect 25 58 29 62
-rect 2 35 6 39
-rect 16 26 20 30
-rect 48 35 52 39
-rect 34 26 38 30
-rect 9 19 13 23
-rect 41 19 45 23
+rect 25 68 29 72
+rect 25 54 29 58
+rect 2 33 6 37
+rect 48 33 52 37
+rect 16 24 20 28
+rect 34 24 38 28
+rect 9 17 13 21
+rect 41 17 45 21
 rect 16 2 20 6
 rect 34 2 38 6
 << metal2 >>
-rect 2 39 6 76
-rect 2 0 6 35
-rect 9 23 13 76
-rect 25 62 29 72
-rect 9 0 13 19
-rect 16 6 20 26
-rect 34 6 38 26
-rect 41 23 45 76
-rect 41 0 45 19
-rect 48 39 52 76
-rect 48 0 52 35
+rect 2 37 6 72
+rect 2 0 6 33
+rect 9 21 13 72
+rect 25 58 29 68
+rect 9 0 13 17
+rect 16 6 20 24
+rect 34 6 38 24
+rect 41 21 45 72
+rect 41 0 45 17
+rect 48 37 52 72
+rect 48 0 52 33
 << bb >>
-rect 0 0 54 74
+rect 0 0 54 70
 << labels >>
+rlabel metal1 19 63 19 63 1 wl0
+rlabel metal1 19 70 19 70 5 vdd
 rlabel metal1 27 4 27 4 1 wl1
 rlabel psubstratepcontact 27 11 27 11 1 gnd
-rlabel metal1 19 67 19 67 1 wl0
 rlabel metal2 4 7 4 7 2 bl0
 rlabel metal2 11 7 11 7 1 bl1
 rlabel metal2 43 7 43 7 1 br1
 rlabel metal2 50 7 50 7 8 br0
-rlabel metal1 19 74 19 74 5 vdd
 << end >>
diff --git a/technology/scn4m_subm/sp_lib/cell_1rw_1r.sp b/technology/scn4m_subm/sp_lib/cell_1rw_1r.sp
index 1a52d8d0..37f25f75 100644
--- a/technology/scn4m_subm/sp_lib/cell_1rw_1r.sp
+++ b/technology/scn4m_subm/sp_lib/cell_1rw_1r.sp
@@ -1,14 +1,14 @@
 
 .SUBCKT cell_1rw_1r bl0 br0 bl1 br1 wl0 wl1 vdd gnd
-MM9 RA_to_R_right wl1 br1 gnd n w=1.6u l=0.4u
-MM8 RA_to_R_right Q gnd gnd n w=1.6u l=0.4u
-MM7 RA_to_R_left Q_bar gnd gnd n w=1.6u l=0.4u
-MM6 RA_to_R_left wl1 bl1 gnd n w=1.6u l=0.4u
-MM5 Q wl0 bl0 gnd n w=1.2u l=0.4u
-MM4 Q_bar wl0 br0 gnd n w=1.2u l=0.4u
-MM1 Q Q_bar gnd gnd n w=2.4u l=0.4u
-MM0 Q_bar Q gnd gnd n w=2.4u l=0.4u
-MM3 Q Q_bar vdd vdd p w=0.8u l=0.4u
-MM2 Q_bar Q vdd vdd p w=0.8u l=0.4u
+MM9 RA_to_R_right wl1 br1 gnd n w=1.2u l=0.4u
+MM8 RA_to_R_right Q gnd gnd n w=1.2u l=0.4u
+MM7 RA_to_R_left Q_bar gnd gnd n w=1.2u l=0.4u
+MM6 RA_to_R_left wl1 bl1 gnd n w=1.2u l=0.4u
+MM5 Q wl0 bl0 gnd n w=0.8u l=0.4u
+MM4 Q_bar wl0 br0 gnd n w=0.8u l=0.4u
+MM1 Q Q_bar gnd gnd n w=1.6u l=0.4u
+MM0 Q_bar Q gnd gnd n w=1.6u l=0.4u
+MM3 Q Q_bar vdd vdd p w=0.6u l=0.4u
+MM2 Q_bar Q vdd vdd p w=0.6u l=0.4u
 .ENDS