From 881c449c7cd9bc6a166b0cab422cda280e3f569f Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Mon, 28 Jan 2019 07:53:36 -0800 Subject: [PATCH] Fix error in offset computation for right drivers --- compiler/modules/bank.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/modules/bank.py b/compiler/modules/bank.py index ede3500f..5d4e9739 100644 --- a/compiler/modules/bank.py +++ b/compiler/modules/bank.py @@ -1088,7 +1088,7 @@ class bank(design.design): driver_wl_pos = self.wordline_driver_inst[port].get_pin("wl_{}".format(row)).lc() bitcell_wl_pos = self.bitcell_array_inst.get_pin(self.wl_names[port]+"_{}".format(row)).rc() mid1 = driver_wl_pos.scale(0,1) + vector(0.5*self.wordline_driver_inst[port].lx() + 0.5*self.bitcell_array_inst.rx(),0) - mid2 = mid1.scale(1,0)+bitcell_wl_pos.scale(0.5,1) + mid2 = mid1.scale(1,0)+bitcell_wl_pos.scale(0,1) self.add_path("metal1", [driver_wl_pos, mid1, mid2, bitcell_wl_pos]) def route_column_address_lines(self, port):