From 7fe0f647efdfe18c4a2e4296ebffe688e2f853f8 Mon Sep 17 00:00:00 2001 From: Bugra Onal Date: Thu, 28 Jul 2022 17:00:16 -0700 Subject: [PATCH] fix --- compiler/modules/sram.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/modules/sram.py b/compiler/modules/sram.py index 351c83cf..67715789 100644 --- a/compiler/modules/sram.py +++ b/compiler/modules/sram.py @@ -42,7 +42,7 @@ class sram(): if self.num_banks != 1: from sram_multibank import sram_multibank - mb = sram_multibank(s) + mb = sram_multibank(self.s) mb.verilog_write() self.s.create_netlist()