From 7fce6f06cadecc0d0a8419219f6db0e9c37da57b Mon Sep 17 00:00:00 2001
From: Matt Guthaus <mrg+openram@ucsc.edu>
Date: Tue, 4 Dec 2018 09:35:40 -0800
Subject: [PATCH] Expand grids to maximal pin before removing blockages

---
 compiler/router/pin_group.py     |  4 ++--
 compiler/router/router.py        | 39 +++++++++++++++++---------------
 compiler/router/supply_router.py |  2 +-
 3 files changed, 24 insertions(+), 21 deletions(-)

diff --git a/compiler/router/pin_group.py b/compiler/router/pin_group.py
index eaeb2421..cc4a21c3 100644
--- a/compiler/router/pin_group.py
+++ b/compiler/router/pin_group.py
@@ -608,7 +608,7 @@ class pin_group:
             
             for pin_list in self.pins:
                 for pin in pin_list:
-                    debug.info(2,"  Converting {0}".format(pin))
+                    debug.warning("  Expanding conversion {0}".format(pin))
                     # Determine which tracks the pin overlaps 
                     pin_in_tracks=self.router.convert_pin_to_tracks(self.name, pin, expansion=1)
                     pin_set.update(pin_in_tracks)
@@ -618,7 +618,7 @@ class pin_group:
                 self.router.write_debug_gds("blocked_pin.gds")
 
         # We need to route each of the components, so don't combine the groups
-        self.grids = pin_set | blockage_set
+        self.grids = pin_set 
         # Remember the secondary grids for removing adjacent pins in wide metal spacing
         self.secondary_grids = blockage_set - pin_set
 
diff --git a/compiler/router/router.py b/compiler/router/router.py
index 3f81e33d..3c98a77d 100644
--- a/compiler/router/router.py
+++ b/compiler/router/router.py
@@ -182,10 +182,10 @@ class router(router_tech):
         #print_time("Combine pins",datetime.now(), start_time)
         #self.write_debug_gds("debug_combine_pins.gds",stop_program=True)
 
-        # Separate any adjacent grids of differing net names to prevent wide metal DRC violations
+        # Separate any adjacent grids of differing net names that overlap
         # Must be done before enclosing pins
         #start_time = datetime.now()
-        #self.separate_adjacent_pins(self.supply_rail_space_width)
+        self.separate_adjacent_pins(0)
         #print_time("Separate pins",datetime.now(), start_time)
         # For debug
         #self.separate_adjacent_pins(1)
@@ -515,7 +515,7 @@ class router(router_tech):
         # scale the size bigger to include neaby tracks
         ll=ll.scale(self.track_factor).floor()
         ur=ur.scale(self.track_factor).ceil()
-        #print(pin)
+
         # Keep tabs on tracks with sufficient and insufficient overlap
         sufficient_list = set()
         insufficient_list = set()
@@ -528,23 +528,26 @@ class router(router_tech):
                     sufficient_list.update([full_overlap])
                 if partial_overlap:
                     insufficient_list.update([partial_overlap])
-                debug.info(3,"Converting [ {0} , {1} ] full={2} partial={3}".format(x,y, full_overlap, partial_overlap))
+                debug.info(2,"Converting [ {0} , {1} ] full={2} partial={3}".format(x,y, full_overlap, partial_overlap))
 
-        # Remove the blocked grids 
-        sufficient_list.difference_update(self.blocked_grids)
-        insufficient_list.difference_update(self.blocked_grids)
+        # Return all grids with any potential overlap (sufficient or not)
+        return sufficient_list|insufficient_list
+    
+        # # Remove the blocked grids 
+        # sufficient_list.difference_update(self.blocked_grids)
+        # insufficient_list.difference_update(self.blocked_grids)
         
-        if len(sufficient_list)>0:
-            return sufficient_list
-        elif expansion==0 and len(insufficient_list)>0:
-            best_pin = self.get_all_offgrid_pin(pin, insufficient_list)
-            #print(best_pin)
-            return best_pin
-        elif expansion>0:
-            nearest_pin = self.get_furthest_offgrid_pin(pin, insufficient_list)
-            return nearest_pin
-        else:
-            return set()
+        # if len(sufficient_list)>0:
+        #     return sufficient_list
+        # elif expansion==0 and len(insufficient_list)>0:
+        #     best_pin = self.get_all_offgrid_pin(pin, insufficient_list)
+        #     #print(best_pin)
+        #     return best_pin
+        # elif expansion>0:
+        #     nearest_pin = self.get_furthest_offgrid_pin(pin, insufficient_list)
+        #     return nearest_pin
+        # else:
+        #     return set()
 
     def get_all_offgrid_pin(self, pin, insufficient_list):
         """ 
diff --git a/compiler/router/supply_router.py b/compiler/router/supply_router.py
index a9d0b445..e5c8dd7d 100644
--- a/compiler/router/supply_router.py
+++ b/compiler/router/supply_router.py
@@ -71,7 +71,7 @@ class supply_router(router):
         #start_time = datetime.now()
         self.find_pins_and_blockages([self.vdd_name, self.gnd_name])
         #print_time("Pins and blockages",datetime.now(), start_time)
-        self.write_debug_gds("pin_enclosures.gds",stop_program=True)
+        #self.write_debug_gds("pin_enclosures.gds",stop_program=True)
 
         # Add the supply rails in a mesh network and connect H/V with vias
         #start_time = datetime.now()