From 7b029a4582741422a8cc3cb7c91d7644e8057dcb Mon Sep 17 00:00:00 2001
From: Hunter Nichols <hznichol@ucsc.edu>
Date: Mon, 30 Sep 2019 14:02:00 -0700
Subject: [PATCH] Updated golden values in delay tests due to model changes.

---
 compiler/tests/21_hspice_delay_test.py      | 20 ++++++++++----------
 compiler/tests/21_hspice_setuphold_test.py  |  8 ++++----
 compiler/tests/21_ngspice_delay_test.py     | 20 ++++++++++----------
 compiler/tests/21_ngspice_setuphold_test.py |  8 ++++----
 4 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/compiler/tests/21_hspice_delay_test.py b/compiler/tests/21_hspice_delay_test.py
index e2222fcf..e5317cec 100755
--- a/compiler/tests/21_hspice_delay_test.py
+++ b/compiler/tests/21_hspice_delay_test.py
@@ -72,16 +72,16 @@ class timing_sram_test(openram_test):
                             'write0_power': [0.37980179999999997],
                            'write1_power': [0.3532026]}
         elif OPTS.tech_name == "scn4m_subm":
-            golden_data = {'delay_hl': [1.4082],
-                           'delay_lh': [1.4082],
-                           'leakage_power': 0.0267388,
-                           'min_period': 4.688,
-                           'read0_power': [11.5255],
-                           'read1_power': [10.9406],
-                           'slew_hl': [1.2979],
-                           'slew_lh': [1.2979],
-                           'write0_power': [12.9458],
-                           'write1_power': [11.7444]}
+            golden_data = {'delay_hl': [1.7445000000000002],
+                           'delay_lh': [1.7445000000000002],
+                           'leakage_power': 0.025635599999999998,
+                           'min_period': 6.25,
+                           'read0_power': [13.58],
+                           'read1_power': [12.9926],
+                           'slew_hl': [1.7434000000000003],
+                           'slew_lh': [1.7434000000000003],
+                           'write0_power': [14.9158],
+                           'write1_power': [11.9173]}
         else:
             self.assertTrue(False) # other techs fail
         # Check if no too many or too few results
diff --git a/compiler/tests/21_hspice_setuphold_test.py b/compiler/tests/21_hspice_setuphold_test.py
index ef5cf1a8..83bd5509 100755
--- a/compiler/tests/21_hspice_setuphold_test.py
+++ b/compiler/tests/21_hspice_setuphold_test.py
@@ -42,10 +42,10 @@ class timing_setup_test(openram_test):
                            'setup_times_HL': [0.026855499999999997],
                            'setup_times_LH': [0.032959]}
         elif OPTS.tech_name == "scn4m_subm":
-            golden_data = {'hold_times_HL': [-0.0891113],
-                            'hold_times_LH': [-0.0769043],
-                            'setup_times_HL': [0.1184082],
-                            'setup_times_LH': [0.1733398]}
+            golden_data = {'hold_times_HL': [-0.0805664],
+                           'hold_times_LH': [-0.11718749999999999],
+                           'setup_times_HL': [0.16357419999999998],
+                           'setup_times_LH': [0.1757812]}
         else:
             self.assertTrue(False) # other techs fail
 
diff --git a/compiler/tests/21_ngspice_delay_test.py b/compiler/tests/21_ngspice_delay_test.py
index 0fe5dfdd..a5eb67fa 100755
--- a/compiler/tests/21_ngspice_delay_test.py
+++ b/compiler/tests/21_ngspice_delay_test.py
@@ -65,16 +65,16 @@ class timing_sram_test(openram_test):
                            'write0_power': [0.36360849999999995],
                            'write1_power': [0.3486931]}
         elif OPTS.tech_name == "scn4m_subm":
-            golden_data = {'delay_hl': [1.7083549999999998],
-                           'delay_lh': [1.7083549999999998],
-                           'leakage_power': 0.001119657,
-                           'min_period': 7.812,
-                           'read0_power': [8.013845],
-                           'read1_power': [7.6889389999999995],
-                           'slew_hl': [1.31918],
-                           'slew_lh': [1.31918],
-                           'write0_power': [8.791557000000001],
-                           'write1_power': [8.70443]}
+            golden_data = {'delay_hl': [1.85985],
+                           'delay_lh': [1.85985],
+                           'leakage_power': 0.008613619,
+                           'min_period': 6.875,
+                           'read0_power': [12.656310000000001],
+                           'read1_power': [12.11682],
+                           'slew_hl': [1.868942],
+                           'slew_lh': [1.868942],
+                           'write0_power': [13.978110000000001],
+                           'write1_power': [11.437930000000001]}
         else:
             self.assertTrue(False) # other techs fail
 
diff --git a/compiler/tests/21_ngspice_setuphold_test.py b/compiler/tests/21_ngspice_setuphold_test.py
index 4a289812..0d160943 100755
--- a/compiler/tests/21_ngspice_setuphold_test.py
+++ b/compiler/tests/21_ngspice_setuphold_test.py
@@ -42,10 +42,10 @@ class timing_setup_test(openram_test):
                            'setup_times_HL': [0.02685547],
                            'setup_times_LH': [0.03295898]}
         elif OPTS.tech_name == "scn4m_subm":
-            golden_data = {'hold_times_HL': [-0.08911132999999999],
-                            'hold_times_LH': [-0.0769043],
-                            'setup_times_HL': [0.1184082],
-                            'setup_times_LH': [0.1672363]}
+            golden_data = {'hold_times_HL': [-0.08056640999999999],
+                           'hold_times_LH': [-0.1293945],
+                           'setup_times_HL': [0.1757812],
+                           'setup_times_LH': [0.1879883]}
         else:
             self.assertTrue(False) # other techs fail