From 789a8a1cf06999de81a927dd3ee25c903147ec2b Mon Sep 17 00:00:00 2001
From: mrg <mrg@ucsc.edu>
Date: Wed, 5 May 2021 15:37:27 -0700
Subject: [PATCH] Update golden verilog results

---
 compiler/tests/golden/sram_2_16_1_freepdk45.v  | 9 +++++++++
 compiler/tests/golden/sram_2_16_1_scn4m_subm.v | 9 +++++++++
 2 files changed, 18 insertions(+)

diff --git a/compiler/tests/golden/sram_2_16_1_freepdk45.v b/compiler/tests/golden/sram_2_16_1_freepdk45.v
index 46f89fa5..a35d3da7 100644
--- a/compiler/tests/golden/sram_2_16_1_freepdk45.v
+++ b/compiler/tests/golden/sram_2_16_1_freepdk45.v
@@ -3,6 +3,10 @@
 // Word size: 2
 
 module sram_2_16_1_freepdk45(
+`ifdef USE_POWER_PINS
+    vdd,
+    gnd,
+`endif
 // Port 0: RW
     clk0,csb0,web0,addr0,din0,dout0
   );
@@ -15,6 +19,11 @@ module sram_2_16_1_freepdk45(
   parameter VERBOSE = 1 ; //Set to 0 to only display warnings
   parameter T_HOLD = 1 ; //Delay to hold dout value after posedge. Value is arbitrary
 
+module sram_2_16_1_freepdk45(
+`ifdef USE_POWER_PINS
+    inout vdd;
+    inout gnd;
+`endif
   input  clk0; // clock
   input   csb0; // active low chip select
   input  web0; // active low write control
diff --git a/compiler/tests/golden/sram_2_16_1_scn4m_subm.v b/compiler/tests/golden/sram_2_16_1_scn4m_subm.v
index cb95036b..e53abcbe 100644
--- a/compiler/tests/golden/sram_2_16_1_scn4m_subm.v
+++ b/compiler/tests/golden/sram_2_16_1_scn4m_subm.v
@@ -3,6 +3,10 @@
 // Word size: 2
 
 module sram_2_16_1_scn4m_subm(
+`ifdef USE_POWER_PINS
+    vdd,
+    gnd,
+`endif
 // Port 0: RW
     clk0,csb0,web0,addr0,din0,dout0
   );
@@ -15,6 +19,11 @@ module sram_2_16_1_scn4m_subm(
   parameter VERBOSE = 1 ; //Set to 0 to only display warnings
   parameter T_HOLD = 1 ; //Delay to hold dout value after posedge. Value is arbitrary
 
+module sram_2_16_1_scn4m_subm(
+`ifdef USE_POWER_PINS
+    inout vdd;
+    inout gnd;
+`endif
   input  clk0; // clock
   input   csb0; // active low chip select
   input  web0; // active low write control