From 6f01ab4792f679e4d5cada0e452edf3428ed8e53 Mon Sep 17 00:00:00 2001 From: Hunter Nichols Date: Mon, 22 Mar 2021 12:55:29 -0700 Subject: [PATCH] Added simulation time modeling to regression model. --- compiler/characterizer/lib.py | 10 ++++++++-- compiler/characterizer/regression_model.py | 9 ++++++--- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/compiler/characterizer/lib.py b/compiler/characterizer/lib.py index 2adecd5f..5b6e0a26 100644 --- a/compiler/characterizer/lib.py +++ b/compiler/characterizer/lib.py @@ -26,6 +26,7 @@ class lib: self.sram = sram self.sp_file = sp_file self.use_model = use_model + self.pred_time = None self.set_port_indices() self.prepare_tables() @@ -151,7 +152,10 @@ class lib: self.corner_name = lib_name.replace(self.out_dir,"").replace(".lib","") self.characterize() self.lib.close() - total_time = time.time()-run_start + if self.pred_time == None: + total_time = time.time()-run_start + else: + total_time = self.pred_time self.parse_info(self.corner,lib_name, is_first_corner, total_time) is_first_corner = False @@ -637,7 +641,9 @@ class lib: probe_data = self.sram.word_size - 1 char_results = self.d.analyze(probe_address, probe_data, self.load_slews) self.char_sram_results, self.char_port_results = char_results - + if 'sim_time' in self.char_sram_results: + self.pred_time = self.char_sram_results['sim_time'] + def compute_setup_hold(self): """ Do the analysis if we haven't characterized a FF yet """ # Do the analysis if we haven't characterized a FF yet diff --git a/compiler/characterizer/regression_model.py b/compiler/characterizer/regression_model.py index 89e6eb1b..a282f3a9 100644 --- a/compiler/characterizer/regression_model.py +++ b/compiler/characterizer/regression_model.py @@ -22,7 +22,8 @@ data_fnames = ["rise_delay.csv", "write0_power.csv", "read1_power.csv", "read0_power.csv", - "leakage_data.csv"] + "leakage_data.csv", + "sim_time.csv"] # Positions must correspond to data_fname list lib_dnames = ["delay_lh", "delay_hl", @@ -32,7 +33,8 @@ lib_dnames = ["delay_lh", "write0_power", "read1_power", "read0_power", - "leakage_power"] + "leakage_power", + "sim_time"] # Check if another data dir was specified if OPTS.sim_data_path == None: data_dir = OPTS.openram_tech+relative_data_path @@ -100,7 +102,8 @@ class regression_model(simulation): # Estimate the period as double the delay with margin period_margin = 0.1 sram_data = {"min_period": sram_vals['delay_lh'] * 2, - "leakage_power": sram_vals["leakage_power"]} + "leakage_power": sram_vals["leakage_power"], + "sim_time":sram_vals["sim_time"]} debug.info(2, "SRAM Data:\n{}".format(sram_data)) debug.info(2, "Port Data:\n{}".format(port_data))