From 6ef1b6a4ec499db1d7da8af017aa4c36f8d2f771 Mon Sep 17 00:00:00 2001
From: Matt Guthaus <mrg@ucsc.edu>
Date: Fri, 29 Nov 2019 15:50:32 -0800
Subject: [PATCH] Blackbox option for DRC waivers

---
 compiler/options.py                   | 2 --
 compiler/tests/01_library_drc_test.py | 5 +++++
 technology/freepdk45/tech/tech.py     | 2 ++
 technology/scn4m_subm/tech/tech.py    | 2 ++
 4 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/compiler/options.py b/compiler/options.py
index fb8aab35..d891ebd9 100644
--- a/compiler/options.py
+++ b/compiler/options.py
@@ -86,8 +86,6 @@ class options(optparse.Values):
     check_lvsdrc = False
     # This determines whether LVS and DRC is checked for every submodule.
     inline_lvsdrc = False
-    # Treat the bitcell as a black box (no DRC, LVS, or extraction)
-    blackbox_bitcell = False
     # Remove noncritical memory cells for characterization speed-up
     trim_netlist = False
     # Run with extracted parasitics
diff --git a/compiler/tests/01_library_drc_test.py b/compiler/tests/01_library_drc_test.py
index cfeb4ab2..ad8671d2 100755
--- a/compiler/tests/01_library_drc_test.py
+++ b/compiler/tests/01_library_drc_test.py
@@ -42,6 +42,11 @@ def setup_files():
     files = os.listdir(gds_dir)
     nametest = re.compile("\.gds$", re.IGNORECASE)
     gds_files = list(filter(nametest.search, files))
+    import tech
+    if tech.blackbox_bitcell:
+        # Ignore DRC of all bitcells
+        nametest = re.compile("cell", re.IGNORECASE)
+        gds_files = list(filter(lambda v: not nametest.search(v), gds_files))
     return (gds_dir, gds_files)
 
 
diff --git a/technology/freepdk45/tech/tech.py b/technology/freepdk45/tech/tech.py
index 14db2ea4..13e7ccff 100644
--- a/technology/freepdk45/tech/tech.py
+++ b/technology/freepdk45/tech/tech.py
@@ -344,6 +344,8 @@ drc_name = "calibre"
 lvs_name = "calibre"
 pex_name = "calibre"
 
+blackbox_bitcell = False
+
 ###################################################
 ##END Technology Tool Preferences
 ###################################################
diff --git a/technology/scn4m_subm/tech/tech.py b/technology/scn4m_subm/tech/tech.py
index be3ab83c..2d1d5e15 100644
--- a/technology/scn4m_subm/tech/tech.py
+++ b/technology/scn4m_subm/tech/tech.py
@@ -310,6 +310,8 @@ drc_name = "magic"
 lvs_name = "netgen"
 pex_name = "magic"
 
+blackbox_bitcell = False
+
 ###################################################
 ##END Technology Tool Preferences
 ###################################################