diff --git a/compiler/modules/custom_module_properties.py b/compiler/modules/custom_module_properties.py new file mode 100644 index 00000000..43c140b0 --- /dev/null +++ b/compiler/modules/custom_module_properties.py @@ -0,0 +1,27 @@ +# See LICENSE for licensing information. +# +# Copyright (c) 2016-2020 Regents of the University of California and The Board +# of Regents for the Oklahoma Agricultural and Mechanical College +# (acting for and on behalf of Oklahoma State University) +# All rights reserved. +# + +class _dff: + def __init__(self, use_custom_ports, custom_port_list, custom_type_list): + self.use_custom_ports = use_custom_ports + self.custom_port_list = custom_port_list + self.custom_type_list = custom_type_list + +class module_properties(): + """ + TODO + """ + def __init__(self): + self.names = {} + self._dff = _dff(use_custom_ports = False, + custom_port_list = [], + custom_type_list = []) + + @property + def dff(self): + return self._dff diff --git a/compiler/modules/dff.py b/compiler/modules/dff.py index 8871872d..1078088e 100644 --- a/compiler/modules/dff.py +++ b/compiler/modules/dff.py @@ -7,6 +7,7 @@ # import design from tech import GDS, layer, spice, parameter +from tech import module_properties import utils @@ -14,9 +15,13 @@ class dff(design.design): """ Memory address flip-flop """ + if not module_properties.dff.use_custom_ports: + pin_names = ["D", "Q", "clk", "vdd", "gnd"] + type_list = ["INPUT", "OUTPUT", "INPUT", "POWER", "GROUND"] + else: + pin_names = module_properties.dff.custom_port_list + type_list = module_properties.dff.custom_type_list - pin_names = ["D", "Q", "clk", "vdd", "gnd"] - type_list = ["INPUT", "OUTPUT", "INPUT", "POWER", "GROUND"] (width, height) = utils.get_libcell_size("dff", GDS["unit"], layer["boundary"])