From 6ab4f5363aec9db5f10399bc6fb5cef1238f420c Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Thu, 13 Sep 2018 11:03:35 -0700 Subject: [PATCH] Initial scn4me_subm cells and rules. --- technology/scn4me_subm/gds_lib/cell_6t.gds | Bin 0 -> 5660 bytes technology/scn4me_subm/gds_lib/dff.gds | Bin 0 -> 16558 bytes .../scn4me_subm/gds_lib/replica_cell_6t.gds | Bin 0 -> 5804 bytes technology/scn4me_subm/gds_lib/sense_amp.gds | Bin 0 -> 8248 bytes technology/scn4me_subm/gds_lib/tri_gate.gds | Bin 0 -> 4512 bytes .../scn4me_subm/gds_lib/write_driver.gds | Bin 0 -> 11740 bytes technology/scn4me_subm/mag_lib/.magicrc | 5 + technology/scn4me_subm/mag_lib/cell_6t.mag | 117 + technology/scn4me_subm/mag_lib/dff.mag | 279 + .../scn4me_subm/mag_lib/replica_cell_6t.mag | 118 + technology/scn4me_subm/mag_lib/sense_amp.mag | 136 + technology/scn4me_subm/mag_lib/tri_gate.mag | 98 + .../scn4me_subm/mag_lib/write_driver.mag | 224 + technology/scn4me_subm/models/ff/nmos.sp | 10 + technology/scn4me_subm/models/ff/pmos.sp | 9 + technology/scn4me_subm/models/nom/nmos.sp | 9 + technology/scn4me_subm/models/nom/pmos.sp | 9 + technology/scn4me_subm/models/ss/nmos.sp | 10 + technology/scn4me_subm/models/ss/pmos.sp | 9 + technology/scn4me_subm/sp_lib/cell_6t.sp | 13 + technology/scn4me_subm/sp_lib/dff.sp | 30 + .../scn4me_subm/sp_lib/replica_cell_6t.sp | 14 + technology/scn4me_subm/sp_lib/sense_amp.sp | 15 + technology/scn4me_subm/sp_lib/tri_gate.sp | 14 + technology/scn4me_subm/sp_lib/write_driver.sp | 23 + technology/scn4me_subm/sue_lib/cell_6t.sue | 46 + technology/scn4me_subm/sue_lib/ms_flop.sue | 84 + .../scn4me_subm/sue_lib/replica_cell_6t.sue | 49 + technology/scn4me_subm/sue_lib/sense_amp.sue | 52 + technology/scn4me_subm/sue_lib/tri_gate.sue | 37 + .../scn4me_subm/sue_lib/write_driver.sue | 44 + technology/scn4me_subm/tech/LICENSE.txt | 10 + .../scn4me_subm/tech/SCN4M_SUBM.20.tech | 10329 ++++++++++++++++ technology/scn4me_subm/tech/__init__.py | 6 + technology/scn4me_subm/tech/tech.py | 295 + technology/scn4me_subm/tf/LICENSE | 4 + technology/scn4me_subm/tf/README | 21 + technology/scn4me_subm/tf/display.drf | 717 ++ .../scn4me_subm/tf/glade_scn4me_subm.py | 7 + technology/scn4me_subm/tf/layers.map | 18 + technology/scn4me_subm/tf/mosis.tf | 850 ++ 41 files changed, 13711 insertions(+) create mode 100644 technology/scn4me_subm/gds_lib/cell_6t.gds create mode 100644 technology/scn4me_subm/gds_lib/dff.gds create mode 100644 technology/scn4me_subm/gds_lib/replica_cell_6t.gds create mode 100644 technology/scn4me_subm/gds_lib/sense_amp.gds create mode 100644 technology/scn4me_subm/gds_lib/tri_gate.gds create mode 100644 technology/scn4me_subm/gds_lib/write_driver.gds create mode 100644 technology/scn4me_subm/mag_lib/.magicrc create mode 100644 technology/scn4me_subm/mag_lib/cell_6t.mag create mode 100644 technology/scn4me_subm/mag_lib/dff.mag create mode 100644 technology/scn4me_subm/mag_lib/replica_cell_6t.mag create mode 100644 technology/scn4me_subm/mag_lib/sense_amp.mag create mode 100644 technology/scn4me_subm/mag_lib/tri_gate.mag create mode 100644 technology/scn4me_subm/mag_lib/write_driver.mag create mode 100644 technology/scn4me_subm/models/ff/nmos.sp create mode 100644 technology/scn4me_subm/models/ff/pmos.sp create mode 100644 technology/scn4me_subm/models/nom/nmos.sp create mode 100644 technology/scn4me_subm/models/nom/pmos.sp create mode 100644 technology/scn4me_subm/models/ss/nmos.sp create mode 100644 technology/scn4me_subm/models/ss/pmos.sp create mode 100644 technology/scn4me_subm/sp_lib/cell_6t.sp create mode 100644 technology/scn4me_subm/sp_lib/dff.sp create mode 100644 technology/scn4me_subm/sp_lib/replica_cell_6t.sp create mode 100644 technology/scn4me_subm/sp_lib/sense_amp.sp create mode 100644 technology/scn4me_subm/sp_lib/tri_gate.sp create mode 100644 technology/scn4me_subm/sp_lib/write_driver.sp create mode 100644 technology/scn4me_subm/sue_lib/cell_6t.sue create mode 100644 technology/scn4me_subm/sue_lib/ms_flop.sue create mode 100644 technology/scn4me_subm/sue_lib/replica_cell_6t.sue create mode 100644 technology/scn4me_subm/sue_lib/sense_amp.sue create mode 100644 technology/scn4me_subm/sue_lib/tri_gate.sue create mode 100644 technology/scn4me_subm/sue_lib/write_driver.sue create mode 100644 technology/scn4me_subm/tech/LICENSE.txt create mode 100644 technology/scn4me_subm/tech/SCN4M_SUBM.20.tech create mode 100755 technology/scn4me_subm/tech/__init__.py create mode 100755 technology/scn4me_subm/tech/tech.py create mode 100644 technology/scn4me_subm/tf/LICENSE create mode 100644 technology/scn4me_subm/tf/README create mode 100644 technology/scn4me_subm/tf/display.drf create mode 100644 technology/scn4me_subm/tf/glade_scn4me_subm.py create mode 100644 technology/scn4me_subm/tf/layers.map create mode 100644 technology/scn4me_subm/tf/mosis.tf diff --git a/technology/scn4me_subm/gds_lib/cell_6t.gds b/technology/scn4me_subm/gds_lib/cell_6t.gds new file mode 100644 index 0000000000000000000000000000000000000000..e44a111806248b29d516fd0d0b79a5b2a0d26eba GIT binary patch literal 5660 zcmbuDKWtl76vj_t$8l08wc8|3NN7w$)B=SDkf1CmNDN3U9T*}OA}FFmgerteM~`L8 z7>T7D9W!RkgfeFAm@#9q|5XP5gJsO0{V@80j6d(ZvzUTiI!w1%xsOxh!x zv8K)WZyUwWbN>4+>se>A_1*V-d*6KYv)Mvp>eJ7D{rJm2e!uwS^P@XYfBX6?Tbru! zwn}faZPuEbw70D_KWS#SyN%)S&ttQtXJ-A=k~g1+E_!>jXD0t!qyFgIKNX3ixUl%S z>VLQNn_YVtxnDmld9xe3=wr+Hhr_?ld{WzHok7XVPeT{IJ>$m{eLDj&;t(@Fg`V~I zwxS>7r$4;>)C^s$%ir6Iyw@Iz5l3-Tdo};Ek<{)&@+pGC2{^9U%&%bsa`%hf=J%uj1UhntZ6Zb#q;GJ?n2Dm|gPz zvmQg7`@#%ebUo|8`Xqdd%O&xli+TTWIJ_IV?WE+TqtHbkTQ)!QWbE8^BJ)5O>-_Bl zjX^YHEX+Sx=-K>NpM-C5SqvZZ$Di6W{_t?_=__7;9J)Am{zulIIpbrl;`PT-3$f1M zdl5dyiyz`c7wi1g86Wi*@u7=(f6S9y%wJSZMb|U+i#+(qFER)6i(~%xs^@3Q$BLKr z7I_y#7hSLBf5qQ@;AggNCK5++q3c;c=Z5F@^4*f;MHk1O-y`{pJ?`bh&t0iF=)_I! z+5EKo`=!l4FG(E5P3>7fbLK;>MeZ(s7X9a}pZf6rfM3L$>Q>P8T0dhi?%PD-C@%E& zT0ifNte;4{r z`ac*SKhHh-i#+!jzc}{%tN7#oVcy(7;);bXj?KT~_ZlVNs;>clNZruII{#F<>!;h1 zlQ}aMY7#8;?EJeA!qptooI zaqr^q3}O$%_3hBbI=|i>xi5(W@u7=#e%1(I^+P?-#X3LF4c5B2FB6G{E_!=r{!yP9 z&qw{lm6Om#*E9ae!yPelfBQHzF6iyGe$Ec#7m1gA1zpejIpdsp>Mk;GbkX&!pMA=i z$1f5GU35L`=Z@u_pYe;#16_1I>t~$wBfrQv&_&m4{p97nT_ld;!n*wIvzgtfl~}zy zQhPRk@tkQ#y|_E5o1Qx_+0KnW_8HGD)=K0q;%^ag?DKg^nk(YN~d6MMON7<)Rk zXUETXMDcfz7(QxGoYY?Re>i%7g>PbCG}FBmEcA@O9KZe!q-L9g7=N(d&%WcH;QWdB z&_&m?`Pt*lll>#&Ll<4o`u|`3xaXp7Yke{DvhT>B+Kc=he?{@{FTMUte1F;LHvIqi z*IsG;@Z)_i8{bp@TR+}K{ojA~V?S?P(C^Xxx_G=Ry>VczmDaa=`K)|{kb3@2q6JZVjv%eAYvkrEGkPxVCftkxk8jK zbGnp~PU8-jE?v4pDP6jBNtx0Og8TQ(UfF$Kn6dQa|Kysz=AL`!-r3oG-?trYhuY!x z?1?L#?&vPaLlQ*1vCEZ|%2dR$lt^PHthfA351t z{Ac(5|MZ}Nw|pY+?>PT%^!v-SV#bZb9*(AsaVto+3*tS}kMCi9-^PD_o4?~OEOEnkTK9*gPyMf4Xzjml zw-)Lr{bK1;|Ct;8{Dt~id^?st^gB;{@(;zQhckc9oB0hg^23#U^ssUn`rp0P+M6G=_TJr<7wdYUht)pxi(~vh zuIn#!?lP{Wedw2`+|^pBpPZMaedzyLdHLiYicb$qANuuw{CbZce(_R|AC^A!i^C^= z$VU%ne({$aKc#*$uBCk#-}!Zn_#r<%EPd!V&wS=Te7L^T!_v3@^V|Bh#=do_{Kr;=;6%Ih%*|yxHp~ zEPYx(;;NreT=f&q;(z0#?)&DMm3;JY=2s`;s-KXL9?tyggirm1eDrYUS0{YxC*-4t zGrv0FQ$HaeJ)HT~37`52`RL)yuYP`dwbxIWnhr}J&cFJxSG4|wZ`|qi6P7;os}ph6 zPbe-uoW)lseCj9UqlYuUI^k14As;=Q`PB)Z`U&~y;mog2_|#9xM-OLy$MC)R!Ajcp zGxMtxe)SXb(!-fw{k(R)*H7rVlOC2noPYK6`o&&9;e~s>e!|j+esv;=;6$-PWZMTK6*Iws}o-J6Y|l+nO~josh^OK9?tygDX#oOap~bKzC8KlAM(+|nP2|TRxI-$K3`*@houk4FVE-h z^!!8b-soZJL%%%5m47HMJ)FgtC!hR7K6*Iwdw(Za@9#qAf*zK>9sdj4_kYJeYVFCt z)wBAUmEQZ)!)hP;y(9YOC#{{hx{{9`R{PMe?mR2=hx((3r4RkyaX$WWf7cMohaQ$b z^vm<`>7IY6A9`5&&@WFu;}7LQ4`==_e9+q0Zq?6vPOWs_=wY=F;~S&*=1*K+$wvi&Ko^EaR1voe~z~PAI3LMb>n9Zp*)h;(mwR-|Kx+J zwHkkD92wWrKJ-6*yRZA-zPM7}^zgv?zn8yzgnfd0SI9>XOCQEpW6l?Us2_SbJOB2b z)=A?J-N)!*>BIP6xz?{$_2ZgF=aC+kKJ=?o^TrqIhaQ$b^t)CZr+z|l>0#+pzqnt& z(Bq?i(l5^9n`eIKFLWO1;mm*bYOj08zI3^J%p*N4eK>x{8LxX^sGsz^v=9B?ud%DO zmn+Xu-O(V~- zn`1w}HUHt~@ASD35B&Ug@BU?u>@{60p>>EJmOhNHZmpaAp?>J$Z2goUpYezCpocTR zd!%tXf1&e84@)18U!B-*n6J?Jr-!rslQ{BJf1z>2XW!me+C7~eCu4{x~rzO)bhp3yuf*YD_kN*;Px?L+_Lt*>*Q9jtfg+M|c15B=&yZ1od* zZlH&y5B+{`$=>U8H&$A==wY=F{eI?S?%%kx@~JEJ{9k%l?L)ukOgVf04xc>TpFhLW zhknluPh75AzrWIbmmXI8&~J{!HRqwY^l%p6c^BKe?$F+u9+p0gZ;f&8-Rnc^9z865 z=>PhK?lTAc$VU$k_+Q*!zb7B`eX8eF`&G1N(Zd7JAA5ctAIFB9aQ*E0y=QXWc>ff-Zs=j@!|{8*ROi;p(6vtwOCS23 zA71AybUo6;(ue*>Zuh!%uTa0JZt3BH`rXUld2*j{{zCUndRY1}zIhVU{Dtm+^sw}y zU!HvO5Bccf0snWm_1o&7x%=&zmHEBtu-dor_x$y{fxF+E^}g)PjsD*3=hs@Jhoukw ze#d9`>~>VApTH4^sw}y-+IBPRzu^ahcmxx zgm3r0Vxe)k8|cXy?_p@-Ez^tS}J=6N~PPx@Wjhw+cx>es5{d`HiXzK8XF=(o>2bh*b5-An0V=|lhSIrBl! z{p3R9r-!8v{q8gJcK-?a=wazYzw1OS*G>4Xsy}*I`q1zFv%NBZs2_S*`rLnN|9zQ$ z((jI^#(w*Q<27FAI`kY)4@)1$H^-iHoU710(8JP)e)}`AteKy({5w6I+z zPx@WjhwZx!1Y=P+WRAyZ&;owucZO`Ep*D_Tl(FCy9Ih+Dd+UIE(K*%hNg^@?~C@_F;Vc zJLBdL^+OM5=g&UL_}{AWhVI?;a5jGHgt*(kA2fILa2EgF@{0T3-IWj5cX~LBzx;jm z-rryA&%e%p`TOhdZQoxQyR}2Ca9ayY`}X|r`K|N0?}YAK^zgv?yXVh!vR%Jii}djL z^}Xw7&u@>FeP3ulK@UqGjz4v_z5acthqL(RSse2pK69_ne^~l1{_+0z_ci`6AFAm& z?(gp(DQ~U4#~wfW`~UgxDkXns|L=~ox2XNh(Z`RzF*(Xl3~RStNBw&LsM<5EF|9Q< c-irCB_uro!XaCbacHAHTH^)6(#~*3`1P#9|H~;_u literal 0 HcmV?d00001 diff --git a/technology/scn4me_subm/gds_lib/replica_cell_6t.gds b/technology/scn4me_subm/gds_lib/replica_cell_6t.gds new file mode 100644 index 0000000000000000000000000000000000000000..0a3226dcea5402be81254e1fe89f4b417c7fc9db GIT binary patch literal 5804 zcmbuDPfT1@6vhuQ3#k%ybN9R_Qs5v{O|Pp zqi^R}B#z?3;_s^e{nBrCWjk`exnJ@|J9N>$k0<(0 zcEyN8%=i>~)<3fr{TM&};l({Obg?e~%v$8VvMoj&#ZB$i{I|;bg=c9a@`|hlbrD^! z^}n%WHqtQ@mo^kP=z7L)Hg+67=8YdR4si7^yBRoui* z&TlrJ#?Jm{4h4NYg)Y|k*=LL!ueh=v`&Z15Kl-;mX!pC^=Lwx9Bou4}6qy8d3bTRLbd6J9yi>j&UdZvDn2Os%G=0JXN z!2dz@{EYfo@v`0`?_%hp>(%_{{O!knW?N<=aTFK2p7nEXcy2G;DM?;*ap3vgm%rHK zUOxQXm5PH-+|-`UPrJWg+Vsnk#8KSTp7k?lKGa&|?&5FJ|IYfU5AP57MZBqQ1zoT8 zGxp-XO(c%uLT|72^WMn%iNs63f&=f5ef8##^nirnAmqU+iG^DiPV>qdU9BRcDl z+B5!mW(;rm+3T2zBkBD`biL}oUETka-FR2yS;e~?Brm$?de+agoAuIKL(U<(=C0oW39-^oEZx>2^M;G{_V%%n|URMk2S%c+N=H#%lgIsIsg70`fB%ed##_n zSABoJwkcoG+cW;SckxelV-LfX_0YvSzuq0WFNp*3p^J5X)(BtqLp{*NIzP`1*1EVa z6N!Z`dV6O6Q6I)yeScm&3SIQ}j6d>lNA%s_J`RlwdV8&({ES~DUh);J%g-6-%u{!f zd83Q2XY$89IlJT+`OeL|u;_ZmA9oLT2KhzC!TuLr&-f$H_-52!)b|F_^^8C6c)oKm zevx@__lvG){nUwmj9>Ke7WETdul19c?+qex6c^UzXP+}~)=I42U8y~rzj)5IqTbwH z)LqZL*KFm+ANA+CNq&*Lko6Y_o}ZQb%dD{h+|rm+#?n4*d4!&wG#cONuq- HvuM~qhPr@} literal 0 HcmV?d00001 diff --git a/technology/scn4me_subm/gds_lib/sense_amp.gds b/technology/scn4me_subm/gds_lib/sense_amp.gds new file mode 100644 index 0000000000000000000000000000000000000000..7212992021da885b7223e5147e01ee08ce59e94f GIT binary patch literal 8248 zcmaKxO>9*~7=}Okb18U%RuCwlR(?W3lnNpsMr$OI1mh1uQ_+N~EmVFAk>8E6OWbwY z#7$Sqvdb=68I~-&WXX~xEAf3g=gm32Fw>-c+IP+~^Ud6I=bU>Qt>}vG*s-cBZpWJF ziFWLaH;ZX-I$!dF?s%{tJfnob@zV!>7PeW|NGC=<0lsn&i{4pZ0zVQ z*sZ4B(-+ZN*A@GtwZ1DN4)k~HXZ7{wX!-?ywUB-{^;ge;zAJxUr_XWr;2&ejH`U(s z-)Z`5pGHjR@GY92IXxUfZYt0E-A^LUJc`(Szvhq6BFIg(XZ?-$B90723_h%RVmyM} zRD07u(5#=jf4v*=`a;cXi)lWl+Os}&G7j~dU(BZZP33uCwXg4w*wNswr}Fi;srIJ- zcC-HWOvI$dd+l+}D{~R#rrNXqU_@N*OXHioZsex&tlxV#;_SG_-&*sBsR(jY?M441 z%@^N1t+DY<Z=0=&M{aib zBhA-u-KmI6qZ)sy=H*8b{C?`~Ha4s@Xg@uZ>Q*sXRM=dnS3jhwvdDxmogGeUQ9OU)RJVH%mTsemk7% zH@{m<^_$9z_2W^uiAVir$)`>{>NoMo&63Z)arAE5@66+UdOek!%Cq&e?{c1PAFFwF zJnhG(+Ot0E_xaYee&(tBY5h#)S-(A#eAW*i;*pyrpLN1x{Y*S^v*c6%XCtY8^Q2sI zQ+cs|JnA;_sNXF4)QLy^CLXz2@~QKaQ>lJ)bSc$uDlgWLNBt%q^_wN1I`OFA#3MIL ze(&9gp+42GZ}Y9Wbp0@uXX}4uF?sBR_z;iWEcpY^lE;3B5An#&lFxMukN1&@M{bsU z=FhzY^EbJdAvcv5=a0v{O+4mrmVD-k$GlBEa+*Dqi zKOXZp@tD6^@|hdd){mhg14)ZtJyU9)ES)Y00F@F<}+${Ob z6OZ|uc;sfuXMT9h*~B9^OFr}LpGxyL8JpZxUYtK3^EdIBzghA*29NohWXz|XR&rDAS)b2YXZlk8CgYQv%CkQ2nJ+ay^Ec^-+*F?R**D(T8dJY{ME#MQ%8UM? zhg!ek2$O!?FH~Oi_iMfS<|0h`sk~(>&-$zr9`iR@2XeFIGtSpbZcHtt&tK-H(R4jA zl{d#<;d71U{mOVI?|X7ndDdsYopuBYo9_nutu;GKIZH zDc*l3{g9i=vp#k5+?4uFo|}@J9nVi+s2`7g)T9pA1xr5Td^o4^`)ksV>#Ev|^&cBe z_q!(jxnHO}>+|~izQa7C`h8wh?OC6Bv+r}iZBhrh*|GnxSij}_gpqXpWxrlKT;DhN z{y}+m{GNrE+<&Maa{8;(f8y*y=|$>8BcZnQG7a+&^)zjc?K)xv4zsbB(~`{52V$+${Ni{?Gk3KHM{- zu}5l_e9k+@;l9yi{mD(`+4|Wx7#H89A9AxaKI_EZ$@|2lAFpfG-W>mMef>=9zGo(_ zm&yMPc|Ao5@i}iyJg-aDp7nWs_~P|5*)z#a5L7XDJ@e{Ih2%^mMJN%#P9d^eslLdX4hBngKzJ*=bYWWXYUY$=tV!)j`iY6EXG_k z@nP&t{=TGtZ^bB@-eB+XgIo9S?A?nK{rNAx`g!M@KYxFD?d!wsr@wvoZLG~#yo1g= zH;fo8_2QElEcYVf{HXux)xVD-HZ~*P|D)rzVbV>F&#gq*zcuUETob>!vFUjerRV+& zoj+pXMZ~4gBbG-UclMKRYP{$__DjUuKSjKoarJowx~cKpe?E`Tb07be{3iLJo6?JZ z@?W~1@;Au`-ISjD&*kwKZ%15KzRkGf)uRY>Q{zQ{e?4MrSG7jR?Slw(Q{z?t$u+%P3c8Hc`j@H$lqM~C*^NS&;1wk`j2l$T+v#;aoF*yVxyZHFZ%mO5hwqSnBVXC z&Lib7-PCx|PaOQjH}RpHHUDTg`KT2?#D{Ly{HG3*kF~}R@u8bFKXsmamg+Yz+(`AC z(yR63qka<~^_w+6b>gFL6Cb)+^HV22>NfGAn>9aqzWFreZ?0TS`J2-7`ajLjAMYsd z`Fl4z@;;)QGyP}Ezc5t)7)1F!|fxPu^hpqtW*@yU}|^d6IW&`s$@ zKb}Uh$lv7NKsTjV{foELc{Q2G^FrxGKQRVhrt@dAZs?};qMx2Ir+PWRCi9@1(yM-Y zJ@<#nJf0Uy&;8r^`?H|EI&+x%z4_7gbpM&si+=X$gZ;FB=K3)0pDDfQKXD_yJLH-7 za&&rHJ6`nDXXv5yACtQT-ISjDFX#2Y^(@_6#Ni%;+*|18%>6axZ^mi;`2J!2AnS&1 z&aB^*pLpy&^_y!)DGyV6F@Me{?;Pjfq;H~|(sTc%yndbSNuR_|zl8p7F=xJCru;qS z&i4yv)#SSc-IQL9kFOagKO_(51#5oQHi^rAF%R56NNZu%{H!~^+3zoO{Ox!#f9j;q z@y?md=XGhvi+=Zc`X7BC{?GmK+WNcin&jcUp!8yV-V=P(Z<0T{S@SbL?;iD=%+to5 zPGU;3B=1l*Z@^i=dy)$|L&`s%i{;&Cc&P>iNep7nYPpz!I$vpT? z=|w;1#`|VcJG$xpYqX^L{{!`pQ$5YujQaXhKkd(8b#U)tic)$?yKtPRZhe2}@zj%A zk8ZxnofnbT_u9PM8K<7(-W%=m-2I1lE6>pfKD)_tPwv*9<2&T+m^vP`bu4Js Gx%dyH8V#voQ}6e-`uqtep7m{|M9{6XIH{+e%$0YrC0sCR>N-|Tlcu! zk3RpC-TbB8vsB9B%~BpX-sO8Up_^*&&EMz0cXuhjQjDFNNAq`AOF=iKr~Zu^`{lLp zo5VpkrKkQ@TmJFJZz^6#H^*~7<3D#h#&7;?I>v8GPxI5ym#>wwb*#%*jz|AZwWt1} zxl#@)-wyTNJgmQ?o6@WP7c>W~pGh3Yh0;@hxmC)O@=o;d>7`Q8O|@73PuwZx{>4&E z;yEsqUiDKu8#l!o!iUsne5Tra{d;=rw^Kjk&3c<_G5^$4(_Zzn&a9tFJvlCvp8Bbu zd0o%^o2PF?{g~2IKk=y(@|(m#H>Ickp}A6C(wtF0CiRGJN>BZ+y9rG>bpsDAM?7<& z{`%(Mb%&4oa~yQyHSKAB)_HO&>d$=arh-W~rC0sbiR%Uu$8noF>h*u2w|<6o?OR7m z*}mN6U#^#eZmK=?e@1E8*}Nvqu@anMb*r~cvfQoeOH?my=D z#*|;WDZT2aPPu=XU(?_5n*;UVUq8BTR{0)W=#n`2O|_@_*{6HgN*SN&a({{aYpT8K z-=qF+yQ3GHhQxDRD81@`_(tS6AKe{(Q+m};-#1)}7?3#RHPznhpYGd#ny015!f*ch zpD}-?^wiIL20r$ii4WbZ`NvL&kNLw7@u8bFKkNMVf#|>a&cCDoru1t6@zH-1AN@CL ze)@@zew+Bv&6vf-En7^GZ1>KaM_J7;E;k#dRhaciYH*0?K{9+;Uo80%% zP3hJA_{eMGBfnYmvwlB066Cw#1*i4WbZ`NvL&kM+Y3@u8bFKY32b zLw@rIi;>@yp7wu4Yxd%Z4n|rt^PuJq-ISjC@4X$qR=Z1l=w{8oZ9070m%GG=Zr1!f zXZHRw`fE1qFY&fufJCO&kt=D+V+_~EP z&Ch$|>}s5y%ojCwbW?iTf9mIRe~a;&k319gV@gl`>=S&9*Tjcz*8J=fe2mw`hi=yV z>=S&vf0_8u%>n=3-uDmA3x8b-zxlyboF`1_z2m>jukRye)7AKX0*T|eQ0=LI%aKxk zKdi5@k;WvqcZc0!6+-LaCG;yoTw!G-(!1t@W)_;C2*5Bki0_$!{ zPxJHrfO9`}V-lzHU7?}$)K8soJ@sRf7u~Go=Q{GT&L(jjw`ouF)6Xxe@65MJ9FMDM zPyHKLO8JWV!2QDHy9K%_J@xb5Tk76`Q~i+P2!-N(yRW%Ymv_+ zj^jeBat@9WCN{F#T>qW`A!)XzG7`DW}F zlXdjEHtngO`grbAyg!)Kk?X2yPyOs0eC$_~exRGuQ$KaWb&TI+9?(tcRsR9y=6P!p z$8n+b)XzFGUi>C;&`s&7pR+gP=Kf`JKSMWb<7b|pT@SxW9M5ahp5~|hnYoyMlQ@ps zw5R^j*;4ka@2sCm9CTB9)z7_)Ix~smxKMiPZ?#L=eJ$3@ zZr1$d*)Ib3;`8oCotpH+{c74%KRG9-qW>m-bW?ij z=e?h`fQX4a-*BlQ$Obyp7YF?`R0u{znIcfKjS=l zE5>hrV=l&TO0W9AG#`HRfW}W;Q+n#>xjQpk%82@GKED#rV^ezSXMgbRless!7j^bc zL+Po%)sEVueyG7t9qo?#VNW;hz5e~Z>xbw4Te1Jmt8)>{l%D!I=e@fS_e=Br66Zft zdg^DMFCCBhH~HNN-ISjCc|YR23-xRA-38qo`2Ny2e&+h1{M4(-cV~1{dYYf-7WX^O zPbT+GbaUYT*_WT|_-=sT-XS7_$D-F{E#|8H*0?KoLvc@NgVg9X;1sVc|Oi5t#+6E?uTyb z9FzKqPu(znlYTULJCvUK$#Y^lt~WV1p_|fE|L}U8|F~CiZiD{a&>T4b_02!^%kPfd z?@juFZVvqZ*yrc@MP8o0CVA1#T7LS^zgxm@6363e+Nsy)U;FZtm**t)ZgOrzH>IcJXPp=~>t_-N-Tbui z<0HR`kN%rAKlcaDeVo@!&X4Hk!1=Fl{QS?K5bBny=GhI?Q=w>ZH%q|ZsJ2XrKf)8?V{@U|9F4s>wl~Lzn_2TJpY>ZG(X=f4o=7Y%jCX^ zZc0!6%scy(ahTqBru3@cbz@RDu4_0@KYin8o%xUJOx6zFl-|kT(rc>z{jdBxhorT} zhT}T@8?j9jqbJXt>%UI-$?kQ0htxA=bYk?>xjY(g9Uskd)enE1U&UFgx$1m=6;BX- zK~m3NJ9o0bXMH1JmmFID^y`SHw?oCdaIzMU6WsSZ@#@#{guOi8pLe7BIa2-$KkaI# literal 0 HcmV?d00001 diff --git a/technology/scn4me_subm/mag_lib/.magicrc b/technology/scn4me_subm/mag_lib/.magicrc new file mode 100644 index 00000000..2778c5e7 --- /dev/null +++ b/technology/scn4me_subm/mag_lib/.magicrc @@ -0,0 +1,5 @@ +path sys +$::env(OPENRAM_TECH)/scn4me_subm/tech +tech load SCN4ME_SUBM.20 -noprompt +scalegrid 1 4 +set GND gnd +set VDD vdd diff --git a/technology/scn4me_subm/mag_lib/cell_6t.mag b/technology/scn4me_subm/mag_lib/cell_6t.mag new file mode 100644 index 00000000..f2e9906a --- /dev/null +++ b/technology/scn4me_subm/mag_lib/cell_6t.mag @@ -0,0 +1,117 @@ +magic +tech scmos +timestamp 1536091415 +<< nwell >> +rect -8 29 42 51 +<< pwell >> +rect -8 -8 42 29 +<< ntransistor >> +rect 7 10 9 18 +rect 29 10 31 18 +rect 10 3 14 5 +rect 24 3 28 5 +<< ptransistor >> +rect 7 37 11 40 +rect 27 37 31 40 +<< ndiffusion >> +rect -2 16 7 18 +rect 2 12 7 16 +rect -2 10 7 12 +rect 9 14 10 18 +rect 9 10 14 14 +rect 28 14 29 18 +rect 24 10 29 14 +rect 31 16 36 18 +rect 31 12 32 16 +rect 31 10 36 12 +rect 10 5 14 10 +rect 24 5 28 10 +rect 10 2 14 3 +rect 24 2 28 3 +<< pdiffusion >> +rect 2 37 7 40 +rect 11 37 12 40 +rect 26 37 27 40 +rect 31 37 32 40 +<< ndcontact >> +rect -2 12 2 16 +rect 10 14 14 18 +rect 24 14 28 18 +rect 32 12 36 16 +rect 10 -2 14 2 +rect 24 -2 28 2 +<< pdcontact >> +rect -2 36 2 40 +rect 12 36 16 40 +rect 22 36 26 40 +rect 32 36 36 40 +<< psubstratepcontact >> +rect -2 22 2 26 +rect 32 22 36 26 +<< nsubstratencontact >> +rect 32 44 36 48 +<< polysilicon >> +rect 7 40 11 42 +rect 27 40 31 42 +rect 7 35 11 37 +rect 7 21 9 35 +rect 27 34 31 37 +rect 15 33 31 34 +rect 19 32 31 33 +rect 7 20 21 21 +rect 7 19 24 20 +rect 7 18 9 19 +rect 29 18 31 32 +rect 7 8 9 10 +rect 17 5 21 6 +rect 29 8 31 10 +rect -2 3 10 5 +rect 14 3 24 5 +rect 28 3 36 5 +<< polycontact >> +rect 15 29 19 33 +rect 21 20 25 24 +rect 17 6 21 10 +<< metal1 >> +rect -2 44 15 48 +rect 19 44 32 48 +rect -2 40 2 44 +rect 32 40 36 44 +rect 11 36 12 40 +rect 26 36 27 40 +rect -2 26 2 29 +rect -2 16 2 22 +rect 11 18 15 36 +rect 23 24 27 36 +rect 25 20 27 24 +rect 14 14 15 18 +rect 23 18 27 20 +rect 32 26 36 29 +rect 23 14 24 18 +rect 32 16 36 22 +rect -2 6 17 9 +rect 21 6 36 9 +rect -2 5 36 6 +<< m2contact >> +rect 15 44 19 48 +rect -2 29 2 33 +rect 32 29 36 33 +rect 6 -2 10 2 +rect 20 -2 24 2 +<< metal2 >> +rect -2 33 2 48 +rect -2 -2 2 29 +rect 6 2 10 48 +rect 24 -2 28 48 +rect 32 33 36 48 +rect 32 -2 36 29 +<< bb >> +rect 0 0 34 46 +<< labels >> +rlabel metal2 0 0 0 0 1 gnd +rlabel metal2 34 0 34 0 1 gnd +rlabel m2contact 17 46 17 46 5 vdd +rlabel metal2 8 43 8 43 1 bl +rlabel metal2 26 43 26 43 1 br +rlabel metal1 4 7 4 7 1 wl +<< end >> diff --git a/technology/scn4me_subm/mag_lib/dff.mag b/technology/scn4me_subm/mag_lib/dff.mag new file mode 100644 index 00000000..46d22c84 --- /dev/null +++ b/technology/scn4me_subm/mag_lib/dff.mag @@ -0,0 +1,279 @@ +magic +tech scmos +timestamp 1536089597 +<< nwell >> +rect 0 48 109 103 +<< pwell >> +rect 0 -3 109 48 +<< ntransistor >> +rect 11 6 13 26 +rect 19 6 21 16 +rect 24 6 26 16 +rect 33 6 35 16 +rect 38 6 40 16 +rect 47 6 49 16 +rect 63 6 65 16 +rect 68 6 70 16 +rect 78 6 80 16 +rect 83 6 85 16 +rect 91 6 93 26 +<< ptransistor >> +rect 11 54 13 94 +rect 19 74 21 94 +rect 25 74 27 94 +rect 33 74 35 94 +rect 39 74 41 94 +rect 47 74 49 94 +rect 63 74 65 94 +rect 68 74 70 94 +rect 78 84 80 94 +rect 83 84 85 94 +rect 91 54 93 94 +<< ndiffusion >> +rect 6 25 11 26 +rect 10 6 11 25 +rect 13 25 18 26 +rect 13 6 14 25 +rect 86 25 91 26 +rect 18 6 19 16 +rect 21 6 24 16 +rect 26 15 33 16 +rect 26 6 28 15 +rect 32 6 33 15 +rect 35 6 38 16 +rect 40 15 47 16 +rect 40 6 41 15 +rect 45 6 47 15 +rect 49 15 54 16 +rect 49 6 50 15 +rect 58 15 63 16 +rect 62 6 63 15 +rect 65 6 68 16 +rect 70 15 78 16 +rect 70 6 72 15 +rect 76 6 78 15 +rect 80 6 83 16 +rect 85 6 86 16 +rect 90 6 91 25 +rect 93 25 98 26 +rect 93 6 94 25 +<< pdiffusion >> +rect 6 93 11 94 +rect 10 54 11 93 +rect 13 55 14 94 +rect 18 74 19 94 +rect 21 74 25 94 +rect 27 93 33 94 +rect 27 74 28 93 +rect 32 74 33 93 +rect 35 74 39 94 +rect 41 93 47 94 +rect 41 74 42 93 +rect 46 74 47 93 +rect 49 93 54 94 +rect 49 74 50 93 +rect 58 93 63 94 +rect 62 74 63 93 +rect 65 74 68 94 +rect 70 93 78 94 +rect 70 74 72 93 +rect 76 84 78 93 +rect 80 84 83 94 +rect 85 93 91 94 +rect 85 84 86 93 +rect 76 74 77 84 +rect 13 54 18 55 +rect 90 54 91 93 +rect 93 93 98 94 +rect 93 54 94 93 +<< ndcontact >> +rect 6 6 10 25 +rect 14 6 18 25 +rect 28 6 32 15 +rect 41 6 45 15 +rect 50 6 54 15 +rect 58 6 62 15 +rect 72 6 76 15 +rect 86 6 90 25 +rect 94 6 98 25 +<< pdcontact >> +rect 6 54 10 93 +rect 14 55 18 94 +rect 28 74 32 93 +rect 42 74 46 93 +rect 50 74 54 93 +rect 58 74 62 93 +rect 72 74 76 93 +rect 86 54 90 93 +rect 94 54 98 93 +<< psubstratepcontact >> +rect 102 6 106 10 +<< nsubstratencontact >> +rect 102 89 106 93 +<< polysilicon >> +rect 11 94 13 96 +rect 19 94 21 96 +rect 25 94 27 96 +rect 33 94 35 96 +rect 39 94 41 96 +rect 47 94 49 96 +rect 63 94 65 96 +rect 68 94 70 96 +rect 78 94 80 96 +rect 83 94 85 96 +rect 91 94 93 96 +rect 11 37 13 54 +rect 19 46 21 74 +rect 11 26 13 33 +rect 19 16 21 42 +rect 25 38 27 74 +rect 33 54 35 74 +rect 33 29 35 50 +rect 24 27 35 29 +rect 39 71 41 74 +rect 24 16 26 27 +rect 39 23 41 67 +rect 47 61 49 74 +rect 63 73 65 74 +rect 54 71 65 73 +rect 34 19 35 23 +rect 33 16 35 19 +rect 38 19 39 23 +rect 38 16 40 19 +rect 47 16 49 57 +rect 53 19 55 67 +rect 68 63 70 74 +rect 78 67 80 84 +rect 76 65 80 67 +rect 63 61 70 63 +rect 61 24 63 33 +rect 68 31 70 61 +rect 83 53 85 84 +rect 79 51 85 53 +rect 78 31 80 47 +rect 91 45 93 54 +rect 89 41 93 45 +rect 68 29 75 31 +rect 61 22 70 24 +rect 53 17 65 19 +rect 63 16 65 17 +rect 68 16 70 22 +rect 73 19 75 29 +rect 78 27 79 31 +rect 73 17 80 19 +rect 78 16 80 17 +rect 83 16 85 31 +rect 91 26 93 41 +rect 11 4 13 6 +rect 19 4 21 6 +rect 24 4 26 6 +rect 33 4 35 6 +rect 38 4 40 6 +rect 47 4 49 6 +rect 63 4 65 6 +rect 68 4 70 6 +rect 78 4 80 6 +rect 83 4 85 6 +rect 91 4 93 6 +<< polycontact >> +rect 17 42 21 46 +rect 10 33 14 37 +rect 31 50 35 54 +rect 25 34 29 38 +rect 39 67 43 71 +rect 45 57 49 61 +rect 30 19 34 23 +rect 39 19 43 23 +rect 53 67 57 71 +rect 59 59 63 63 +rect 74 61 78 65 +rect 59 33 63 37 +rect 77 47 81 51 +rect 85 41 89 45 +rect 79 27 83 31 +<< metal1 >> +rect 0 97 109 103 +rect 14 94 18 97 +rect 6 93 10 94 +rect 28 93 32 94 +rect 22 74 28 77 +rect 42 93 46 97 +rect 50 93 54 94 +rect 58 93 62 97 +rect 71 93 77 94 +rect 71 74 72 93 +rect 76 74 77 93 +rect 86 93 90 97 +rect 50 71 53 74 +rect 43 68 53 71 +rect 26 57 45 60 +rect 52 60 59 63 +rect 52 54 55 60 +rect 71 56 74 65 +rect 10 50 31 52 +rect 35 51 55 54 +rect 62 53 74 56 +rect 94 93 98 94 +rect 102 93 106 97 +rect 6 49 34 50 +rect 21 43 38 46 +rect 18 34 25 37 +rect 62 37 65 53 +rect 94 51 98 54 +rect 81 48 94 51 +rect 74 41 85 44 +rect 29 34 59 37 +rect 6 25 10 26 +rect 14 25 18 26 +rect 31 23 34 34 +rect 63 34 65 37 +rect 94 31 98 47 +rect 83 28 98 31 +rect 94 25 98 28 +rect 43 19 53 22 +rect 50 16 53 19 +rect 22 15 32 16 +rect 22 13 28 15 +rect 41 15 46 16 +rect 45 6 46 15 +rect 50 15 54 16 +rect 58 15 62 16 +rect 70 15 77 16 +rect 70 13 72 15 +rect 71 6 72 13 +rect 76 6 77 15 +rect 14 3 18 6 +rect 41 3 46 6 +rect 58 3 62 6 +rect 86 3 90 6 +rect 102 3 106 6 +rect 0 -3 109 3 +<< m2contact >> +rect 22 70 26 74 +rect 70 70 74 74 +rect 22 57 26 61 +rect 6 50 10 54 +rect 38 43 42 47 +rect 14 33 18 37 +rect 94 47 98 51 +rect 70 40 74 44 +rect 6 26 10 30 +rect 22 16 26 20 +rect 70 16 74 20 +<< metal2 >> +rect 22 61 26 70 +rect 6 30 10 50 +rect 22 20 26 57 +rect 70 44 74 70 +rect 70 20 74 40 +<< bb >> +rect 0 0 109 100 +<< labels >> +rlabel m2contact 15 34 15 34 4 clk +rlabel m2contact 40 45 40 45 4 D +rlabel m2contact 96 49 96 49 4 Q +rlabel metal1 32 98 32 98 4 vdd +rlabel metal1 44 1 44 1 4 gnd +<< properties >> +string path 0.000 0.000 900.000 0.000 900.000 900.000 0.000 900.000 0.000 0.000 +<< end >> diff --git a/technology/scn4me_subm/mag_lib/replica_cell_6t.mag b/technology/scn4me_subm/mag_lib/replica_cell_6t.mag new file mode 100644 index 00000000..d0dc472f --- /dev/null +++ b/technology/scn4me_subm/mag_lib/replica_cell_6t.mag @@ -0,0 +1,118 @@ +magic +tech scmos +timestamp 1536091380 +<< nwell >> +rect -8 29 42 51 +<< pwell >> +rect -8 -8 42 29 +<< ntransistor >> +rect 7 10 9 18 +rect 29 10 31 18 +rect 10 3 14 5 +rect 24 3 28 5 +<< ptransistor >> +rect 7 37 11 40 +rect 27 37 31 40 +<< ndiffusion >> +rect -2 16 7 18 +rect 2 12 7 16 +rect -2 10 7 12 +rect 9 14 10 18 +rect 9 10 14 14 +rect 28 14 29 18 +rect 24 10 29 14 +rect 31 16 36 18 +rect 31 12 32 16 +rect 31 10 36 12 +rect 10 5 14 10 +rect 24 5 28 10 +rect 10 2 14 3 +rect 24 2 28 3 +<< pdiffusion >> +rect 2 37 7 40 +rect 11 37 12 40 +rect 26 37 27 40 +rect 31 37 32 40 +<< ndcontact >> +rect -2 12 2 16 +rect 10 14 14 18 +rect 24 14 28 18 +rect 32 12 36 16 +rect 10 -2 14 2 +rect 24 -2 28 2 +<< pdcontact >> +rect -2 36 2 40 +rect 12 36 16 40 +rect 22 36 26 40 +rect 32 36 36 40 +<< psubstratepcontact >> +rect -2 22 2 26 +rect 32 22 36 26 +<< nsubstratencontact >> +rect 32 44 36 48 +<< polysilicon >> +rect 7 40 11 42 +rect 27 40 31 42 +rect 7 35 11 37 +rect 7 21 9 35 +rect 27 34 31 37 +rect 15 33 31 34 +rect 19 32 31 33 +rect 7 20 21 21 +rect 7 19 24 20 +rect 7 18 9 19 +rect 29 18 31 32 +rect 7 8 9 10 +rect 17 5 21 6 +rect 29 8 31 10 +rect -2 3 10 5 +rect 14 3 24 5 +rect 28 3 36 5 +<< polycontact >> +rect 15 29 19 33 +rect 21 20 25 24 +rect 17 6 21 10 +<< metal1 >> +rect -2 44 15 48 +rect 19 44 32 48 +rect -2 40 2 44 +rect 32 40 36 44 +rect 11 36 12 40 +rect 26 36 27 40 +rect -2 26 2 29 +rect 11 22 15 36 +rect 23 24 27 36 +rect -2 18 15 22 +rect 25 20 27 24 +rect -2 16 2 18 +rect 14 14 15 18 +rect 23 18 27 20 +rect 32 26 36 29 +rect 23 14 24 18 +rect 32 16 36 22 +rect -2 6 17 9 +rect 21 6 36 9 +rect -2 5 36 6 +<< m2contact >> +rect 15 44 19 48 +rect -2 29 2 33 +rect 32 29 36 33 +rect 6 -2 10 2 +rect 20 -2 24 2 +<< metal2 >> +rect -2 33 2 48 +rect -2 -2 2 29 +rect 6 2 10 48 +rect 24 -2 28 48 +rect 32 33 36 48 +rect 32 -2 36 29 +<< bb >> +rect 0 0 34 46 +<< labels >> +rlabel metal2 0 0 0 0 1 gnd +rlabel metal2 34 0 34 0 1 gnd +rlabel m2contact 17 46 17 46 5 vdd +rlabel metal2 8 43 8 43 1 bl +rlabel metal2 26 43 26 43 1 br +rlabel metal1 4 7 4 7 1 wl +<< end >> diff --git a/technology/scn4me_subm/mag_lib/sense_amp.mag b/technology/scn4me_subm/mag_lib/sense_amp.mag new file mode 100644 index 00000000..e5fa4373 --- /dev/null +++ b/technology/scn4me_subm/mag_lib/sense_amp.mag @@ -0,0 +1,136 @@ +magic +tech scmos +timestamp 1536089670 +<< nwell >> +rect 0 0 40 102 +<< pwell >> +rect 0 102 40 163 +<< ntransistor >> +rect 21 130 23 139 +rect 12 108 14 117 +rect 20 108 22 117 +<< ptransistor >> +rect 12 78 14 96 +rect 20 78 22 96 +rect 11 20 13 44 +rect 27 20 29 44 +<< ndiffusion >> +rect 20 130 21 139 +rect 23 130 24 139 +rect 11 108 12 117 +rect 14 108 15 117 +rect 19 108 20 117 +rect 22 108 23 117 +<< pdiffusion >> +rect 7 94 12 96 +rect 11 80 12 94 +rect 7 78 12 80 +rect 14 94 20 96 +rect 14 80 15 94 +rect 19 80 20 94 +rect 14 78 20 80 +rect 22 94 27 96 +rect 22 80 23 94 +rect 22 78 27 80 +rect 10 20 11 44 +rect 13 20 14 44 +rect 26 20 27 44 +rect 29 20 30 44 +<< ndcontact >> +rect 16 130 20 139 +rect 24 130 28 139 +rect 7 108 11 117 +rect 15 108 19 117 +rect 23 108 27 117 +<< pdcontact >> +rect 7 80 11 94 +rect 15 80 19 94 +rect 23 80 27 94 +rect 6 20 10 44 +rect 14 20 18 44 +rect 22 20 26 44 +rect 30 20 34 44 +<< psubstratepcontact >> +rect 32 137 36 141 +<< nsubstratencontact >> +rect 27 70 31 74 +<< polysilicon >> +rect 21 139 23 149 +rect 21 129 23 130 +rect 3 127 23 129 +rect 3 47 5 127 +rect 12 122 34 124 +rect 12 117 14 122 +rect 20 117 22 119 +rect 12 96 14 108 +rect 20 96 22 108 +rect 32 105 34 122 +rect 30 101 34 105 +rect 12 76 14 78 +rect 20 69 22 78 +rect 13 67 22 69 +rect 9 55 11 65 +rect 32 55 34 101 +rect 33 51 34 55 +rect 3 45 13 47 +rect 11 44 13 45 +rect 27 44 29 46 +rect 11 19 13 20 +rect 27 19 29 20 +rect 11 17 29 19 +<< polycontact >> +rect 20 149 24 153 +rect 26 101 30 105 +rect 9 65 13 69 +rect 9 51 13 55 +rect 29 51 33 55 +<< metal1 >> +rect -2 149 20 153 +rect 24 149 36 153 +rect 28 133 32 137 +rect 16 117 19 130 +rect 7 94 11 108 +rect 23 105 27 108 +rect 23 101 26 105 +rect 7 69 11 80 +rect 15 94 19 96 +rect 15 78 19 80 +rect 23 94 27 101 +rect 23 78 27 80 +rect 15 75 18 78 +rect 15 74 31 75 +rect 15 72 27 74 +rect 7 65 9 69 +rect 6 44 9 54 +rect 33 51 34 55 +rect 31 44 34 51 +rect 3 20 6 23 +rect 3 15 7 20 +<< m2contact >> +rect 32 133 36 137 +rect 27 66 31 70 +rect 13 44 17 48 +rect 22 44 26 48 +rect 3 11 7 15 +<< metal2 >> +rect 10 48 14 163 +rect 20 48 24 163 +rect 32 129 36 133 +rect 27 62 31 66 +rect 10 44 13 48 +rect 20 44 22 48 +rect 3 0 7 11 +rect 10 0 14 44 +rect 20 0 24 44 +<< bb >> +rect 0 0 34 163 +<< labels >> +flabel metal1 0 149 0 149 4 FreeSans 26 0 0 0 en +rlabel metal2 34 131 34 131 1 gnd +rlabel metal2 29 64 29 64 1 vdd +rlabel metal2 12 161 12 161 5 bl +rlabel metal2 22 161 22 161 5 br +rlabel metal2 5 3 5 3 1 dout +<< properties >> +string path 270.000 468.000 270.000 486.000 288.000 486.000 288.000 468.000 270.000 468.000 +<< end >> diff --git a/technology/scn4me_subm/mag_lib/tri_gate.mag b/technology/scn4me_subm/mag_lib/tri_gate.mag new file mode 100644 index 00000000..bda635c7 --- /dev/null +++ b/technology/scn4me_subm/mag_lib/tri_gate.mag @@ -0,0 +1,98 @@ +magic +tech scmos +timestamp 1536089695 +<< nwell >> +rect -2 45 38 73 +<< pwell >> +rect -2 0 38 45 +<< ntransistor >> +rect 9 27 11 31 +rect 17 27 19 31 +rect 25 27 27 31 +<< ptransistor >> +rect 9 53 11 61 +rect 17 53 19 61 +rect 25 53 27 61 +<< ndiffusion >> +rect 8 27 9 31 +rect 11 27 12 31 +rect 16 27 17 31 +rect 19 27 20 31 +rect 24 27 25 31 +rect 27 27 28 31 +<< pdiffusion >> +rect 8 53 9 61 +rect 11 53 12 61 +rect 16 53 17 61 +rect 19 53 20 61 +rect 24 53 25 61 +rect 27 53 28 61 +<< ndcontact >> +rect 4 27 8 31 +rect 12 27 16 31 +rect 20 27 24 31 +rect 28 27 32 31 +<< pdcontact >> +rect 4 53 8 61 +rect 12 53 16 61 +rect 20 53 24 61 +rect 28 53 32 61 +<< psubstratepcontact >> +rect 12 19 16 23 +<< nsubstratencontact >> +rect 12 65 16 69 +<< polysilicon >> +rect 25 63 35 65 +rect 9 61 11 63 +rect 17 61 19 63 +rect 25 61 27 63 +rect 9 50 11 53 +rect 9 31 11 46 +rect 17 42 19 53 +rect 25 51 27 53 +rect 17 31 19 38 +rect 25 31 27 33 +rect 9 25 11 27 +rect 17 25 19 27 +rect 25 16 27 27 +rect 33 8 35 63 +rect 32 6 35 8 +<< polycontact >> +rect 9 46 13 50 +rect 16 38 20 42 +rect 25 12 29 16 +rect 28 4 32 8 +<< metal1 >> +rect 16 65 23 69 +rect 12 61 16 65 +rect 3 53 4 61 +rect 3 42 6 53 +rect 13 46 15 50 +rect 3 38 16 42 +rect 3 31 6 38 +rect 29 31 32 53 +rect 3 27 4 31 +rect 12 23 16 27 +rect 16 19 24 23 +rect 0 12 25 16 +rect 29 12 36 16 +rect 0 4 28 8 +rect 32 4 36 8 +<< m2contact >> +rect 23 65 27 69 +rect 15 46 19 50 +rect 25 34 29 38 +rect 24 19 28 23 +<< metal2 >> +rect 15 34 25 38 +rect 15 0 19 34 +<< bb >> +rect 0 0 34 73 +<< labels >> +rlabel metal1 0 12 0 12 3 en +rlabel metal1 0 4 0 4 2 en_bar +rlabel metal2 16 1 16 1 1 out +rlabel m2contact 26 21 26 21 1 gnd +rlabel m2contact 25 67 25 67 1 vdd +rlabel m2contact 17 48 17 48 1 in +<< end >> diff --git a/technology/scn4me_subm/mag_lib/write_driver.mag b/technology/scn4me_subm/mag_lib/write_driver.mag new file mode 100644 index 00000000..ab2014aa --- /dev/null +++ b/technology/scn4me_subm/mag_lib/write_driver.mag @@ -0,0 +1,224 @@ +magic +tech scmos +timestamp 1536089714 +<< nwell >> +rect -3 101 37 138 +rect -3 0 37 51 +<< pwell >> +rect -3 138 37 202 +rect -3 51 37 101 +<< ntransistor >> +rect 9 177 11 189 +rect 17 177 19 189 +rect 15 162 27 164 +rect 9 144 11 148 +rect 17 144 19 148 +rect 10 82 12 89 +rect 18 82 20 89 +rect 8 57 10 64 +rect 16 57 18 64 +rect 24 60 26 64 +<< ptransistor >> +rect 9 125 11 132 +rect 17 125 19 132 +rect 10 107 12 114 +rect 18 107 20 114 +rect 8 38 10 45 +rect 16 38 18 45 +rect 24 38 26 45 +<< ndiffusion >> +rect 8 177 9 189 +rect 11 177 12 189 +rect 16 177 17 189 +rect 19 177 20 189 +rect 15 164 27 165 +rect 15 161 27 162 +rect 12 157 15 160 +rect 12 156 16 157 +rect 8 144 9 148 +rect 11 144 12 148 +rect 16 144 17 148 +rect 19 144 20 148 +rect 9 82 10 89 +rect 12 82 13 89 +rect 17 82 18 89 +rect 20 82 21 89 +rect 25 82 26 86 +rect 7 57 8 64 +rect 10 57 11 64 +rect 15 57 16 64 +rect 18 57 19 64 +rect 23 60 24 64 +rect 26 60 27 64 +<< pdiffusion >> +rect 8 125 9 132 +rect 11 125 12 132 +rect 16 125 17 132 +rect 19 125 20 132 +rect 12 122 16 125 +rect 9 107 10 114 +rect 12 107 13 114 +rect 17 107 18 114 +rect 20 107 21 114 +rect 7 38 8 45 +rect 10 38 11 45 +rect 15 38 16 45 +rect 18 38 19 45 +rect 23 38 24 45 +rect 26 38 27 45 +rect 3 35 7 38 +<< ndcontact >> +rect 4 177 8 189 +rect 12 177 16 189 +rect 20 177 24 189 +rect 15 165 27 169 +rect 15 157 27 161 +rect 4 144 8 148 +rect 12 144 16 148 +rect 20 144 24 148 +rect 5 82 9 89 +rect 13 82 17 89 +rect 21 82 25 89 +rect 3 57 7 64 +rect 11 57 15 64 +rect 19 57 23 64 +rect 27 60 31 64 +<< pdcontact >> +rect 4 125 8 132 +rect 12 125 16 132 +rect 20 125 24 132 +rect 5 107 9 114 +rect 13 107 17 114 +rect 21 107 25 114 +rect 3 38 7 45 +rect 11 38 15 45 +rect 19 38 23 45 +rect 27 38 31 45 +<< psubstratepcontact >> +rect 12 152 16 156 +rect 26 82 30 86 +<< nsubstratencontact >> +rect 12 118 16 122 +rect 3 31 7 35 +<< polysilicon >> +rect 9 194 30 196 +rect 9 189 11 194 +rect 17 189 19 191 +rect 28 185 30 194 +rect 9 175 11 177 +rect 17 172 19 177 +rect 6 170 19 172 +rect 6 167 8 170 +rect 13 162 15 164 +rect 27 162 33 164 +rect 9 148 11 150 +rect 17 148 19 150 +rect 9 132 11 144 +rect 17 132 19 144 +rect 9 124 11 125 +rect 2 122 11 124 +rect 17 124 19 125 +rect 17 122 28 124 +rect 2 75 4 122 +rect 10 114 12 116 +rect 18 114 20 116 +rect 10 89 12 107 +rect 18 106 20 107 +rect 16 104 20 106 +rect 16 92 18 104 +rect 26 100 28 122 +rect 27 96 28 100 +rect 16 90 20 92 +rect 18 89 20 90 +rect 10 81 12 82 +rect 10 79 13 81 +rect 2 71 3 75 +rect 11 71 13 79 +rect 18 79 20 82 +rect 18 77 23 79 +rect 31 71 33 162 +rect 11 69 33 71 +rect 11 67 13 69 +rect 8 65 13 67 +rect 8 64 10 65 +rect 16 64 18 66 +rect 24 64 26 66 +rect 8 45 10 57 +rect 16 52 18 57 +rect 24 52 26 60 +rect 16 50 26 52 +rect 16 45 18 50 +rect 24 45 26 50 +rect 8 28 10 38 +rect 16 14 18 38 +rect 24 36 26 38 +<< polycontact >> +rect 28 181 32 185 +rect 4 163 8 167 +rect 23 96 27 100 +rect 3 71 7 75 +rect 23 75 27 79 +rect 7 24 11 28 +rect 15 10 19 14 +<< metal1 >> +rect 5 192 10 196 +rect 5 189 8 192 +rect 32 181 33 185 +rect 13 169 16 177 +rect 13 165 15 169 +rect 4 148 8 163 +rect 12 157 15 161 +rect 12 156 16 157 +rect 12 148 16 152 +rect 4 132 8 144 +rect 20 142 24 144 +rect 30 142 33 181 +rect 20 138 33 142 +rect 20 132 24 138 +rect 12 122 16 125 +rect 13 114 17 118 +rect 5 104 9 107 +rect 21 104 25 107 +rect 5 101 25 104 +rect 5 89 9 101 +rect 21 100 25 101 +rect 21 96 23 100 +rect 25 82 26 90 +rect 4 64 7 71 +rect 27 64 31 79 +rect 3 51 7 57 +rect 3 48 15 51 +rect 11 45 15 48 +rect 27 45 31 60 +rect 3 35 7 38 +rect 19 35 23 38 +rect 7 31 19 35 +rect 0 24 7 28 +rect 11 24 36 28 +<< m2contact >> +rect 10 192 14 196 +rect 20 189 24 193 +rect 23 153 27 157 +rect 16 118 20 122 +rect 26 86 30 90 +rect 19 64 23 68 +rect 19 31 23 35 +rect 15 6 19 10 +<< metal2 >> +rect 10 196 14 202 +rect 20 193 24 202 +rect 20 177 24 189 +rect 15 0 19 6 +<< bb >> +rect 0 0 34 202 +<< labels >> +rlabel metal2 15 1 15 1 1 din +rlabel metal1 2 25 2 25 3 en +rlabel metal2 12 200 12 200 5 bl +rlabel metal2 22 200 22 200 5 br +rlabel m2contact 21 66 21 66 1 gnd +rlabel m2contact 28 88 28 88 1 gnd +rlabel m2contact 21 33 21 33 1 vdd +rlabel m2contact 18 120 18 120 1 vdd +rlabel m2contact 25 155 25 155 1 gnd +<< end >> diff --git a/technology/scn4me_subm/models/ff/nmos.sp b/technology/scn4me_subm/models/ff/nmos.sp new file mode 100644 index 00000000..07ca8dba --- /dev/null +++ b/technology/scn4me_subm/models/ff/nmos.sp @@ -0,0 +1,10 @@ +********************************************* +* Transistor Models +* Note: These models are approximate +* and should be substituted with actual +* models from MOSIS or SCN4ME +********************************************* + +.MODEL n NMOS (LEVEL=49 VTHO=0.669845 ++ NSUB=6E16 U0=461 K1=0.5705 TOX=13.9n VERSION=3.3.0) + diff --git a/technology/scn4me_subm/models/ff/pmos.sp b/technology/scn4me_subm/models/ff/pmos.sp new file mode 100644 index 00000000..b4dc9026 --- /dev/null +++ b/technology/scn4me_subm/models/ff/pmos.sp @@ -0,0 +1,9 @@ +********************************************* +* Transistor Models +* Note: These models are approximate +* and should be substituted with actual +* models from MOSIS or SCN4ME +********************************************* + +.MODEL p PMOS (LEVEL=49 VTHO=-0.322431 ++ NSUB=6E16 U0=212 K1=0.0821 TOX=13.9n VERSION=3.3.0) diff --git a/technology/scn4me_subm/models/nom/nmos.sp b/technology/scn4me_subm/models/nom/nmos.sp new file mode 100644 index 00000000..ad4db2b8 --- /dev/null +++ b/technology/scn4me_subm/models/nom/nmos.sp @@ -0,0 +1,9 @@ +********************************************* +* Transistor Models +* Note: These models are approximate +* and should be substituted with actual +* models from MOSIS or SCN4ME +********************************************* + +.MODEL n NMOS (LEVEL=49 VTHO=0.669845 ++ NSUB=6E16 U0=458 K1=0.5705 TOX=13.9n VERSION=3.3.0) diff --git a/technology/scn4me_subm/models/nom/pmos.sp b/technology/scn4me_subm/models/nom/pmos.sp new file mode 100644 index 00000000..9ecb13e1 --- /dev/null +++ b/technology/scn4me_subm/models/nom/pmos.sp @@ -0,0 +1,9 @@ +********************************************* +* Transistor Models +* Note: These models are approximate +* and should be substituted with actual +* models from MOSIS or SCN4ME +********************************************* + +.MODEL p PMOS (LEVEL=49 VTHO=-0.322431 ++ NSUB=6E16 U0=212 K1=0.0821 TOX=13.9n VERSION=3.3.0) diff --git a/technology/scn4me_subm/models/ss/nmos.sp b/technology/scn4me_subm/models/ss/nmos.sp new file mode 100644 index 00000000..3d9bda57 --- /dev/null +++ b/technology/scn4me_subm/models/ss/nmos.sp @@ -0,0 +1,10 @@ +********************************************* +* Transistor Models +* Note: These models are approximate +* and should be substituted with actual +* models from MOSIS or SCN4ME +********************************************* + +.MODEL n NMOS (LEVEL=49 VTHO=0.669845 ++ NSUB=6E16 U0=460 K1=0.5705 TOX=13.9n VERSION=3.3.0) + diff --git a/technology/scn4me_subm/models/ss/pmos.sp b/technology/scn4me_subm/models/ss/pmos.sp new file mode 100644 index 00000000..b4dc9026 --- /dev/null +++ b/technology/scn4me_subm/models/ss/pmos.sp @@ -0,0 +1,9 @@ +********************************************* +* Transistor Models +* Note: These models are approximate +* and should be substituted with actual +* models from MOSIS or SCN4ME +********************************************* + +.MODEL p PMOS (LEVEL=49 VTHO=-0.322431 ++ NSUB=6E16 U0=212 K1=0.0821 TOX=13.9n VERSION=3.3.0) diff --git a/technology/scn4me_subm/sp_lib/cell_6t.sp b/technology/scn4me_subm/sp_lib/cell_6t.sp new file mode 100644 index 00000000..846cc371 --- /dev/null +++ b/technology/scn4me_subm/sp_lib/cell_6t.sp @@ -0,0 +1,13 @@ + +*********************** "cell_6t" ****************************** +.SUBCKT cell_6t bl br wl vdd gnd +* SPICE3 file created from cell_6t.ext - technology: scmos + +M1000 a_36_40# a_28_32# vdd vdd p w=0.6u l=0.8u +M1001 vdd a_36_40# a_28_32# vdd p w=0.6u l=0.8u +M1002 a_36_40# a_28_32# gnd gnd n w=1.6u l=0.4u +M1003 gnd a_36_40# a_28_32# gnd n w=1.6u l=0.4u +M1004 a_36_40# wl bl gnd n w=0.8u l=0.4u +M1005 a_28_32# wl br gnd n w=0.8u l=0.4u + +.ENDS diff --git a/technology/scn4me_subm/sp_lib/dff.sp b/technology/scn4me_subm/sp_lib/dff.sp new file mode 100644 index 00000000..d35d5123 --- /dev/null +++ b/technology/scn4me_subm/sp_lib/dff.sp @@ -0,0 +1,30 @@ +*********************** "dff" ****************************** +* Positive edge-triggered FF +.SUBCKT dff D Q clk vdd gnd + +* SPICE3 file created from dff.ext - technology: scmos + +M1000 vdd clk a_24_24# vdd p w=8u l=0.4u +M1001 a_84_296# D vdd vdd p w=4u l=0.4u +M1002 a_104_24# clk a_84_296# vdd p w=4u l=0.4u +M1003 a_140_296# a_24_24# a_104_24# vdd p w=4u l=0.4u +M1004 vdd a_152_16# a_140_296# vdd p w=4u l=0.4u +M1005 a_152_16# a_104_24# vdd vdd p w=4u l=0.4u +M1006 a_260_296# a_152_16# vdd vdd p w=4u l=0.4u +M1007 a_280_24# a_24_24# a_260_296# vdd p w=4u l=0.4u +M1008 a_320_336# clk a_280_24# vdd p w=2u l=0.4u +M1009 vdd Q a_320_336# vdd p w=2u l=0.4u +M1010 gnd clk a_24_24# gnd nfet w=4u l=0.4u +M1011 Q a_280_24# vdd vdd p w=8u l=0.4u +M1012 a_84_24# D gnd gnd n w=2u l=0.4u +M1013 a_104_24# a_24_24# a_84_24# gnd n w=2u l=0.4u +M1014 a_140_24# clk a_104_24# gnd n w=2u l=0.4u +M1015 gnd a_152_16# a_140_24# gnd n w=2u l=0.4u +M1016 a_152_16# a_104_24# gnd gnd n w=2u l=0.4u +M1017 a_260_24# a_152_16# gnd gnd n w=2u l=0.4u +M1018 a_280_24# clk a_260_24# gnd n w=2u l=0.4u +M1019 a_320_24# a_24_24# a_280_24# gnd n w=2u l=0.4u +M1020 gnd Q a_320_24# gnd n w=2u l=0.4u +M1021 Q a_280_24# gnd gnd n w=4u l=0.4u + +.ENDS diff --git a/technology/scn4me_subm/sp_lib/replica_cell_6t.sp b/technology/scn4me_subm/sp_lib/replica_cell_6t.sp new file mode 100644 index 00000000..d26d600f --- /dev/null +++ b/technology/scn4me_subm/sp_lib/replica_cell_6t.sp @@ -0,0 +1,14 @@ + +*********************** "cell_6t" ****************************** +.SUBCKT replica_cell_6t bl br wl vdd gnd +* SPICE3 file created from replica_cell_6t.ext - technology: scmos + +M1000 gnd a_28_32# vdd vdd p w=0.6u l=0.8u +M1001 vdd gnd a_28_32# vdd p w=0.6u l=0.8u +** SOURCE/DRAIN TIED +M1002 gnd a_28_32# gnd gnd n w=1.6u l=0.4u +M1003 gnd gnd a_28_32# gnd n w=1.6u l=0.4u +M1004 gnd wl bl gnd n w=0.8u l=0.4u +M1005 a_28_32# wl br gnd n w=0.8u l=0.4u + +.ENDS diff --git a/technology/scn4me_subm/sp_lib/sense_amp.sp b/technology/scn4me_subm/sp_lib/sense_amp.sp new file mode 100644 index 00000000..70622413 --- /dev/null +++ b/technology/scn4me_subm/sp_lib/sense_amp.sp @@ -0,0 +1,15 @@ +*********************** "sense_amp" ****************************** + +.SUBCKT sense_amp bl br dout en vdd gnd + +* SPICE3 file created from sense_amp.ext - technology: scmos + +M1000 gnd en a_56_432# gnd n w=1.8u l=0.4u +M1001 a_56_432# a_48_304# dout gnd n w=1.8u l=0.4u +M1002 a_48_304# dout a_56_432# gnd n w=1.8u l=0.4u +M1003 vdd a_48_304# dout vdd p w=3.6u l=0.4u +M1004 a_48_304# dout vdd vdd p w=3.6u l=0.4u +M1005 bl en dout vdd p w=4.8u l=0.4u +M1006 a_48_304# en br vdd p w=4.8u l=0.4u + +.ENDS diff --git a/technology/scn4me_subm/sp_lib/tri_gate.sp b/technology/scn4me_subm/sp_lib/tri_gate.sp new file mode 100644 index 00000000..451feba3 --- /dev/null +++ b/technology/scn4me_subm/sp_lib/tri_gate.sp @@ -0,0 +1,14 @@ +*********************** tri_gate ****************************** + +.SUBCKT tri_gate in out en en_bar vdd gnd + +* SPICE3 file created from tri_gate.ext - technology: scmos + +M1000 vdd in a_16_108# vdd p w=1.6u l=0.4u +M1001 a_76_212# a_16_108# vdd vdd p w=1.6u l=0.4u +M1002 out en_bar a_76_212# vdd p w=1.6u l=0.4u +M1003 gnd in a_16_108# gnd n w=0.8u l=0.4u +M1004 a_76_108# a_16_108# gnd gnd n w=0.8u l=0.4u +M1005 out en a_76_108# gnd n w=0.8u l=0.4u + +.ENDS diff --git a/technology/scn4me_subm/sp_lib/write_driver.sp b/technology/scn4me_subm/sp_lib/write_driver.sp new file mode 100644 index 00000000..afcf1049 --- /dev/null +++ b/technology/scn4me_subm/sp_lib/write_driver.sp @@ -0,0 +1,23 @@ +*********************** Write_Driver ****************************** +.SUBCKT write_driver din bl br en vdd gnd +* SPICE3 file created from write_driver.ext - technology: scmos + +M1000 a_44_708# a_36_700# bl gnd n w=2.4u l=0.4u +M1001 br a_16_500# a_44_708# gnd n w=2.4u l=0.4u +M1002 a_44_708# en gnd gnd n w=2.4u l=0.4u +M1003 gnd a_8_284# a_16_500# gnd n w=0.8u l=0.4u +M1004 a_36_700# a_20_328# gnd gnd n w=0.8u l=0.4u +M1005 vdd a_8_284# a_16_500# vdd p w=1.4u l=0.4u +M1006 a_36_700# a_20_328# vdd vdd p w=1.4u l=0.4u +M1007 vdd en a_20_328# vdd p w=1.4u l=0.4u +M1008 a_20_328# a_64_360# vdd vdd p w=1.4u l=0.4u +M1009 a_48_328# en a_20_328# gnd n w=1.4u l=0.4u +M1010 gnd a_64_360# a_48_328# gnd n w=1.4u l=0.4u +M1011 a_40_228# en a_8_284# gnd n w=1.4u l=0.4u +M1012 gnd din a_40_228# gnd n w=1.4u l=0.4u +M1013 a_64_360# din gnd gnd n w=0.8u l=0.4u +M1014 a_8_284# en vdd vdd p w=1.4u l=0.4u +M1015 vdd din a_8_284# vdd p w=1.4u l=0.4u +M1016 a_64_360# din vdd vdd p w=1.4u l=0.4u + +.ENDS diff --git a/technology/scn4me_subm/sue_lib/cell_6t.sue b/technology/scn4me_subm/sue_lib/cell_6t.sue new file mode 100644 index 00000000..427b1d05 --- /dev/null +++ b/technology/scn4me_subm/sue_lib/cell_6t.sue @@ -0,0 +1,46 @@ +# SUE version MMI_SUE5.0.7 + +proc SCHEMATIC_cell_6t {} { + make inout -name BL -origin {190 360} + make inout -name BR -origin {830 360} + make input -name WL -origin {240 120} + make global -orient RXY -name vdd -origin {520 160} + make global -name gnd -origin {510 600} + make pmos -orient RY -W 0.9u -L 1.2u -origin {630 230} + make pmos -orient RXY -W 0.9u -L 1.2u -origin {400 230} + make nmos -orient R90 -W 1.2 -L 0.6u -origin {740 360} + make nmos -orient R90X -W 1.2 -L 0.6u -origin {270 360} + make nmos -W 2.4u -L 0.6u -origin {630 490} + make nmos -orient RX -W 2.4u -L 0.6u -origin {400 490} + make_wire 630 550 630 530 + make_wire 400 530 400 550 + make_wire 400 190 400 170 + make_wire 630 170 630 190 + make_wire 400 360 400 270 + make_wire 310 360 400 360 + make_wire 630 360 630 450 + make_wire 630 360 700 360 + make_wire 270 300 270 120 + make_wire 270 120 740 120 + make_wire 740 120 740 300 + make_wire 230 360 190 360 + make_wire 780 360 830 360 + make_wire 510 550 400 550 + make_wire 510 550 630 550 + make_wire 510 550 510 600 + make_wire 520 170 400 170 + make_wire 520 170 630 170 + make_wire 520 160 520 170 + make_wire 240 120 270 120 + make_wire 460 290 630 290 + make_wire 460 290 460 490 + make_wire 460 290 460 230 + make_wire 630 290 630 360 + make_wire 630 290 630 270 + make_wire 570 420 400 420 + make_wire 570 420 570 490 + make_wire 570 420 570 230 + make_wire 400 420 400 360 + make_wire 400 420 400 450 +} + diff --git a/technology/scn4me_subm/sue_lib/ms_flop.sue b/technology/scn4me_subm/sue_lib/ms_flop.sue new file mode 100644 index 00000000..85cc8e03 --- /dev/null +++ b/technology/scn4me_subm/sue_lib/ms_flop.sue @@ -0,0 +1,84 @@ +# SUE version MMI_SUE5.0.7 + +proc SCHEMATIC_ms_flop {} { + make pmos -orient R90X -W 1.8u -L 0.6u -origin {40 250} + make nmos -orient R270 -W 0.9u -L 0.6u -origin {40 380} + make inverter -WP 1.8u -LP 0.6u -WN 0.9u -LN 0.6u -origin {-270 540} + make inverter -WP 1.8u -LP 0.6u -WN 0.9u -LN 0.6u -origin {310 310} + make inverter -orient RX -WP 1.8u -LP 0.6u -WN 0.9u -LN 0.6u -origin {430 730} + make pmos -orient R90X -W 1.8u -L 0.6u -origin {190 670} + make nmos -orient R270 -W 0.9u -L 0.6u -origin {190 780} + make input -name clk -origin {-380 540} + make input -name din -origin {-370 320} + make pmos -orient R90X -W 1.8u -L 0.6u -origin {720 250} + make nmos -orient R270 -W 0.9u -L 0.6u -origin {720 380} + make inverter -WP 1.8u -LP 0.6u -WN 0.9u -LN 0.6u -origin {990 310} + make pmos -orient R90X -W 1.8u -L 0.6u -origin {870 670} + make nmos -orient R270 -W 0.9u -L 0.6u -origin {870 780} + make inverter -WP 1.8u -LP 0.6u -WN 0.9u -LN 0.6u -origin {620 540} + make output -name dout -origin {1410 310} + make output -name dout_bar -origin {1430 930} + make inverter -orient RX -WP 1.8u -LP 0.6u -WN 0.9u -LN 0.6u -origin {1110 730} + make_wire -330 160 40 160 + make_wire 40 160 40 190 + make_wire -370 320 0 320 + make_wire 360 310 480 310 + make_wire 460 730 480 730 + make_wire 230 730 380 730 + make_wire 100 310 100 720 + make_wire 100 720 150 720 + make_wire 100 310 80 310 + make_wire 100 310 280 310 + make_wire 0 250 0 320 + make_wire 0 320 0 380 + make_wire 80 250 80 310 + make_wire 80 310 80 380 + make_wire 40 440 40 540 + make_wire -330 840 190 840 + make_wire 230 670 230 730 + make_wire 230 730 230 780 + make_wire 150 670 150 720 + make_wire 150 720 150 780 + make_wire 190 540 190 610 + make_wire -330 540 -330 840 + make_wire -220 540 40 540 + make_wire 40 540 190 540 + make_wire -380 540 -330 540 + make_wire -330 540 -300 540 + make_wire -330 540 -330 160 + make_wire 720 160 720 190 + make_wire 1140 730 1160 730 + make_wire 780 310 780 720 + make_wire 780 720 830 720 + make_wire 780 310 760 310 + make_wire 780 310 960 310 + make_wire 680 320 680 380 + make_wire 760 250 760 310 + make_wire 760 310 760 380 + make_wire 720 440 720 540 + make_wire 910 670 910 730 + make_wire 910 730 910 780 + make_wire 830 670 830 720 + make_wire 830 720 830 780 + make_wire 870 540 870 610 + make_wire 720 540 870 540 + make_wire 670 540 720 540 + make_wire 480 310 480 730 + make_wire 1160 310 1160 730 + make_wire 530 540 530 160 + make_wire 530 160 720 160 + make_wire 530 540 190 540 + make_wire 530 540 590 540 + make_wire 530 540 530 840 + make_wire 530 840 870 840 + make_wire 680 310 480 310 + make_wire 680 310 680 250 + make_wire 680 310 680 320 + make_wire 950 730 910 730 + make_wire 950 730 1060 730 + make_wire 1040 310 1160 310 + make_wire 1160 310 1410 310 + make_wire 950 930 1430 930 + make_wire 950 730 950 930 +} + diff --git a/technology/scn4me_subm/sue_lib/replica_cell_6t.sue b/technology/scn4me_subm/sue_lib/replica_cell_6t.sue new file mode 100644 index 00000000..56e72056 --- /dev/null +++ b/technology/scn4me_subm/sue_lib/replica_cell_6t.sue @@ -0,0 +1,49 @@ +# SUE version MMI_SUE5.0.7 + +proc SCHEMATIC_replica_cell_6t {} { + make inout -name BL -origin {190 360} + make inout -name BR -origin {830 360} + make input -name WL -origin {240 120} + make global -orient RXY -name vdd -origin {520 160} + make global -name gnd -origin {510 600} + make pmos -orient RY -W 0.9u -L 1.2u -origin {630 230} + make pmos -orient RXY -W 0.9u -L 1.2u -origin {400 230} + make nmos -orient R90 -W 1.2 -L 0.6u -origin {740 360} + make nmos -orient R90X -W 1.2 -L 0.6u -origin {270 360} + make nmos -W 2.4u -L 0.6u -origin {630 490} + make nmos -orient RX -W 2.4u -L 0.6u -origin {400 490} + make_wire 630 550 630 530 + make_wire 400 530 400 550 + make_wire 400 190 400 170 + make_wire 630 170 630 190 + make_wire 400 360 400 270 + make_wire 630 360 630 450 + make_wire 630 360 700 360 + make_wire 270 300 270 120 + make_wire 270 120 740 120 + make_wire 740 120 740 300 + make_wire 230 360 190 360 + make_wire 780 360 830 360 + make_wire 510 550 400 550 + make_wire 510 550 630 550 + make_wire 510 550 510 600 + make_wire 520 170 400 170 + make_wire 520 170 630 170 + make_wire 520 160 520 170 + make_wire 240 120 270 120 + make_wire 460 290 630 290 + make_wire 460 290 460 490 + make_wire 460 290 460 230 + make_wire 630 290 630 360 + make_wire 630 290 630 270 + make_wire 570 420 400 420 + make_wire 570 420 570 490 + make_wire 570 420 570 230 + make_wire 400 420 400 360 + make_wire 400 420 400 450 + make_wire 320 360 320 550 + make_wire 320 550 400 550 + make_wire 320 360 310 360 + make_wire 320 360 400 360 +} + diff --git a/technology/scn4me_subm/sue_lib/sense_amp.sue b/technology/scn4me_subm/sue_lib/sense_amp.sue new file mode 100644 index 00000000..4d29e11a --- /dev/null +++ b/technology/scn4me_subm/sue_lib/sense_amp.sue @@ -0,0 +1,52 @@ +# SUE version MMI_SUE5.0.7 + +proc SCHEMATIC_sense_amp {} { + make inout -name BL -origin {260 10} + make global -orient RXY -name vdd -origin {490 170} + make global -name gnd -origin {480 660} + make input -name sclk -origin {180 610} + make nmos -W 3.9u -L 0.6u -origin {600 500} + make nmos -orient RX -W 3.9u -L 0.6u -origin {370 500} + make pmos -orient RY -W 3u -L 0.6u -origin {600 240} + make pmos -orient RXY -W 3u -L 0.6u -origin {370 240} + make nmos -W 3.9u -L 0.6u -origin {480 610} + make inout -name BR -origin {710 20} + make pmos -W 3.9u -L 0.6u -origin {710 90} + make pmos -orient RX -W 3.9u -L 0.6u -origin {260 90} + make output -orient RXY -name dout -origin {110 370} + make_wire 600 560 600 540 + make_wire 370 540 370 560 + make_wire 370 200 370 180 + make_wire 600 180 600 200 + make_wire 490 180 370 180 + make_wire 490 180 600 180 + make_wire 490 170 490 180 + make_wire 430 300 600 300 + make_wire 430 300 430 500 + make_wire 430 300 430 240 + make_wire 600 300 600 280 + make_wire 540 430 370 430 + make_wire 540 430 540 500 + make_wire 540 430 540 240 + make_wire 370 430 370 460 + make_wire 480 560 600 560 + make_wire 480 560 370 560 + make_wire 480 560 480 570 + make_wire 480 650 480 660 + make_wire 420 610 180 610 + make_wire 650 90 320 90 + make_wire 600 360 710 360 + make_wire 710 360 710 130 + make_wire 600 360 600 300 + make_wire 600 360 600 460 + make_wire 370 370 260 370 + make_wire 260 370 260 130 + make_wire 370 370 370 430 + make_wire 370 370 370 280 + make_wire 260 10 260 50 + make_wire 710 20 710 50 + make_wire 320 90 180 90 + make_wire 180 90 180 610 + make_wire 110 370 260 370 +} + diff --git a/technology/scn4me_subm/sue_lib/tri_gate.sue b/technology/scn4me_subm/sue_lib/tri_gate.sue new file mode 100644 index 00000000..d296171f --- /dev/null +++ b/technology/scn4me_subm/sue_lib/tri_gate.sue @@ -0,0 +1,37 @@ +# SUE version MMI_SUE5.0.7 + +proc SCHEMATIC_tri_gate {} { + make global -orient RXY -name vdd -origin {630 150} + make global -name gnd -origin {630 570} + make input -name tri_in -origin {320 340} + make output -name tri_out -origin {690 360} + make input -name en -origin {570 410} + make input -name en_bar -origin {570 310} + make nmos -W 1.2u -L 0.6u -origin {630 490} + make nmos -W 1.2u -L 0.6u -origin {630 410} + make pmos -orient RY -W 2.4u -L 0.6u -origin {630 310} + make pmos -orient RY -W 2.4u -L 0.6u -origin {630 230} + make pmos -orient RY -W 2.4u -L 0.6u -origin {380 290} + make nmos -W 1.2u -L 0.6u -origin {380 400} + make_wire 570 490 470 490 + make_wire 470 230 570 230 + make_wire 630 550 380 550 + make_wire 380 550 380 440 + make_wire 630 550 630 570 + make_wire 630 550 630 530 + make_wire 630 170 380 170 + make_wire 380 170 380 250 + make_wire 630 170 630 190 + make_wire 630 170 630 150 + make_wire 320 340 320 400 + make_wire 320 340 320 290 + make_wire 380 340 470 340 + make_wire 380 340 380 330 + make_wire 380 340 380 360 + make_wire 470 340 470 490 + make_wire 470 340 470 230 + make_wire 630 360 630 350 + make_wire 630 360 630 370 + make_wire 630 360 690 360 +} + diff --git a/technology/scn4me_subm/sue_lib/write_driver.sue b/technology/scn4me_subm/sue_lib/write_driver.sue new file mode 100644 index 00000000..de3909a7 --- /dev/null +++ b/technology/scn4me_subm/sue_lib/write_driver.sue @@ -0,0 +1,44 @@ +# SUE version MMI_SUE5.0.7 + +proc SCHEMATIC_write_driver {} { + make inout -name BL -origin {550 260} + make inout -name BR -origin {830 250} + make inverter -WP 2.1u -LP 0.6u -WN 1.2u -LN 0.6u -origin {280 520} + make nand2 -WP 2.1u -WN 2.1u -origin {90 360} + make inverter -WP 2.1u -LP 0.6u -WN 1.2u -LN 0.6u -origin {270 360} + make nmos -W 3.6u -L 0.6u -origin {830 410} + make nmos -W 3.6u -L 0.6u -origin {710 610} + make global -name gnd -origin {710 690} + make nand2 -WP 2.1u -WN 2.1u -origin {90 520} + make nmos -W 3.6u -L 0.6u -origin {550 410} + make input -name wen -origin {-290 340} + make input -name din -origin {-290 380} + make inverter -WP 2.1u -LP 0.6u -WN 1.2u -LN 0.6u -origin {-80 540} + make_wire 160 360 240 360 + make_wire 830 250 830 370 + make_wire 550 260 550 370 + make_wire 550 450 550 560 + make_wire 550 560 710 560 + make_wire 710 560 710 570 + make_wire 710 560 830 560 + make_wire 830 560 830 450 + make_wire 710 650 710 690 + make_wire 250 520 160 520 + make_wire 770 410 770 520 + make_wire 770 520 330 520 + make_wire 320 360 490 360 + make_wire 490 360 490 410 + make_wire -180 380 -290 380 + make_wire -180 380 70 380 + make_wire -180 540 -110 540 + make_wire -180 380 -180 540 + make_wire -30 540 70 540 + make_wire 20 340 20 500 + make_wire 20 500 70 500 + make_wire 20 340 70 340 + make_wire -240 340 -240 610 + make_wire -240 610 650 610 + make_wire -240 340 20 340 + make_wire -240 340 -290 340 +} + diff --git a/technology/scn4me_subm/tech/LICENSE.txt b/technology/scn4me_subm/tech/LICENSE.txt new file mode 100644 index 00000000..0d923fcb --- /dev/null +++ b/technology/scn4me_subm/tech/LICENSE.txt @@ -0,0 +1,10 @@ +The file SCN3ME_SUBM.30.tech is from qflow 1.2 and has the following +license information: +--------------------------------------------------------------- +Tim Edwards +Open Circuit Design +v1.0 April 2013 +v1.1 May 2015 +v1.2 April 2017 +--------------------------------------------------------------- +GPL Copyright (c) 2017 diff --git a/technology/scn4me_subm/tech/SCN4M_SUBM.20.tech b/technology/scn4me_subm/tech/SCN4M_SUBM.20.tech new file mode 100644 index 00000000..7400825c --- /dev/null +++ b/technology/scn4me_subm/tech/SCN4M_SUBM.20.tech @@ -0,0 +1,10329 @@ +tech + format 32 + scmos +end + +version + version 2001a + description "SCMOS: Submit as technology.lambda: SCN4M_SUBM.20 [to process: TSMC35]" +end + +planes + well,w + implant,i + select,s + active,a + metal1,m1 + metal2,m2 + metal3,m3 + metal4,m4 + oxide,ox + comment + xp + contact + via1,v1 + via2,v2 + via3,v3 + fill +end + +types + well nwell,nw + active nwr + well pwell,pw + implant n_field_implant,nfi + implant p_field_implant,pfi + select nselect,ns + select pselect,ps + active ntransistor,nfet + active ptransistor,pfet + active diffusion,diff + active transistor,fet + active ndiffusion,ndif,green + active pdiffusion,pdif,brown + active ndcontact,ndc + active pdcontact,pdc + active psubstratepdiff,pohmicdiff,pod,ppdiff,ppd,psd + active nsubstratendiff,nohmicdiff,nod,nndiff,nnd,nsd + active psubstratepcontact,pohmiccontact,poc,pwcontact,pwc,psc + active nsubstratencontact,nohmiccontact,noc,nwcontact,nwc,nsc + active nwsd + active nwsc + active polysilicon,red,poly,p + active polycontact,pcontact,polycut,pc + contact genericcontact,gcontact,gc + metal1 metal1,m1,blue + metal1 pseudo_rmetal1,prm1 + metal1 rmetal1,rm1 + metal1 fillm1,fm1 + metal1 m2contact,m2cut,m2c,via1,v1,via + metal1 pm12contact,pm12c + metal1 pdm12contact,pdm12c + metal1 psm12contact,psm12c,pom12c,pwm12c + metal1 ndm12contact,ndm12c + metal1 nsm12contact,nsm12c,nom12c,nwm12c + metal1 nwsm12contact,nwsm12c + metal2 metal2,m2,purple + metal2 pseudo_rmetal2,prm2 + metal2 rmetal2,rm2 + metal2 fillm2,fm2 + via1 gv1 + metal2 m3contact,m3cut,m3c,via2,v2 + metal2 m123contact,m123c + metal3 metal3,m3,cyan + metal3 pseudo_rmetal3,prm3 + metal3 rmetal3,rm3 + metal3 fillm3,fm3 + via2 gv2 + metal3 m234contact,m234c + metal3 m4contact,m4cut,m4c,via3,v3 + metal4 metal4,m4,yellow + metal4 pseudo_rmetal4,prm4 + metal4 rmetal4,rm4 + metal4 fillm4,fm4 + via3 gv3 + metal4 pad + oxide glass + active silicide_block,sb + active poly_resist,pres + active pseudo_rpoly,prp + active rpoly,rp + active pseudo_rndiffusion,prnd + active rndiffusion,rndiff,rnd + active pseudo_rpdiffusion,prpd + active rpdiffusion,rpdiff,rpd + active pseudo_rnwell,prnwell,prnw + active rnwell,rnw + active pseudo_nwr,pnwr + implant filln,fn + fill filla,fa + fill fillb,fb + active fillp,fp + active fillapm,fapm + active activen_resist,anres + active activep_resist,apres + xp xp + xp m1p + xp m2p + xp m3p + xp m4p + comment comment + comment bb +end + +contact + pc poly metal1 + ndc ndiff metal1 + pdc pdiff metal1 + nsc nsd metal1 + nwsc nwsd metal1 + psc psd metal1 + m2c metal1 metal2 + m3c metal2 metal3 + m4c metal3 metal4 + # pm12c poly metal1 metal2 + # pdm12c pdiff metal1 metal2 + # psm12c psd metal1 metal2 + # ndm12c ndiff metal1 metal2 + # nsm12c nsd metal1 metal2 + # nwsm12c nwsd metal1 metal2 + # m123c metal1 metal2 metal3 + # m234c metal2 metal3 metal4 + stackable pc m2c pm12c + stackable pdc m2c pdm12c + stackable psc m2c psm12c + stackable ndc m2c ndm12c + stackable nsc m2c nsm12c + stackable nwsc m2c nwsm12c + stackable m2c m3c m123c + stackable m3c m4c m234c +end + +styles + styletype mos + nwr 54 + pnwr 53 + nwsd 3 + nwsd 54 + nwsc 3 + nwsc 20 + nwsc 32 + nwsc 54 + nwell 12 + pwell 13 + nfi 53 + pfi 54 + nselect 43 + pselect 44 + diff 25 + tran 2 + tran 4 + ndiff 2 + pdiff 4 + nsd 3 + psd 5 + nfet 6 + nfet 7 + pfet 8 + pfet 9 + ndc 2 + ndc 20 + ndc 32 + pdc 4 + pdc 20 + pdc 32 + nsc 3 + nsc 20 + nsc 32 + psc 5 + psc 20 + psc 32 + poly 1 + pcontact 1 + pcontact 20 + pcontact 32 + gc 32 + metal1 20 + rm1 20 + rm1 48 + prm1 48 + m1p 20 + m1p 34 + fm1 20 + fm1 34 + fp 1 + fp 34 + fa 32 + fb 45 + fb 34 + fn 45 + fn 34 + fapm 1 + fapm 20 + fapm 21 + fapm 34 + gv1 55 + m2contact 20 + m2contact 21 + m2contact 55 + pm12contact 1 + pm12contact 20 + pm12contact 21 + pm12contact 32 + pm12contact 55 + ndm12c 2 + ndm12c 20 + ndm12c 21 + ndm12c 32 + ndm12c 55 + nsm12c 3 + nsm12c 20 + nsm12c 21 + nsm12c 32 + nsm12c 55 + nwsm12c 3 + nwsm12c 20 + nwsm12c 21 + nwsm12c 32 + nwsm12c 55 + nwsm12c 54 + pdm12c 4 + pdm12c 20 + pdm12c 21 + pdm12c 32 + pdm12c 55 + psm12c 5 + psm12c 20 + psm12c 21 + psm12c 32 + psm12c 55 + metal2 21 + rm2 21 + rm2 48 + prm2 48 + m2p 21 + m2p 34 + fm2 21 + fm2 34 + gv2 56 + m3contact 21 + m3contact 22 + m3contact 56 + m123c 20 + m123c 21 + m123c 22 + m123c 55 + m123c 56 + metal3 22 + rm3 22 + rm3 48 + prm3 48 + m3p 22 + m3p 34 + fm3 22 + fm3 34 + gv3 57 + m4contact 22 + m4contact 23 + m4contact 57 + m234contact 21 + m234contact 22 + m234contact 23 + m234contact 56 + m234contact 57 + metal4 23 + rm4 23 + rm4 48 + prm4 48 + m4p 23 + m4p 34 + fm4 23 + fm4 34 + pad 22 + pad 23 + pad 34 + pad 38 + glass 34 + xp 25 + xp 34 + sb 10 + pres 47 + pres 48 + rp 47 + rp 48 + prp 48 + anres 2 + anres 48 + rnd 2 + rnd 48 + prnd 48 + apres 4 + apres 53 + rpd 4 + rpd 53 + prpd 53 + rnw 12 + rnw 53 + prnw 54 + comment 45 + bb 32 + error_p 42 + error_s 42 + error_ps 42 + magnet 54 + rotate 57 + fence 59 +end + +compose + compose nfet poly ndiff + compose pfet poly pdiff + paint diff nselect ndiff + paint diff pselect pdiff + compose tran poly diff + paint tran nselect nfet + paint tran pselect pfet + paint psd ns ndiff + paint nsd ps pdiff + paint ndiff ps psd + paint pdiff ns nsd + paint pad m1 pad + paint pad m2 pad + paint pad m2c pad + paint pfi nwell nfi + paint nfi pwell pfi + paint anres nwell apres + paint apres pwell anres + paint ndc nwell pdc + paint nfet nwell pfet + paint ndiff nwell pdiff + paint psd nwell nsd + paint psc nwell nsc + paint pdc pwell ndc + paint pfet pwell nfet + paint pdiff pwell ndiff + paint nsd pwell psd + paint nsc pwell psc + paint pad m3 pad + paint pad m4 pad + compose pres poly sb + paint sb poly pres + paint poly sb pres + erase pres sb poly + compose anres ndiff sb + paint sb ndiff anres + paint ndiff sb anres + erase anres sb ndiff + compose apres pdiff sb + paint sb pdiff apres + paint pdiff sb apres + erase apres sb pdiff +#CRE/CRM + compose rm1 prm1 m1 + compose rm2 prm2 m2 + compose rm3 prm3 m3 + compose rm4 prm4 m4 + compose rp prp poly + compose rnd prnd ndiff + compose rpd prpd pdiff + paint nwell rnw space + paint nwell nwr space + paint nwell prnw space + paint poly fp fp + paint m1 fm1 fm1 + paint m2 fm2 fm2 + paint m3 fm3 fm3 + paint m4 fm4 fm4 +end + +connect + nwell,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,nsd,nwsd nwell,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,nsd,nwsd + pwell,psc/a,psm12c/a,psd pwell,psc/a,psm12c/a,psd + m1,fm1,fapm,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 m1,fm1,fapm,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + m2,fm2,fapm,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 m2,fm2,fapm,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + m3,fm3,fapm,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 m3,fm3,fapm,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + m4,fm4,fapm,m4c/m4,m234c/m4 m4,fm4,fapm,m4c/m4,m234c/m4 + ndiff,nsd,nwsd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdiff,psd,pdc/a,pdm12c/a,psc/a,psm12c/a ndiff,nsd,nwsd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdiff,psd,pdc/a,pdm12c/a,psc/a,psm12c/a + poly,fp,nfet,pfet,fet,fapm,pc/a,pm12c/a poly,fp,nfet,pfet,fet,fapm,pc/a,pm12c/a + gc poly,fp,ndiff,pdiff,nsd,nwsd,psd,m1,fm1,fapm,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + gv1 m1,fm1,fapm,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2,fm2,fapm,m3c/m2,m123c/m2,m234c/m2 + gv2 m2,fm2,fapm,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3,fm3,fapm,m4c/m3,m234c/m3 + gv3 m3,fm3,fapm,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4,fm4,fapm + pad m1,fm1,m2,fm2,m3,fm3,m4,fm4 + rm1 prm1 + rm2 prm2 + rm3 prm3 + rm4 prm4 + rnw prnw + nwr pnwr + rp prp + rnd prnd + rpd prpd + pres sb + anres sb + apres sb +end + +cifoutput + +style lambda=0.20(p) + scalefactor 20 10 + + layer CWN nwell,rnw,nwr,nwsd,nwsc + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a,pfet * 120 + bloat-or nsd,nsc/a,nsm12c/a * 60 + bloat-or nfi * 80 + grow 60 + shrink 60 + labels nwell,rnw,nwr,nwsd,nwsc + calma 42 0 + + layer CWNR nwsd,nwsc,nwr + grow 140 + calma 91 0 + + layer CWND nwr + labels nwr + calma 92 0 + + layer CAA nwsd,nwsc,nwr + grow 100 + labels nwsd,nwsc + calma 43 0 + + layer CSN + bloat-or nwsd,nwsc * 80 nwr 0 + calma 43 0 + + templayer TNWR + bloat-or nwr * 100 nwsd,nwsc 40 + + templayer TCSB nwsd,nwsc + grow 40 + and-not TNWR + + layer CSB nwsd,nwsc,nwr + grow 140 + and-not TCSB + calma 29 0 + + layer CRNW pnwr + labels pnwr + calma 93 0 + + layer CWP pwell + bloat-or ndiff,anres,rnd,ndc/a,ndm12c/a,nfet * 120 + bloat-or psd,psc/a,psm12c/a * 60 + bloat-or pfi * 80 + grow 60 + shrink 60 + and-not CWN + labels pwell + calma 41 0 + + templayer TNS ns + + templayer TPS ps + +#we give priority to selects autogenerated around diffusions (vrs. ohmics) +#XDP = (pdiff*40) Or ps +#XDN = (ndiff*40) Or ns +#FSP = ((pdiff*40,psc*40) Or XDP And-Not XDN Or ps shrink-grow +#FSN = ((ndiff*40,nsc*40) Or XDN And-Not FDP Or ns shrink-grow +#CSN = FSN +#CSP = FSP + +#diffusion auto-nselect (will have priority) + templayer XDN + bloat-or ndiff,anres,rnd,ndc/a,ndm12c/a * 40 psd,psc/a,psm12c/a 0 + or TNS + +#diffusion auto-pselect (will have priority) + templayer XDP + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a * 40 nsd,nsc/a,nsm12c/a 0 + or TPS + +#final pselect + templayer FSP + bloat-or pdiff,apres,rpd,pfet,psd,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet * 40 ndiff,anres,rnd,ndc/a,ndm12c/a,nsd,nsc/a,nsm12c/a,nfet 0 + or XDP +#give diff nselect priority + and-not XDN + or TPS + shrink 20 + grow 20 + grow 20 + shrink 20 + +#final nselect + templayer FSN + bloat-or ndiff,anres,rnd,nfet,nsd,nwsd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,nfet * 40 pdiff,apres,rpd,pdc/a,pdm12c/a,psd,psc/a,psm12c/a,pfet 0 + and-not nwr + or XDN +#never conflict with final pselect + and-not FSP +#drawn select always goes + or TNS + shrink 20 + grow 20 + grow 20 + shrink 20 + + layer CSN FSN + calma 45 0 + + layer CSP FSP + calma 44 0 + + layer CAA diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + labels diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + calma 43 0 + + layer CCA nwsc/m1,nwsm12c/m1 + squares 40 40 60 + calma 48 0 + + layer CCA ndc/m1,ndm12c/m1,nsc/m1,nsm12c/m1 + squares 20 40 60 + calma 48 0 + + layer CCA pdc/m1,pdm12c/m1,psc/m1,psm12c/m1 + squares 20 40 60 + calma 48 0 + + layer CPG poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + labels poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + calma 46 0 + + layer CCP pc/m1,pm12c/m1 + squares 20 40 60 + calma 47 0 + + layer CCC gc + squares 0 40 60 + calma 25 0 + + layer CV1 m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + squares 20 40 60 + calma 50 0 + + layer CV1 gv1 + squares 0 40 60 + calma 50 0 + + layer CV2 m3c/m2,m123c/m2,m234c/m2 + squares 20 40 60 + calma 61 0 + + layer CV2 gv2 + squares 0 40 60 + calma 61 0 + + layer CV3 m4c/m3,m234c/m3 + squares 20 40 60 + calma 30 0 + + layer CV3 gv3 + squares 0 40 60 + calma 30 0 + + + templayer XPAD1 pad + shrink 120 + + templayer XPAD2 XPAD1 + shrink 120 + + layer CM4 pad + labels pad + calma 31 0 + + layer CV3 XPAD2 + squares 40 40 200 + calma 30 0 + + layer CM3 pad + labels pad + calma 62 0 + + layer CV2 XPAD2 + squares 160 40 200 + calma 61 0 + + layer CM2 pad + labels pad + calma 51 0 + + layer CV1 XPAD2 + squares 40 40 200 + calma 50 0 + + layer CM1 pad + calma 49 0 + + layer CM1 m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + labels m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + calma 49 0 + + layer CM2 m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + labels m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + calma 51 0 + + layer CMFP m1p + labels m1p + calma 81 0 + + layer CMSP m2p + labels m2p + calma 82 0 + + layer 100 fp + labels fp + calma 100 0 + + layer 101 fm1 + labels fm1 + calma 101 0 + + layer 102 fm2 + labels fm2 + calma 102 0 + + layer 103 fm3 + labels fm3 + calma 103 0 + + layer 104 fm4 + labels fm4 + calma 104 0 + + layer 109 fa + or fb + squares 0 200 80 + labels fa + calma 109 0 + + layer 119 fn + calma 119 0 + + layer 110 fapm + labels fapm + calma 110 0 + +# layer CPG fp + layer CPG fp,fapm + squares 0 200 80 + labels fp + calma 46 0 + +# layer CM1 fm1 + layer CM1 fm1,fapm + squares 0 200 80 + labels fm1 + calma 49 0 + +# layer CM2 fm2 + layer CM2 fm2,fapm + + squares 0 200 80 + labels fm2 + calma 51 0 + +# layer CM3 fm3 + layer CM3 fm3,fapm + + squares 0 200 80 + labels fm3 + calma 62 0 + + layer CM3 m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + labels m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + calma 62 0 + + layer CMTP m3p + labels m3p + calma 83 0 + + layer CM4 m4,rm4,m4c/m4,m234c/m4 + labels m4,rm4,m4c/m4,m234c/m4 + calma 31 0 + + layer CMQP m4p + labels m4p + calma 84 0 + +# layer CM4 fm4 + layer CM4 fm4,fapm + + squares 0 200 80 + labels fm4 + calma 31 0 + + layer COG pad + shrink 500 + labels pad + calma 52 0 + + layer COG glass + labels glass + calma 52 0 + + layer CFI nfi,pfi + labels nfi,pfi + calma 27 0 + + layer CSB sb,pres,anres,apres + labels sb,pres,anres,apres + calma 29 0 + +#CRE/CRM + layer CRW rnw,prnw + labels rnw,prnw + calma 65 0 + layer CRG rp,prp,pres + labels rp,prp,pres + calma 67 0 + layer CRD rnd,rpd,prnd,prpd,anres,apres + labels rnd,rpd,prnd,prpd,anres,apres + calma 66 0 + layer CRE rnw,rp,rnd,rpd,pres,anres,apres + labels rnw,rp,rnd,rpd,pres,anres,apres + calma 64 0 + layer CRF rm1,prm1 + labels rm1,prm1 + calma 71 0 + layer CRS rm2,prm2 + labels rm2,prm2 + calma 72 0 + layer CRT rm3,prm3 + labels rm3,prm3 + calma 73 0 + layer CRQ rm4,prm4 + labels rm4,prm4 + calma 74 0 +#CRE/CRM layer CRM rm1,prm1,rm2,prm2,rm3,prm3,rm4,prm4 +#CRE/CRM calma 70 0 + + layer CX comment + labels comment + calma 63 0 + + layer XP pad,xp + labels pad,xp + calma 26 0 + +style fill-only + scalefactor 20 10 + + layer 100 fp + calma 100 0 + + layer 101 fm1 + calma 101 0 + + layer 102 fm2 + calma 102 0 + + layer 103 fm3 + calma 103 0 + + layer 104 fm4 + calma 104 0 + + layer 109 fa + or fb + calma 109 0 + + layer 119 fn + calma 119 0 + +style fapm-boxes + +# this output style creates fill boxes automatically (to meet minimum +# density requirements for poly and metal layers) 5 microns outside of +# drawn layout IF: 1. you have a flattened version of your chip, +# 2. over which you paint the special fill layer 'fa', preferably with +# a size that is a multiple of 10 + n * (10 + 4), 3. set 'cif +# ostype fapm-boxes' and cif out to a file (this actually creates the +# fill boxes on cif/strm layer '110' using the magic 'squares' +# command), 4. cif in the resulting file (which creates boxes on magic +# layer 'fapm') and place this cell onto your chip (and verify absence +# of drc errors or shorts), then 5. cif out under your regular cif out +# style, where the 'fapm' layer creates fill boxes on poly and all +# metal layers. + + scalefactor 20 10 + + templayer CRIT fapm,fn,diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet,poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + or fm1,m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + or fm2,m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + or fm3,m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + or fm4,m4,rm4,m4c/m4,m234c/m4 + or glass,pad + grow 500 + and fa + + layer 110 fa + squares 0 200 80 + and-not CRIT + shrink 90 + grow 90 + or fapm + labels fapm + calma 110 0 + +style fapm-stripes + scalefactor 20 10 + +# this output style creates the above layer 110 as stripes for reduced size +# HOWEVER it requires each 'fa' box to first be an exact multiple as above +# and then *replacing* the left side (1-lambda wide) stripe of each 'fa' box +# to be a 1-lambda wide layer 'fb' box -- else you won't get strips! + + templayer CRIT fapm,fn,diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet,poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + or fm1,m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + or fm2,m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + or fm3,m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + or fm4,m4,rm4,m4c/m4,m234c/m4 + or glass,pad + grow 500 + and fa + + templayer FB fa + or fb + squares 0 200 80 + and-not CRIT + + layer 110 fa + squares 0 200 80 + and-not CRIT + or FB + shrink 90 + grow 90 + or fapm + labels fapm + calma 110 0 + + +style lambda=0.20(cp) + scalefactor 20 10 + + layer CWN nwell,rnw,nwr,nwsd,nwsc + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a,pfet * 120 + bloat-or nsd,nsc/a,nsm12c/a * 60 + bloat-or nfi * 80 + grow 60 + shrink 60 + labels nwell,rnw,nwr,nwsd,nwsc + calma 42 0 + + layer CWNR nwsd,nwsc,nwr + grow 140 + calma 91 0 + + layer CWND nwr + labels nwr + calma 92 0 + + layer CAA nwsd,nwsc,nwr + grow 100 + labels nwsd,nwsc + calma 43 0 + + layer CSN + bloat-or nwsd,nwsc * 80 nwr 0 + calma 43 0 + + templayer TNWR + bloat-or nwr * 100 nwsd,nwsc 40 + + templayer TCSB nwsd,nwsc + grow 40 + and-not TNWR + + layer CSB nwsd,nwsc,nwr + grow 140 + and-not TCSB + calma 29 0 + + layer CRNW pnwr + labels pnwr + calma 93 0 + + layer CWP pwell + bloat-or ndiff,anres,rnd,ndc/a,ndm12c/a,nfet * 120 + bloat-or psd,psc/a,psm12c/a * 60 + bloat-or pfi * 80 + grow 60 + shrink 60 + and-not CWN + labels pwell + calma 41 0 + + templayer TNS ns + + templayer TPS ps + +#we give priority to selects autogenerated around diffusions (vrs. ohmics) +#XDP = (pdiff*40) Or ps +#XDN = (ndiff*40) Or ns +#FSP = ((pdiff*40,psc*40) Or XDP And-Not XDN Or ps shrink-grow +#FSN = ((ndiff*40,nsc*40) Or XDN And-Not FDP Or ns shrink-grow +#CSN = FSN +#CSP = FSP + +#diffusion auto-nselect (will have priority) + templayer XDN + bloat-or ndiff,anres,rnd,ndc/a,ndm12c/a * 40 psd,psc/a,psm12c/a 0 + or TNS + +#diffusion auto-pselect (will have priority) + templayer XDP + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a * 40 nsd,nsc/a,nsm12c/a 0 + or TPS + +#final pselect + templayer FSP + bloat-or pdiff,apres,rpd,pfet,psd,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet * 40 ndiff,anres,rnd,ndc/a,ndm12c/a,nsd,nsc/a,nsm12c/a,nfet 0 + or XDP +#give diff nselect priority + and-not XDN + or TPS + shrink 20 + grow 20 + grow 20 + shrink 20 + +#final nselect + templayer FSN + bloat-or ndiff,anres,rnd,nfet,nsd,nwsd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,nfet * 40 pdiff,apres,rpd,pdc/a,pdm12c/a,psd,psc/a,psm12c/a,pfet 0 + and-not nwr + or XDN +#never conflict with final pselect + and-not FSP +#drawn select always goes + or TNS + shrink 20 + grow 20 + grow 20 + shrink 20 + + layer CSN FSN + calma 45 0 + + layer CSP FSP + calma 44 0 + + layer CAA diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + labels diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + calma 43 0 + + layer CCC nwsc/m1,nwsm12c/m1 + squares 40 40 60 + calma 25 0 + + layer CCC ndc/m1,ndm12c/m1,nsc/m1,nsm12c/m1 + squares 20 40 60 + calma 25 0 + + layer CCC pdc/m1,pdm12c/m1,psc/m1,psm12c/m1 + squares 20 40 60 + calma 25 0 + + layer CPG poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + labels poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + calma 46 0 + + layer CCC pc/m1,pm12c/m1 + squares 20 40 60 + calma 25 0 + + layer CCC gc + squares 0 40 60 + calma 25 0 + + layer CV1 m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + squares 20 40 60 + calma 50 0 + + layer CV1 gv1 + squares 0 40 60 + calma 50 0 + + layer CV2 m3c/m2,m123c/m2,m234c/m2 + squares 20 40 60 + calma 61 0 + + layer CV2 gv2 + squares 0 40 60 + calma 61 0 + + layer CV3 m4c/m3,m234c/m3 + squares 20 40 60 + calma 30 0 + + layer CV3 gv3 + squares 0 40 60 + calma 30 0 + + + templayer XPAD1 pad + shrink 120 + + templayer XPAD2 XPAD1 + shrink 120 + + layer CM4 pad + labels pad + calma 31 0 + + layer CV3 XPAD2 + squares 40 40 200 + calma 30 0 + + layer CM3 pad + labels pad + calma 62 0 + + layer CV2 XPAD2 + squares 160 40 200 + calma 61 0 + + layer CM2 pad + labels pad + calma 51 0 + + layer CV1 XPAD2 + squares 40 40 200 + calma 50 0 + + layer CM1 pad + calma 49 0 + + layer CM1 m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + labels m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + calma 49 0 + + layer CM2 m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + labels m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + calma 51 0 + + layer CMFP m1p + labels m1p + calma 81 0 + + layer CMSP m2p + labels m2p + calma 82 0 + + layer 100 fp + labels fp + calma 100 0 + + layer 101 fm1 + labels fm1 + calma 101 0 + + layer 102 fm2 + labels fm2 + calma 102 0 + + layer 103 fm3 + labels fm3 + calma 103 0 + + layer 104 fm4 + labels fm4 + calma 104 0 + + layer 109 fa + or fb + squares 0 200 80 + labels fa + calma 109 0 + + layer 119 fn + calma 119 0 + + layer 110 fapm + labels fapm + calma 110 0 + +# layer CPG fp + layer CPG fp,fapm + squares 0 200 80 + labels fp + calma 46 0 + +# layer CM1 fm1 + layer CM1 fm1,fapm + squares 0 200 80 + labels fm1 + calma 49 0 + +# layer CM2 fm2 + layer CM2 fm2,fapm + + squares 0 200 80 + labels fm2 + calma 51 0 + +# layer CM3 fm3 + layer CM3 fm3,fapm + + squares 0 200 80 + labels fm3 + calma 62 0 + + layer CM3 m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + labels m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + calma 62 0 + + layer CMTP m3p + labels m3p + calma 83 0 + + layer CM4 m4,rm4,m4c/m4,m234c/m4 + labels m4,rm4,m4c/m4,m234c/m4 + calma 31 0 + + layer CMQP m4p + labels m4p + calma 84 0 + +# layer CM4 fm4 + layer CM4 fm4,fapm + + squares 0 200 80 + labels fm4 + calma 31 0 + + layer COG pad + shrink 500 + labels pad + calma 52 0 + + layer COG glass + labels glass + calma 52 0 + + layer CFI nfi,pfi + labels nfi,pfi + calma 27 0 + + layer CSB sb,pres,anres,apres + labels sb,pres,anres,apres + calma 29 0 + +#CRE/CRM + layer CRW rnw,prnw + labels rnw,prnw + calma 65 0 + layer CRG rp,prp,pres + labels rp,prp,pres + calma 67 0 + layer CRD rnd,rpd,prnd,prpd,anres,apres + labels rnd,rpd,prnd,prpd,anres,apres + calma 66 0 + layer CRE rnw,rp,rnd,rpd,pres,anres,apres + labels rnw,rp,rnd,rpd,pres,anres,apres + calma 64 0 + layer CRF rm1,prm1 + labels rm1,prm1 + calma 71 0 + layer CRS rm2,prm2 + labels rm2,prm2 + calma 72 0 + layer CRT rm3,prm3 + labels rm3,prm3 + calma 73 0 + layer CRQ rm4,prm4 + labels rm4,prm4 + calma 74 0 +#CRE/CRM layer CRM rm1,prm1,rm2,prm2,rm3,prm3,rm4,prm4 +#CRE/CRM calma 70 0 + + layer CX comment + labels comment + calma 63 0 + + layer XP pad,xp + labels pad,xp + calma 26 0 + + +style lambda=0.20(c) + scalefactor 20 10 + + layer CWN nwell,rnw,nwr,nwsd,nwsc + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a,pfet * 120 + bloat-or nsd,nsc/a,nsm12c/a * 60 + bloat-or nfi * 80 + grow 60 + shrink 60 + labels nwell,rnw,nwr,nwsd,nwsc + calma 42 0 + + layer CWNR nwsd,nwsc,nwr + grow 140 + calma 91 0 + + layer CWND nwr + labels nwr + calma 92 0 + + layer CAA nwsd,nwsc,nwr + grow 100 + labels nwsd,nwsc + calma 43 0 + + layer CSN + bloat-or nwsd,nwsc * 80 nwr 0 + calma 43 0 + + templayer TNWR + bloat-or nwr * 100 nwsd,nwsc 40 + + templayer TCSB nwsd,nwsc + grow 40 + and-not TNWR + + layer CSB nwsd,nwsc,nwr + grow 140 + and-not TCSB + calma 29 0 + + layer CRNW pnwr + labels pnwr + calma 93 0 + + templayer TNS ns + + templayer TPS ps + +#we give priority to selects autogenerated around diffusions (vrs. ohmics) +#XDP = (pdiff*40) Or ps +#XDN = (ndiff*40) Or ns +#FSP = ((pdiff*40,psc*40) Or XDP And-Not XDN Or ps shrink-grow +#FSN = ((ndiff*40,nsc*40) Or XDN And-Not FDP Or ns shrink-grow +#CSN = FSN +#CSP = FSP + +#diffusion auto-nselect (will have priority) + templayer XDN + bloat-or ndiff,anres,rnd,ndc/a,ndm12c/a * 40 psd,psc/a,psm12c/a 0 + or TNS + +#diffusion auto-pselect (will have priority) + templayer XDP + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a * 40 nsd,nsc/a,nsm12c/a 0 + or TPS + +#final pselect + templayer FSP + bloat-or pdiff,apres,rpd,pfet,psd,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet * 40 ndiff,anres,rnd,ndc/a,ndm12c/a,nsd,nsc/a,nsm12c/a,nfet 0 + or XDP +#give diff nselect priority + and-not XDN + or TPS + shrink 20 + grow 20 + grow 20 + shrink 20 + +#final nselect + templayer FSN + bloat-or ndiff,anres,rnd,nfet,nsd,nwsd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,nfet * 40 pdiff,apres,rpd,pdc/a,pdm12c/a,psd,psc/a,psm12c/a,pfet 0 + and-not nwr + or XDN +#never conflict with final pselect + and-not FSP +#drawn select always goes + or TNS + shrink 20 + grow 20 + grow 20 + shrink 20 + + layer CSN FSN + calma 45 0 + + layer CSP FSP + calma 44 0 + + layer CAA diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + labels diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + calma 43 0 + + layer CCC nwsc/m1,nwsm12c/m1 + squares 40 40 60 + calma 25 0 + + layer CCC ndc/m1,ndm12c/m1,nsc/m1,nsm12c/m1 + squares 20 40 60 + calma 25 0 + + layer CCC pdc/m1,pdm12c/m1,psc/m1,psm12c/m1 + squares 20 40 60 + calma 25 0 + + layer CPG poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + labels poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + calma 46 0 + + layer CCC pc/m1,pm12c/m1 + squares 20 40 60 + calma 25 0 + + layer CCC gc + squares 0 40 60 + calma 25 0 + + layer CV1 m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + squares 20 40 60 + calma 50 0 + + layer CV1 gv1 + squares 0 40 60 + calma 50 0 + + layer CV2 m3c/m2,m123c/m2,m234c/m2 + squares 20 40 60 + calma 61 0 + + layer CV2 gv2 + squares 0 40 60 + calma 61 0 + + layer CV3 m4c/m3,m234c/m3 + squares 20 40 60 + calma 30 0 + + layer CV3 gv3 + squares 0 40 60 + calma 30 0 + + + templayer XPAD1 pad + shrink 120 + + templayer XPAD2 XPAD1 + shrink 120 + + layer CM4 pad + labels pad + calma 31 0 + + layer CV3 XPAD2 + squares 40 40 200 + calma 30 0 + + layer CM3 pad + labels pad + calma 62 0 + + layer CV2 XPAD2 + squares 160 40 200 + calma 61 0 + + layer CM2 pad + labels pad + calma 51 0 + + layer CV1 XPAD2 + squares 40 40 200 + calma 50 0 + + layer CM1 pad + calma 49 0 + + layer CM1 m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + labels m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + calma 49 0 + + layer CM2 m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + labels m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + calma 51 0 + + layer CMFP m1p + labels m1p + calma 81 0 + + layer CMSP m2p + labels m2p + calma 82 0 + + layer 100 fp + labels fp + calma 100 0 + + layer 101 fm1 + labels fm1 + calma 101 0 + + layer 102 fm2 + labels fm2 + calma 102 0 + + layer 103 fm3 + labels fm3 + calma 103 0 + + layer 104 fm4 + labels fm4 + calma 104 0 + + layer 109 fa + or fb + squares 0 200 80 + labels fa + calma 109 0 + + layer 119 fn + calma 119 0 + + layer 110 fapm + labels fapm + calma 110 0 + +# layer CPG fp + layer CPG fp,fapm + squares 0 200 80 + labels fp + calma 46 0 + +# layer CM1 fm1 + layer CM1 fm1,fapm + squares 0 200 80 + labels fm1 + calma 49 0 + +# layer CM2 fm2 + layer CM2 fm2,fapm + + squares 0 200 80 + labels fm2 + calma 51 0 + +# layer CM3 fm3 + layer CM3 fm3,fapm + + squares 0 200 80 + labels fm3 + calma 62 0 + + layer CM3 m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + labels m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + calma 62 0 + + layer CMTP m3p + labels m3p + calma 83 0 + + layer CM4 m4,rm4,m4c/m4,m234c/m4 + labels m4,rm4,m4c/m4,m234c/m4 + calma 31 0 + + layer CMQP m4p + labels m4p + calma 84 0 + +# layer CM4 fm4 + layer CM4 fm4,fapm + + squares 0 200 80 + labels fm4 + calma 31 0 + + layer COG pad + shrink 500 + labels pad + calma 52 0 + + layer COG glass + labels glass + calma 52 0 + + layer CFI nfi,pfi + labels nfi,pfi + calma 27 0 + + layer CSB sb,pres,anres,apres + labels sb,pres,anres,apres + calma 29 0 + +#CRE/CRM + layer CRW rnw,prnw + labels rnw,prnw + calma 65 0 + layer CRG rp,prp,pres + labels rp,prp,pres + calma 67 0 + layer CRD rnd,rpd,prnd,prpd,anres,apres + labels rnd,rpd,prnd,prpd,anres,apres + calma 66 0 + layer CRE rnw,rp,rnd,rpd,pres,anres,apres + labels rnw,rp,rnd,rpd,pres,anres,apres + calma 64 0 + layer CRF rm1,prm1 + labels rm1,prm1 + calma 71 0 + layer CRS rm2,prm2 + labels rm2,prm2 + calma 72 0 + layer CRT rm3,prm3 + labels rm3,prm3 + calma 73 0 + layer CRQ rm4,prm4 + labels rm4,prm4 + calma 74 0 +#CRE/CRM layer CRM rm1,prm1,rm2,prm2,rm3,prm3,rm4,prm4 +#CRE/CRM calma 70 0 + + layer CX comment + labels comment + calma 63 0 + + layer XP pad,xp + labels pad,xp + calma 26 0 + + +style lambda=0.20() + scalefactor 20 10 + + layer CWN nwell,rnw,nwr,nwsd,nwsc + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a,pfet * 120 + bloat-or nsd,nsc/a,nsm12c/a * 60 + bloat-or nfi * 80 + grow 60 + shrink 60 + labels nwell,rnw,nwr,nwsd,nwsc + calma 42 0 + + layer CWNR nwsd,nwsc,nwr + grow 140 + calma 91 0 + + layer CWND nwr + labels nwr + calma 92 0 + + layer CAA nwsd,nwsc,nwr + grow 100 + labels nwsd,nwsc + calma 43 0 + + layer CSN + bloat-or nwsd,nwsc * 80 nwr 0 + calma 43 0 + + templayer TNWR + bloat-or nwr * 100 nwsd,nwsc 40 + + templayer TCSB nwsd,nwsc + grow 40 + and-not TNWR + + layer CSB nwsd,nwsc,nwr + grow 140 + and-not TCSB + calma 29 0 + + layer CRNW pnwr + labels pnwr + calma 93 0 + + templayer TNS ns + + templayer TPS ps + +#we give priority to selects autogenerated around diffusions (vrs. ohmics) +#XDP = (pdiff*40) Or ps +#XDN = (ndiff*40) Or ns +#FSP = ((pdiff*40,psc*40) Or XDP And-Not XDN Or ps shrink-grow +#FSN = ((ndiff*40,nsc*40) Or XDN And-Not FDP Or ns shrink-grow +#CSN = FSN +#CSP = FSP + +#diffusion auto-nselect (will have priority) + templayer XDN + bloat-or ndiff,anres,rnd,ndc/a,ndm12c/a * 40 psd,psc/a,psm12c/a 0 + or TNS + +#diffusion auto-pselect (will have priority) + templayer XDP + bloat-or pdiff,apres,rpd,pdc/a,pdm12c/a * 40 nsd,nsc/a,nsm12c/a 0 + or TPS + +#final pselect + templayer FSP + bloat-or pdiff,apres,rpd,pfet,psd,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet * 40 ndiff,anres,rnd,ndc/a,ndm12c/a,nsd,nsc/a,nsm12c/a,nfet 0 + or XDP +#give diff nselect priority + and-not XDN + or TPS + shrink 20 + grow 20 + grow 20 + shrink 20 + +#final nselect + templayer FSN + bloat-or ndiff,anres,rnd,nfet,nsd,nwsd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,nfet * 40 pdiff,apres,rpd,pdc/a,pdm12c/a,psd,psc/a,psm12c/a,pfet 0 + and-not nwr + or XDN +#never conflict with final pselect + and-not FSP +#drawn select always goes + or TNS + shrink 20 + grow 20 + grow 20 + shrink 20 + + layer CSN FSN + calma 45 0 + + layer CSP FSP + calma 44 0 + + layer CAA diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + labels diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,pfet,pfet,fet + calma 43 0 + + layer CCA nwsc/m1,nwsm12c/m1 + squares 40 40 60 + calma 48 0 + + layer CCA ndc/m1,ndm12c/m1,nsc/m1,nsm12c/m1 + squares 20 40 60 + calma 48 0 + + layer CCA pdc/m1,pdm12c/m1,psc/m1,psm12c/m1 + squares 20 40 60 + calma 48 0 + + layer CPG poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + labels poly,pres,rp,nfet,pfet,fet,pc/a,pm12c/a + calma 46 0 + + layer CCP pc/m1,pm12c/m1 + squares 20 40 60 + calma 47 0 + + layer CCC gc + squares 0 40 60 + calma 25 0 + + layer CV1 m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + squares 20 40 60 + calma 50 0 + + layer CV1 gv1 + squares 0 40 60 + calma 50 0 + + layer CV2 m3c/m2,m123c/m2,m234c/m2 + squares 20 40 60 + calma 61 0 + + layer CV2 gv2 + squares 0 40 60 + calma 61 0 + + layer CV3 m4c/m3,m234c/m3 + squares 20 40 60 + calma 30 0 + + layer CV3 gv3 + squares 0 40 60 + calma 30 0 + + + templayer XPAD1 pad + shrink 120 + + templayer XPAD2 XPAD1 + shrink 120 + + layer CM4 pad + labels pad + calma 31 0 + + layer CV3 XPAD2 + squares 40 40 200 + calma 30 0 + + layer CM3 pad + labels pad + calma 62 0 + + layer CV2 XPAD2 + squares 160 40 200 + calma 61 0 + + layer CM2 pad + labels pad + calma 51 0 + + layer CV1 XPAD2 + squares 40 40 200 + calma 50 0 + + layer CM1 pad + calma 49 0 + + layer CM1 m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + labels m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 + calma 49 0 + + layer CM2 m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + labels m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 + calma 51 0 + + layer CMFP m1p + labels m1p + calma 81 0 + + layer CMSP m2p + labels m2p + calma 82 0 + + layer 100 fp + labels fp + calma 100 0 + + layer 101 fm1 + labels fm1 + calma 101 0 + + layer 102 fm2 + labels fm2 + calma 102 0 + + layer 103 fm3 + labels fm3 + calma 103 0 + + layer 104 fm4 + labels fm4 + calma 104 0 + + layer 109 fa + or fb + squares 0 200 80 + labels fa + calma 109 0 + + layer 119 fn + calma 119 0 + + layer 110 fapm + labels fapm + calma 110 0 + +# layer CPG fp + layer CPG fp,fapm + squares 0 200 80 + labels fp + calma 46 0 + +# layer CM1 fm1 + layer CM1 fm1,fapm + squares 0 200 80 + labels fm1 + calma 49 0 + +# layer CM2 fm2 + layer CM2 fm2,fapm + + squares 0 200 80 + labels fm2 + calma 51 0 + +# layer CM3 fm3 + layer CM3 fm3,fapm + + squares 0 200 80 + labels fm3 + calma 62 0 + + layer CM3 m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + labels m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3,m234c/m3,m4c/m3,m234c/m3 + calma 62 0 + + layer CMTP m3p + labels m3p + calma 83 0 + + layer CM4 m4,rm4,m4c/m4,m234c/m4 + labels m4,rm4,m4c/m4,m234c/m4 + calma 31 0 + + layer CMQP m4p + labels m4p + calma 84 0 + +# layer CM4 fm4 + layer CM4 fm4,fapm + + squares 0 200 80 + labels fm4 + calma 31 0 + + layer COG pad + shrink 500 + labels pad + calma 52 0 + + layer COG glass + labels glass + calma 52 0 + + layer CFI nfi,pfi + labels nfi,pfi + calma 27 0 + + layer CSB sb,pres,anres,apres + labels sb,pres,anres,apres + calma 29 0 + +#CRE/CRM + layer CRW rnw,prnw + labels rnw,prnw + calma 65 0 + layer CRG rp,prp,pres + labels rp,prp,pres + calma 67 0 + layer CRD rnd,rpd,prnd,prpd,anres,apres + labels rnd,rpd,prnd,prpd,anres,apres + calma 66 0 + layer CRE rnw,rp,rnd,rpd,pres,anres,apres + labels rnw,rp,rnd,rpd,pres,anres,apres + calma 64 0 + layer CRF rm1,prm1 + labels rm1,prm1 + calma 71 0 + layer CRS rm2,prm2 + labels rm2,prm2 + calma 72 0 + layer CRT rm3,prm3 + labels rm3,prm3 + calma 73 0 + layer CRQ rm4,prm4 + labels rm4,prm4 + calma 74 0 +#CRE/CRM layer CRM rm1,prm1,rm2,prm2,rm3,prm3,rm4,prm4 +#CRE/CRM calma 70 0 + + layer CX comment + labels comment + calma 63 0 + + layer XP pad,xp + labels pad,xp + calma 26 0 + +end + +cifinput + +style lambda=0.20(p) + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + layer pwell CWP + and-not CTA + labels CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + calma CSN 45 * + + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer ndc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer ndc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer pc CCP + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer pc CCP + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer gc CCP + and-not CPG + and-not CPC + calma CCP 47 * + + layer gc CCP + and-not CM1 + calma CCP 47 * + + layer gc CCA + and-not COP + and-not CAA + and-not CBA + calma CCA 48 * + + layer gc CCA + and-not COP + and-not CM1 + calma CCA 48 * + + layer gc CCC + and-not COP + and-not CPG + and-not CPC + and-not CEL + and-not CAA + and-not CBA + calma CCC 25 * + + layer gc CCC + and-not COP + and-not CM1 + calma CCC 25 * + + layer gc CCE + and-not CPC + and-not CEL + calma CCE 55 * + + layer gc CCE + and-not CM1 + calma CCE 55 * + + layer gv1 CV1 + and-not COP + and-not CM1 + calma CV1 50 * + + layer gv1 CV1 + and-not COP + and-not CM2 + calma CV1 50 * + + layer gv2 CV2 + and-not COP + and-not CM2 + calma CV2 61 * + + layer gv2 CV2 + and-not COP + and-not CM3 + calma CV2 61 * + + layer gv3 CV3 + and-not COP + and-not CM3 + calma CV3 30 * + + layer gv3 CV3 + and-not COP + and-not CM4 + calma CV3 30 * + + layer m2c CV1 + and-not CV2 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer m2c CV1 + and CV2 + and CV3 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer m1 CM1 + and-not CRM + and-not CRF + and-not XP + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer m2 CM2 + and-not CRM + and-not CRS + and-not XP + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer m3c CV2 + and-not CV3 + and-not CV1 + and-not XP + grow 20 + and CM3 + and CM2 + grow 10 + shrink 10 + calma CV2 61 * + + layer m123c CV2 + and-not CV3 + and CV1 + and-not XP + grow 20 + and CM3 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + and-not XP + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer m234c CV3 + + and CV2 + and-not XP + grow 20 + and CM4 + and CM3 + and CM2 + grow 20 + shrink 20 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + and-not XP + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer m4c CV3 + + and-not CV2 + and-not XP + grow 20 + and CM4 + and CM3 + grow 20 + shrink 20 + calma CV3 30 * + + layer pad XP + labels pad + calma XP 26 * + + layer glass COG + and-not COP + and-not XP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + + +style lambda=0.20(s) + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + + ignore CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer nselect CSN + calma CSN 45 * + + layer pselect CSP + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer ndc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer ndc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer pc CCP + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer pc CCP + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer gc CCP + and-not CPG + and-not CPC + calma CCP 47 * + + layer gc CCP + and-not CM1 + calma CCP 47 * + + layer gc CCA + and-not COP + and-not CAA + and-not CBA + calma CCA 48 * + + layer gc CCA + and-not COP + and-not CM1 + calma CCA 48 * + + layer gc CCC + and-not COP + and-not CPG + and-not CPC + and-not CEL + and-not CAA + and-not CBA + calma CCC 25 * + + layer gc CCC + and-not COP + and-not CM1 + calma CCC 25 * + + layer gc CCE + and-not CPC + and-not CEL + calma CCE 55 * + + layer gc CCE + and-not CM1 + calma CCE 55 * + + layer gv1 CV1 + and-not COP + and-not CM1 + calma CV1 50 * + + layer gv1 CV1 + and-not COP + and-not CM2 + calma CV1 50 * + + layer gv2 CV2 + and-not COP + and-not CM2 + calma CV2 61 * + + layer gv2 CV2 + and-not COP + and-not CM3 + calma CV2 61 * + + layer gv3 CV3 + and-not COP + and-not CM3 + calma CV3 30 * + + layer gv3 CV3 + and-not COP + and-not CM4 + calma CV3 30 * + + layer m2c CV1 + and-not CV2 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer m2c CV1 + and CV2 + and CV3 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer m1 CM1 + and-not CRM + and-not CRF + and-not XP + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer m2 CM2 + and-not CRM + and-not CRS + and-not XP + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer m3c CV2 + and-not CV3 + and-not CV1 + and-not XP + grow 20 + and CM3 + and CM2 + grow 10 + shrink 10 + calma CV2 61 * + + layer m123c CV2 + and-not CV3 + and CV1 + and-not XP + grow 20 + and CM3 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + and-not XP + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer m234c CV3 + + and CV2 + and-not XP + grow 20 + and CM4 + and CM3 + and CM2 + grow 20 + shrink 20 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + and-not XP + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer m4c CV3 + + and-not CV2 + and-not XP + grow 20 + and CM4 + and CM3 + grow 20 + shrink 20 + calma CV3 30 * + + layer pad XP + labels pad + calma XP 26 * + + layer glass COG + and-not COP + and-not XP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + + +style lambda=0.20(ps) + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + layer pwell CWP + and-not CTA + labels CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer nselect CSN + calma CSN 45 * + + layer pselect CSP + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer ndc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer ndc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer pc CCP + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer pc CCP + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer gc CCP + and-not CPG + and-not CPC + calma CCP 47 * + + layer gc CCP + and-not CM1 + calma CCP 47 * + + layer gc CCA + and-not COP + and-not CAA + and-not CBA + calma CCA 48 * + + layer gc CCA + and-not COP + and-not CM1 + calma CCA 48 * + + layer gc CCC + and-not COP + and-not CPG + and-not CPC + and-not CEL + and-not CAA + and-not CBA + calma CCC 25 * + + layer gc CCC + and-not COP + and-not CM1 + calma CCC 25 * + + layer gc CCE + and-not CPC + and-not CEL + calma CCE 55 * + + layer gc CCE + and-not CM1 + calma CCE 55 * + + layer gv1 CV1 + and-not COP + and-not CM1 + calma CV1 50 * + + layer gv1 CV1 + and-not COP + and-not CM2 + calma CV1 50 * + + layer gv2 CV2 + and-not COP + and-not CM2 + calma CV2 61 * + + layer gv2 CV2 + and-not COP + and-not CM3 + calma CV2 61 * + + layer gv3 CV3 + and-not COP + and-not CM3 + calma CV3 30 * + + layer gv3 CV3 + and-not COP + and-not CM4 + calma CV3 30 * + + layer m2c CV1 + and-not CV2 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer m2c CV1 + and CV2 + and CV3 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer m1 CM1 + and-not CRM + and-not CRF + and-not XP + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer m2 CM2 + and-not CRM + and-not CRS + and-not XP + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer m3c CV2 + and-not CV3 + and-not CV1 + and-not XP + grow 20 + and CM3 + and CM2 + grow 10 + shrink 10 + calma CV2 61 * + + layer m123c CV2 + and-not CV3 + and CV1 + and-not XP + grow 20 + and CM3 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + and-not XP + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer m234c CV3 + + and CV2 + and-not XP + grow 20 + and CM4 + and CM3 + and CM2 + grow 20 + shrink 20 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + and-not XP + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer m4c CV3 + + and-not CV2 + and-not XP + grow 20 + and CM4 + and CM3 + grow 20 + shrink 20 + calma CV3 30 * + + layer pad XP + labels pad + calma XP 26 * + + layer glass COG + and-not COP + and-not XP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + + +style lambda=0.20() + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + + ignore CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + calma CSN 45 * + + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer ndc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and-not CV1 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and-not CV1 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and-not CV1 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and-not CV1 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer ndc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer ndc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nsc CAA + and CSN + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer nsc CAA + and CSN + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 100 + and-not CTA + and CCA + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCA 48 * + + layer nwsc CAA + and CSN + and CV1 + and CV2 + and-not CV3 + and CWNR + shrink 105 + and-not CTA + and CCC + + and CWN + and CM1 + grow 40 + grow 10 + shrink 10 + calma CCC 25 * + + layer pdc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer pdc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer psc CAA + and CSP + and CCA + and CV1 + and CV2 + and-not CV3 + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCA 48 * + + layer psc CAA + and CSP + and CCC + and CV1 + and CV2 + and-not CV3 + and-not CWNR + and-not CTA + + and-not CPS + and-not CWN + and CM1 + grow 20 + grow 10 + shrink 10 + calma CCC 25 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer pc CCP + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and-not CV1 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer pc CCP + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCP 47 * + + layer pc CCC + and CV1 + and CV2 + and-not CV3 + and CPG + and-not CPC + and-not CEL + and-not CAA + grow 20 + and CM1 + grow 10 + shrink 10 + calma CCC 25 * + + layer gc CCP + and-not CPG + and-not CPC + calma CCP 47 * + + layer gc CCP + and-not CM1 + calma CCP 47 * + + layer gc CCA + and-not COP + and-not CAA + and-not CBA + calma CCA 48 * + + layer gc CCA + and-not COP + and-not CM1 + calma CCA 48 * + + layer gc CCC + and-not COP + and-not CPG + and-not CPC + and-not CEL + and-not CAA + and-not CBA + calma CCC 25 * + + layer gc CCC + and-not COP + and-not CM1 + calma CCC 25 * + + layer gc CCE + and-not CPC + and-not CEL + calma CCE 55 * + + layer gc CCE + and-not CM1 + calma CCE 55 * + + layer gv1 CV1 + and-not COP + and-not CM1 + calma CV1 50 * + + layer gv1 CV1 + and-not COP + and-not CM2 + calma CV1 50 * + + layer gv2 CV2 + and-not COP + and-not CM2 + calma CV2 61 * + + layer gv2 CV2 + and-not COP + and-not CM3 + calma CV2 61 * + + layer gv3 CV3 + and-not COP + and-not CM3 + calma CV3 30 * + + layer gv3 CV3 + and-not COP + and-not CM4 + calma CV3 30 * + + layer m2c CV1 + and-not CV2 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer m2c CV1 + and CV2 + and CV3 + and-not CCC + and-not CCP + and-not CCA + and-not XP + grow 20 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and-not CV2 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCP + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer pm12c CV1 + and CV2 + and CV3 + and CCC + grow 20 + and CM2 + and CM1 + and CPG + grow 10 + shrink 10 + calma CV1 50 * + + layer m1 CM1 + and-not CRM + and-not CRF + and-not XP + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer m2 CM2 + and-not CRM + and-not CRS + and-not XP + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and-not CV2 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and-not CV2 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and-not CV2 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer ndm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer pdm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and-not CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer psm12c CAA + and CSP + and CV1 + and CV2 + and CV3 + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and-not CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCA + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer nwsm12c CAA + and CSN + and CV1 + and CV2 + and CV3 + and CWNR + and-not CTA + and CCC + grow 20 + and CM1 + and CM2 + + and CWN + grow 10 + shrink 10 + calma CV1 50 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer m3c CV2 + and-not CV3 + and-not CV1 + and-not XP + grow 20 + and CM3 + and CM2 + grow 10 + shrink 10 + calma CV2 61 * + + layer m123c CV2 + and-not CV3 + and CV1 + and-not XP + grow 20 + and CM3 + and CM2 + and CM1 + grow 10 + shrink 10 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + and-not XP + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer m234c CV3 + + and CV2 + and-not XP + grow 20 + and CM4 + and CM3 + and CM2 + grow 20 + shrink 20 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + and-not XP + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer m4c CV3 + + and-not CV2 + and-not XP + grow 20 + and CM4 + and CM3 + grow 20 + shrink 20 + calma CV3 30 * + + layer pad XP + labels pad + calma XP 26 * + + layer glass COG + and-not COP + and-not XP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + + +style lambda=0.20(c) + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + + ignore CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + calma CSN 45 * + + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer gc CCA + and CPG + and-not CEL + calma CCA 48 * + + layer gc CCP + and CPG + and-not CEL + calma CCP 47 * + + layer gc CCC + and CPG + and-not CEL + calma CCC 25 * + + layer gc CCE + and CPG + and-not CEL + calma CCE 55 * + + layer gc CCA + and-not COP + and-not CPC + and-not CEL + calma CCA 48 * + + layer gc CCP + and-not COP + and-not CPC + and-not CEL + calma CCP 47 * + + layer gc CCC + and-not COP + and-not CPC + and-not CEL + calma CCC 25 * + + layer gc CCE + and-not COP + and-not CPC + and-not CEL + calma CCE 55 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer m1 CM1 + and-not CRM + and-not CRF + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer gv1 CV1 + calma CV1 50 * + + layer m2 CM2 + and-not CRM + and-not CRS + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer gv2 CV2 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer gv3 CV3 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer xp XP + calma XP 26 * + + layer glass COG + and-not COP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + + +style lambda=0.20(cs) + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + + ignore CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer nselect CSN + calma CSN 45 * + + layer pselect CSP + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer gc CCA + and CPG + and-not CEL + calma CCA 48 * + + layer gc CCP + and CPG + and-not CEL + calma CCP 47 * + + layer gc CCC + and CPG + and-not CEL + calma CCC 25 * + + layer gc CCE + and CPG + and-not CEL + calma CCE 55 * + + layer gc CCA + and-not COP + and-not CPC + and-not CEL + calma CCA 48 * + + layer gc CCP + and-not COP + and-not CPC + and-not CEL + calma CCP 47 * + + layer gc CCC + and-not COP + and-not CPC + and-not CEL + calma CCC 25 * + + layer gc CCE + and-not COP + and-not CPC + and-not CEL + calma CCE 55 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer m1 CM1 + and-not CRM + and-not CRF + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer gv1 CV1 + calma CV1 50 * + + layer m2 CM2 + and-not CRM + and-not CRS + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer gv2 CV2 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer gv3 CV3 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer xp XP + calma XP 26 * + + layer glass COG + and-not COP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + + +style lambda=0.20(cps) + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + layer pwell CWP + and-not CTA + labels CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer nselect CSN + calma CSN 45 * + + layer pselect CSP + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer gc CCA + and CPG + and-not CEL + calma CCA 48 * + + layer gc CCP + and CPG + and-not CEL + calma CCP 47 * + + layer gc CCC + and CPG + and-not CEL + calma CCC 25 * + + layer gc CCE + and CPG + and-not CEL + calma CCE 55 * + + layer gc CCA + and-not COP + and-not CPC + and-not CEL + calma CCA 48 * + + layer gc CCP + and-not COP + and-not CPC + and-not CEL + calma CCP 47 * + + layer gc CCC + and-not COP + and-not CPC + and-not CEL + calma CCC 25 * + + layer gc CCE + and-not COP + and-not CPC + and-not CEL + calma CCE 55 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer m1 CM1 + and-not CRM + and-not CRF + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer gv1 CV1 + calma CV1 50 * + + layer m2 CM2 + and-not CRM + and-not CRS + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer gv2 CV2 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer gv3 CV3 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer xp XP + calma XP 26 * + + layer glass COG + and-not COP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + + +style lambda=0.20(cp) + scalefactor 20 + + layer nwell CWN + and-not CWNR + and-not CTA + labels CWN + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRE + and-not CSB + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer rnw CWN + and-not CWNR + and CRW + and-not CRD + and-not CAA + and-not CPG + calma CWN 42 * + + layer pseudo_rnwell CRW + and-not CRE + calma CRW 65 * + + calma CWNR 91 * + + layer nwr CWND + calma CWND 92 * + + layer pseudo_nwr CRNW + calma CRNW 93 * + + layer pwell CWP + and-not CTA + labels CWP + calma CWP 41 * + + layer diff CAA + and-not CTA + and-not CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + layer tran CAA + and-not CTA + and CPG + and-not CWNR + and-not COP + and-not CSN + and-not CSP + labels CAA + calma CAA 43 * + + calma CSN 45 * + + calma CSP 44 * + + layer ndiff CAA + and CSN + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRE + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer rnd CAA + and CSN + and-not CWNR + and CRD + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rndiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and-not CWN + and-not CSP + and CSN + and-not CBA + calma CRD 66 * + + layer pdiff CAA + and CSP + and-not CWNR + and-not CTA + and-not CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRE + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer rpd CAA + and CSP + and-not CWNR + and CRD + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CAA 43 * + + layer pseudo_rpdiff CRD + and-not CRE + and-not CAA + and-not CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + calma CRD 66 * + + layer nfet CAA + and CSN + and-not CWNR + and-not CTA + and CPG + and-not CEL + and-not CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer pfet CAA + and CSP + and-not CWNR + and-not CTA + and CPG + and-not CEL + and CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nsd CAA + and CSN + and-not CWNR + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer psd CAA + and CSP + and-not CWNR + and-not CTA + and-not CWN + and-not CSN + and-not CPS + and CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer nwsd CAA + and CSN + and CWNR + shrink 100 + and-not CTA + and CWN + and-not CSP + and-not CBA + labels CAA + calma CAA 43 * + + layer gc CCA + and CPG + and-not CEL + calma CCA 48 * + + layer gc CCP + and CPG + and-not CEL + calma CCP 47 * + + layer gc CCC + and CPG + and-not CEL + calma CCC 25 * + + layer gc CCE + and CPG + and-not CEL + calma CCE 55 * + + layer gc CCA + and-not COP + and-not CPC + and-not CEL + calma CCA 48 * + + layer gc CCP + and-not COP + and-not CPC + and-not CEL + calma CCP 47 * + + layer gc CCC + and-not COP + and-not CPC + and-not CEL + calma CCC 25 * + + layer gc CCE + and-not COP + and-not CPC + and-not CEL + calma CCE 55 * + + layer poly CPG + and-not CRE + labels CPG + calma CPG 46 * + + layer rp CPG + and CRE + and-not CSB + calma CPG 46 * + + layer rp CPG + and CRG + calma CPG 46 * + + layer pseudo_rpoly CRG + and-not CRE + calma CRG 67 * + + layer m1 CM1 + and-not CRM + and-not CRF + labels CM1 + calma CM1 49 * + + layer rm1 CRM + and CM1 + calma CRM 70 * + + layer rm1 CRF + and CM1 + calma CRF 71 * + + layer pseudo_rmetal1 CRF + and-not rm1 + calma CRF 71 * + + layer m1p CMFP + labels CMFP + calma CMFP 81 * + + layer gv1 CV1 + calma CV1 50 * + + layer m2 CM2 + and-not CRM + and-not CRS + labels CM2 + calma CM2 51 * + + layer rm2 CRM + and CM2 + calma CRM 70 * + + layer rm2 CRS + and CM2 + calma CRS 72 * + + layer pseudo_rmetal2 CRS + and-not rm2 + calma CRS 72 * + + layer m2p CMSP + labels CMSP + calma CMSP 82 * + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + + layer gv2 CV2 + calma CV2 61 * + + layer m3 CM3 + and-not CRM + and-not CRT + labels CM3 + calma CM3 62 * + + layer rm3 CRM + and CM3 + calma CRM 70 * + + layer rm3 CRT + and CM3 + calma CRT 73 * + + layer pseudo_rmetal3 CRT + and-not rm3 + calma CRT 73 * + + layer m3p CMTP + labels CMTP + calma CMTP 83 * + + layer gv3 CV3 + calma CV3 30 * + + layer m4 CM4 + and-not CRM + and-not CRQ + labels CM4 + calma CM4 31 * + + layer rm4 CRM + and CM4 + calma CRM 70 * + + layer rm4 CRQ + and CM4 + calma CRQ 74 * + + layer pseudo_rmetal4 CRQ + and-not rm4 + calma CRQ 74 * + + layer m4p CMQP + labels CMQP + calma CMQP 84 * + + layer xp XP + calma XP 26 * + + layer glass COG + and-not COP + labels COG + calma COG 52 * + + layer nfi CFI + and CWN + labels CFI + calma CFI 27 * + + layer pfi CFI + and-not CWN + labels CFI + calma CFI 27 * + + layer sb CSB + and-not CWNR + labels CSB + calma CSB 29 * + + layer pres CPG + and CSB + calma CPG 46 * + + layer anres CAA + and CSN + and-not CWNR + and-not CTA + and CSB + and-not CPG + and-not CWN + and-not CSP + and-not CBA + calma CAA 43 * + + layer apres CAA + and CSP + and-not CWNR + and-not CTA + and CSB + and-not CPG + and CWN + and-not CSN + and-not CPS + and-not CBA + calma CAA 43 * + + layer comment CX + labels CX + calma CX 63 * + + calma CTA 60 * + +#CRE/CRM + calma CRW 65 * + calma CRG 67 * + calma CRD 66 * + calma CRE 64 * + calma CRF 71 * + calma CRS 72 * + calma CRT 73 * + calma CRQ 74 * + calma CRM 70 * + +style fill-only + scalefactor 20 +# scalefactor 100 + + layer fp 100 + calma 100 100 * + + layer fm1 101 + calma 101 101 * + + layer fm2 102 + calma 102 102 * + + layer fm3 103 + calma 103 103 * + + layer fm4 104 + calma 104 104 * + + layer fa 109 + or fb + calma 109 109 * + + layer fn 119 + calma 119 119 * + + layer fapm 110 + calma 110 110 * + +end + +mzrouter + style irouter +# layer hCost vCost jogCost hintCost + layer metal4 2 1 2 1 + layer metal3 1 2 2 1 + layer metal2 2 1 2 1 + layer metal1 2 3 2 1 + layer poly 10 10 11 1 + contact m4contact metal4 metal3 4 + contact m3contact metal3 metal2 5 + contact m2contact metal2 metal1 6 + contact pcontact metal1 poly 7 + notactive poly pcontact + +style garouter + layer m2 32 64 256 1 + layer m1 64 32 256 1 + contact m2contact metal1 metal2 1024 + +end + +drc + width nwell 12 \ + "N-well width < 12 (Mosis #1.1)" + + width rnw 12 \ + "rnwell (for resistor L/W extraction) width < 12 (Mosis #1.1)" + + width nwr 12 \ + "nwr (for Fig1b resistor L/W extraction) width < 12 (Mosis #Fig1bX)" + + width pwell 12 \ + "P-well width < 12 (Mosis #1.1)" + + width diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a 3 \ + "Diffusion width < 3 (Mosis #2.1)" + + edge4way nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a pdiff,apres,rpd,pdc/a,pdm12c/a 3 ~(nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a)/active pdiff,apres,rpd,pdc/a,pdm12c/a 3 \ + "P-Diffusion width in N-Ohmic < 3 (Mosis #2.1)" active + + edge4way psd,psc/a,psm12c/a ndiff,anres,rnd,ndc/a,ndm12c/a 3 ~(psd,psc/a,psm12c/a)/active ndiff,anres,rnd,ndc/a,ndm12c/a 3 \ + "N-Diffusion width in P-Ohmic < 3 (Mosis #2.1)" active + + edge4way pdiff,apres,rpd,pdc/a,pdm12c/a nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 3 ~(pdiff,apres,rpd,pdc/a,pdm12c/a)/active nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 3 \ + "N-Ohmic width in P-Diffusion < 3 (Mosis #2.1)" active + + edge4way ndiff,anres,rnd,ndc/a,ndm12c/a psd,psc/a,psm12c/a 3 ~(ndiff,anres,rnd,ndc/a,ndm12c/a)/active psd,psc/a,psm12c/a 3 \ + "P-Ohmic width in N-Diffusion < 3 (Mosis #2.1)" active + + width poly,fp,pres,rp,pc/a,pm12c/a,nfet,pfet,fet 2 \ + "Poly width < 2 (Mosis #3.1)" + + width nselect 3 \ + "N-Select width < 3 (Mosis #4.4)" + + width pselect 3 \ + "P-Select width < 3 (Mosis #4.4)" + + width ndiff,anres,rnd,ndc/a,ndm12c/a,nsd,nsc/a,nsm12c/a 3 \ + "N-Diffusion,N-Ohmic width < 3 (Mosis #4.4)" + + width pdiff,apres,rpd,pdc/a,pdm12c/a,psd,psc/a,psm12c/a 3 \ + "P-Diffusion,P-Ohmic width < 3 (Mosis #4.4)" + + width pc/m1 4 \ + "Poly contact width < 4 (Mosis #5.1)" + + width pm12c/m1 4 \ + "Poly contact width < 4 (Mosis #5.1)" + + width gc 2 \ + "GC contact width < 2 (Mosis #6.1)" + + width ndc/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width ndm12c/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width nsc/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width nwsc/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width nsm12c/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width nwsm12c/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width nwsc 6 \ + "nwr (for Fig1b resistor) active Contact width < 6 (Mosis #Fig1b)" + + width pdc/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width pdm12c/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width psc/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width psm12c/m1 4 \ + "Diffusion contact width < 4 (Mosis #6.1)" + + width m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 3 \ + "Metal1 width < 3 (Mosis #7.1)" + + width gv1 2 \ + "GV1 via width < 2 (Mosis #8.1)" + + width m2c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width pdm12c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width ndm12c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width psm12c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width nsm12c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width pm12c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width m123c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width nwsm12c/m1 4 \ + "Metal2 contact width < 4 (Mosis #8.1)" + + width m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 3 \ + "Metal2 width < 3 (Mosis #9.1)" + + width gv2 2 \ + "GV2 via width < 2 (Mosis #14.1)" + + width m3c/m2 4 \ + "Metal3 contact width < 4 (Mosis #14.1)" + + width m123c/m2 4 \ + "Metal3 contact width < 4 (Mosis #14.1)" + + width m234c/m2 4 \ + "Metal3 contact width < 4 (Mosis #14.1)" + + width m3,fm3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 3 \ + "Metal3 width < 3 (Mosis #15.1)" + + width sb,pres,anres,apres 4 \ + "Silicide-Block width < 4 (Mosis #20.1)" + + width pres 5 \ + "Silicide-Block polyR width < 5 (Mosis #20.6)" + + width anres,apres 6 \ + "Silicide-Block activeR width < 6 (Mosis #20.16)" + + width gv3 2 \ + "GV3 via width < 2 (Mosis #21.3)" + + width m4c/m3 4 \ + "Metal4 contact width < 4 (Mosis #21.3)" + + width m234c/m3 4 \ + "Metal4 contact width < 4 (Mosis #21.3)" + + width m4,fm4,rm4,m4c/m4,m234c/m4,pad 3 \ + "Metal4 width < 3 (Mosis #22.1)" + + width nfi,pfi 4 \ + "N/P_field-implant width < 4 (Mosis #29.1)" + + spacing nwell nwell 6 touching_ok \ + "N-well(at-same-potential) spacing < 6 (Mosis #1.3)" + + spacing pwell pwell 6 touching_ok \ + "P-well(at-same-potential) spacing < 6 (Mosis #1.3)" + + spacing rnw nwell 18 touching_illegal \ + "rnw (for resistor L/W extraction) spacing to N-well < 18 (Mosis #2.3)" + + spacing nwr nwell 18 touching_illegal \ + "nwr (for Fig1b resistor L/W extraction) spacing to N-well < 18 (Mosis #2.3)" + + edge4way ~(pwell)/well pwell 1 ~(rnw)/active 0 0 \ + "P-well cannot touch rnw (for resistor L/W extraction) (Mosis #1.4)" active + + edge4way ~(pwell)/well pwell 1 ~(nwr)/active 0 0 \ + "P-well cannot touch nwr (for Fig1b resistor L/W extraction) (Mosis #1.4)" active + + spacing diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a 3 touching_ok \ + "Diffusion spacing < 3 (Mosis #2.2)" + + spacing nwell ndiff,anres,rnd,nfet,ndc/a,ndm12c/a 6 touching_illegal \ + "N-well spacing to N-Diffusion < 6 (Mosis #2.3)" + + spacing pwell pdiff,apres,rpd,pfet,pdc/a,pdm12c/a 6 touching_illegal \ + "P-well spacing to P-Diffusion < 6 (Mosis #2.3)" + + spacing ndiff,anres,rnd,nfet,ndc/a,ndm12c/a pdiff,apres,rpd,pfet,pdc/a,pdm12c/a 12 touching_illegal \ + "N-Diffusion spacing to P-Diffusion < 12 (Mosis #2.3+2.3)" + + edge4way ~(nwell)/well nwell 6 ~(pdiff,apres,rpd,pfet,pdc/a,pdm12c/a)/active nwell 6 \ + "N-well overlap of P-Diffusion < 6 (Mosis #2.4)" active + + edge4way ~(pwell)/well pwell 6 ~(ndiff,anres,rnd,nfet,ndc/a,ndm12c/a)/active pwell 6 \ + "P-well overlap of N-Diffusion < 6 (Mosis #2.4)" active + + edge4way ~(nwell)/well nwell 3 ~(nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a)/active nwell 3 \ + "N-well overlap of N-Ohmic < 3 (Mosis #2.4)" active + + edge4way ~(pwell)/well pwell 3 ~(psd,psc/a,psm12c/a)/active pwell 3 \ + "P-well overlap of P-Ohmic < 3 (Mosis #2.4)" active + + spacing ndiff,anres,rnd,ndc/a,ndm12c/a nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 9 touching_illegal \ + "N-Diffusion spacing to N-Ohmic < 9 (Mosis #2.3+2.4)" + + spacing pdiff,apres,rpd,pdc/a,pdm12c/a psd,psc/a,psm12c/a 9 touching_illegal \ + "P-Diffusion spacing to P-Ohmic < 9 (Mosis #2.3+2.4)" + + spacing nwell psd,psc/a,psm12c/a 3 touching_illegal \ + "N-well spacing to P-Ohmic < 3 (Mosis #2.4)" + + spacing pwell nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 3 touching_illegal \ + "P-well spacing to N-Ohmic < 3 (Mosis #2.4)" + + spacing psd,psc/a,psm12c/a rnw,prnw 3 touching_illegal \ + "P-Ohmic spacing to rnw,prnw < 3 (Mosis #2.4)" + + spacing psd,psc/a,psm12c/a nwr,pnwr 3 touching_illegal \ + "P-Ohmic spacing to nwr,pnwr (for Fig1b Resistor) < 3 (Mosis #2.4)" + + spacing nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a psd,psc/a,psm12c/a 6 touching_illegal \ + "N-Ohmic spacing to P-Ohmic < 6 (Mosis #2.4+2.4)" + + spacing ndiff,anres,rnd,nfet,ndc/a,ndm12c/a,nfet psd,psc/a,psm12c/a 4 touching_ok \ + "N-Diffusion spacing to P-Ohmic < 4 (Mosis #2.5)" + + spacing pdiff,apres,rpd,pfet,pdc/a,pdm12c/a,pfet nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 4 touching_ok \ + "P-Diffusion spacing to N-Ohmic < 4 (Mosis #2.5)" + + spacing poly,pres,rp,pc/a,pm12c/a,nfet,pfet,fet poly,pres,rp,pc/a,pm12c/a,nfet,pfet,fet 3 touching_ok \ + "Poly spacing < 3 (Mosis #3.2)" + + spacing poly,pres,rp,pc/a,pm12c/a,nfet,pfet,fet fp,fapm 3 touching_illegal \ + "Poly spacing to fill layer (fp) < 3 (Mosis #3.2)" + + spacing fp fp 4 touching_ok \ + "Poly fill layer (fp) spacing < 4 (Mosis #0)" + + edge4way nfet,pfet,fet space/active,poly,fp,pres,rp,pc/a,pm12c/a 2 poly,fp,pres,rp,pc/a,pm12c/a 0 0 \ + "Poly overhang of Transistor < 2 (Mosis #3.3)" active + + edge4way nfet,pfet,fet space/active,ndiff,anres,rnd,ndc/a,ndm12c/a,pdiff,apres,rpd,pdc/a,pdm12c/a 3 ndiff,anres,rnd,ndc/a,ndm12c/a,pdiff,apres,rpd,pdc/a,pdm12c/a,nfet,pfet,fet 0 0 \ + "N-Diffusion,P-Diffusion overhang of Transistor < 3 (Mosis #3.4)" active + + edge4way poly,fp,rp,pc/a,pm12c/a ~(poly,fp,pres,rp,pc/a,pm12c/a,nfet,pfet,fet,prp)/active 1 space space 1 \ + "Poly spacing to Diffusion < 1 (Mosis #3.5)" + + edge4way nfet ~(nfet)/active 2 ~(pselect)/select ~(nfet)/active 2 \ + "N-Transistor space to P-Select < 2 (Mosis #4.1)" select + + edge4way pfet ~(pfet)/active 2 ~(nselect)/select ~(pfet)/active 2 \ + "P-Transistor space to N-Select < 2 (Mosis #4.1)" select + + edge4way nfet ~(nfet)/active 3 ~(psd,psc/a,psm12c/a)/active ~(nfet)/active 2 \ + "N-Transistor space to P-Ohmic < 3 (Mosis #4.1)" active + + edge4way pfet ~(pfet)/active 3 ~(nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a)/active ~(pfet)/active 2 \ + "P-Transistor space to N-Ohmic < 3 (Mosis #4.1)" active + +#PEZ edge4way psd,psc/a,psm12c/a space ~(nfet)/active space \ +#PEZ "P-Ohmic space to N-Transistor < (Mosis #4.1)" active + +#PEZ edge4way nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a space ~(pfet)/active space \ +#PEZ "N-Ohmic space to P-Transistor < (Mosis #4.1)" active + + edge4way ~(nselect,pselect)/select nselect,pselect 2 ~(diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a)/active nselect,pselect 2 \ + "N-Select,P-Select overlap of Diffusion < 2 (Mosis #4.2_)" active + + edge4way space nselect,pselect 2 ~(ndiff,anres,rnd,nfet,ndc/a,ndm12c/a)/active nselect 2 \ + "N-Select space to N-Diffusion < 2 (Mosis #4.2a)" active + + edge4way nselect,pselect space 2 ~(ndiff,anres,rnd,nfet,ndc/a,ndm12c/a)/active nselect 2 \ + "N-Select space to N-Diffusion < 2 (Mosis #4.2b)" active + + edge4way nselect,pselect space 2 ~(ndiff,anres,rnd,nfet,ndc/a,ndm12c/a)/active space,nselect,pselect 2 \ + "N-Select space to N-Diffusion < 2 (Mosis #4.2c)" active + + edge4way space nselect,pselect 2 ~(pdiff,apres,rpd,pfet,pdc/a,pdm12c/a)/active pselect 2 \ + "P-Select space to P-Diffusion < 2 (Mosis #4.2aa)" active + + edge4way nselect,pselect space 2 ~(pdiff,apres,rpd,pfet,pdc/a,pdm12c/a)/active pselect 2 \ + "P-Select space to P-Diffusion < 2 (Mosis #4.2bb)" active + + edge4way nselect,pselect space 2 ~(pdiff,apres,rpd,pfet,pdc/a,pdm12c/a)/active space,nselect,pselect 2 \ + "P-Select space to P-Diffusion < 2 (Mosis #4.2cc)" active + + area nsd,nwsd,psd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,psc/a,psm12c/a 16 3 \ + "Ohmic-Diffusion area < 16 (Mosis #+++)" + + edge4way diff space 2 nselect space 2 \ + "N-Select must overlap Diffusion by 2 (Mosis #4.2)" select + + edge4way diff space 2 pselect space 2 \ + "P-Select must overlap Diffusion by 2 (Mosis #4.2)" select + + edge4way ndiff,anres,rnd,nfet,ndc/a,ndm12c/a space 2 ~(pselect)/select space 2 \ + "P-Select space to N-Diffusion < 2 (Mosis #4.2e)" select + + edge4way pdiff,apres,rpd,pfet,pdc/a,pdm12c/a space 2 ~(nselect)/select space 2 \ + "N-Select space to P-Diffusion < 2 (Mosis #4.2e)" select + + edge4way ~(pdiff,apres,rpd,pfet,pdc/a,pdm12c/a,psd,psc/a,psm12c/a)/active pdiff,apres,rpd,pfet,pdc/a,pdm12c/a,psd,psc/a,psm12c/a 1 ~(nselect)/select 0 0 \ + "N-Select cannot touch P-Diffusion,P-Ohmic (Mosis #4.2f)" select + + edge4way ~(ndiff,anres,rnd,nfet,ndc/a,ndm12c/a,nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a)/active ndiff,anres,rnd,nfet,ndc/a,ndm12c/a,nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 1 ~(pselect)/select 0 0 \ + "P-Select cannot touch N-Diffusion,N-Ohmic (Mosis #4.2f)" select + + spacing nselect nselect 3 touching_ok \ + "N-Select spacing < 3 (Mosis #4.4)" + + spacing pselect pselect 3 touching_ok \ + "P-Select spacing < 3 (Mosis #4.4)" + + edge4way ndiff,anres,rnd,ndc/a,ndm12c/a psd,psc/a,psm12c/a 2 ~(ndiff,anres,rnd,ndc/a,ndm12c/a)/active 0 0 \ + "P-Ohmic(that touches N-Diffusion) width < 2 (Mosis #4.4)" + + edge4way pdiff,apres,rpd,pdc/a,pdm12c/a nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 2 ~(pdiff,apres,rpd,pdc/a,pdm12c/a)/active 0 0 \ + "N-Ohmic(that touches P-Diffusion) width < 2 (Mosis #4.4)" + + edge4way gc ~(gc)/contact 1 poly,fp,pres,rp,pc/a,pm12c/a,diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a ~(gc)/contact 1 \ + "Poly,Diffusion overlap of GC contact < 1 (Mosis #5.2)" active + + edge4way ~(nwsd)/active nwsd 2 ~(gc)/contact nwsd 2 \ + "nwr (for Fig1b resistor) active overlap of GC contact < 2 (Mosis #Fig1b)" contact + + spacing nwr gc 5 touching_illegal \ + "nwr (for Fig1b resistor) spacing to GC contact < 5 (Mosis #Fig1b)" + + spacing nwr ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 3 touching_illegal \ + "nwr (for Fig1b resistor) spacing to Diffusion contact < 3 (Mosis #Fig1b)" + + edge4way gc space 1 poly,fp,pres,rp,pc/a,pm12c/a,diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a space 1 \ + "one of: Poly,Diffusion must overlap GC contact by 1 (Mosis #5.2a,6.2a)" active + + edge4way ~(poly,fp,pres,rp,pc/a,pm12c/a,diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a)/active poly,fp,pres,rp,pc/a,pm12c/a,diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a 1 ~(gc)/contact 0 0 \ + "Edge to one of: Poly,Diffusion cannot touch GC contact (Mosis #5.2a,6.2a)" contact + + spacing gc gc 3 touching_ok \ + "Generic contact spacing < 3 (Mosis #5.3)" + + edge4way ~(gc)/contact gc 1 ~(ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1)/metal1 0 0 \ + "GC contact cannot touch Metal1 contacts (Mosis #0)" metal1 + + spacing gv1 m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2 2 touching_illegal \ + "GV1 via spacing to Metal2 contacts < 2 (Mosis #14.2)" + +#PSC spacing poly,fp,pres,rp,pc/a,pm12c/a pc/a,pm12c/a 4 touching_ok \ +#PSC "Poly spacing to Poly contact < 4 (Mosis #5.5.b)" + + edge4way gc ~(gc)/contact 1 diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,poly,fp,pres,rp,pc/a,pm12c/a ~(gc)/contact 1 \ + "Diffusion,Poly overlap of GC contact < 1 (Mosis #6.2)" active + + spacing gc pc/a,pm12c/a,ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 2 touching_illegal \ + "Generic contact spacing to Poly contact,Diffusion contact < 2 (Mosis #5.3)" + + spacing nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1 pdc/m1,pdm12c/m1 1 touching_illegal \ + "nsc spacing to pdc < 1 (Mosis #6.3)" + + spacing psc/m1,psm12c/m1 ndc/m1,ndm12c/m1 1 touching_illegal \ + "psc spacing to ndc < 1 (Mosis #6.3)" + + spacing pdm12c/m1 pdc/m1,m2c/m1,nsm12c/m1 1 touching_illegal \ + "pdm12c spacing to pdc or m2c or nsm12c < 1 (Mosis #6.3)" + + spacing psm12c/m1 psc/m1,m2c/m1 1 touching_illegal \ + "psm12c spacing to psc or m2c < 1 (Mosis #6.3)" + + spacing ndm12c/m1 ndc/m1,m2c/m1,nsm12c/m1 1 touching_illegal \ + "ndm12c spacing to ndc or m2c or nsm12c < 1 (Mosis #6.3)" + + spacing nsm12c/m1 nsc/m1,m2c/m1 1 touching_illegal \ + "nsm12c spacing to nsc or m2c < 1 (Mosis #6.3)" + + spacing pm12c/m1 pc/m1,m2c/m1 1 touching_illegal \ + "pm12c spacing to pc or m2c < 1 (Mosis #6.3)" + + spacing m123c/m2 pdm12c/m2,psm12c/m2,ndm12c/m2,nsm12c/m2,pm12c/m2,m2c/m2,m3c/m2 1 touching_illegal \ + "m123c spacing to *m12c or m2c or m3c < 1 (Mosis #6.3)" + + spacing m234c/m3 m3c/m3,m4c/m3,m123c/m3 1 touching_illegal \ + "m234c spacing to m3c or m4c or m123c < 1 (Mosis #6.3)" + + spacing nfet,pfet ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 1 touching_illegal \ + "N-Transistor,P-Transistor spacing to Diffusion contact < 1 (Mosis #6.4)" + + spacing nfet,pfet gc 2 touching_illegal \ + "N-Transistor,P-Transistor spacing to Generic contact < 2 (Mosis #6.4)" + + spacing diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a pc/a,pm12c/a 1 touching_illegal \ + "Diffusion spacing to Poly contact < 1 (Mosis #6.5.b)" + + spacing diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nfet,pfet ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 4 touching_ok \ + "Diffusion spacing to Diffusion contact < 4 (Mosis #6.5.b)" + + spacing pc/a,pm12c/a ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 2 touching_illegal \ + "pc/a,pm12c/a spacing to ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a < 2 (Mosis #6.7)" + + spacing m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 3 touching_ok \ + "Metal1 spacing < 3 (Mosis #7.2)" + + spacing m1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 fm1,fapm 3 touching_illegal \ + "Metal1 spacing to fill layer (fm1) < 3 (Mosis #7.2)" + + spacing fm1 fm1 4 touching_ok \ + "Metal1 fill layer (fm1) spacing < 4 (Mosis #0)" + + edge4way gc space 1 m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 space 1 \ + "Metal1 must overlap GC contact by 1 (Mosis #7.3,7.4)" metal1 + + edge4way ~(m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1)/metal1 m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 1 ~(gc)/contact 0 0 \ + "Metal1(edge) cannot touch GC contact (Mosis #7.3+7.4)" contact + + spacing gv1 gv1 3 touching_ok \ + "GV1 via spacing < 3 (Mosis #8.2)" + + edge4way gv1 ~(gv1)/via1 1 m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 ~(gv1)/via1 1 \ + "Metal1 overlap of GV1 via < 1 (Mosis #8.3)" metal1 + + edge4way gv1 space 1 m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 space 1 \ + "Metal1 must overlap GV1 via by 1 (Mosis #8.3)" metal1 + + edge4way ~(m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1)/metal1 m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 1 ~(gv1)/via1 0 0 \ + "Metal1(edge) cannot touch GV1 via (Mosis #8.3)" via1 + + spacing m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 3 touching_ok \ + "Metal2 spacing < 3 (Mosis #9.2)" + + spacing m2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 fm2,fapm 3 touching_illegal \ + "Metal2 spacing to fill layer (fm2) < 3 (Mosis #9.2)" + + spacing fm2 fm2 4 touching_ok \ + "Metal2 fill layer (fm2) spacing < 4 (Mosis #0)" + + edge4way gv1 space 1 m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 space 1 \ + "Metal2 must overlap GV1 via by 1 (Mosis #9.3)" metal2 + + edge4way ~(m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2)/metal2 m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 1 ~(gv1)/via1 0 0 \ + "Metal2(edge) cannot touch GV1 via (Mosis #9.3)" via1 + + width glass 10 \ + "COG width < 10 (Mosis #10.2)" + + edge4way ~(pad)/metal4 pad 30 ~(glass)/oxide pad 30 \ + "pad overlap of COG < 30 (Mosis #10.3)" oxide + + spacing gv2 gv2 3 touching_ok \ + "GV2 via spacing < 3 (Mosis #14.2)" + + spacing gv2 m3c/m2,m123c/m2,m234c/m2 2 touching_illegal \ + "GV2 via spacing to Metal3 contact < 2 (Mosis #14.2)" + + edge4way gv2 space 1 m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 space 1 \ + "Metal2 must overlap GV2 via by 1 (Mosis #14.3)" metal2 + + edge4way ~(m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2)/metal2 m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 1 ~(gv2)/via2 0 0 \ + "Metal2(edge) cannot touch GV2 via (Mosis #14.3)" via2 + + spacing m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 3 touching_ok \ + "Metal3 spacing < 3 (Mosis #15.2)" + + spacing m3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 fm3,fapm 3 touching_illegal \ + "Metal3 spacing to fill layer (fm3) < 3 (Mosis #15.2)" + + spacing fm3 fm3 4 touching_ok \ + "Metal3 fill layer (fm3) spacing < 4 (Mosis #0)" + + edge4way gv2 space 1 m3,fm3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 space 1 \ + "Metal3 must overlap GV2 via by 1 (Mosis #15.3)" metal3 + + edge4way ~(m3,fm3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3)/metal3 m3,fm3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 1 ~(gv2)/via2 0 0 \ + "Metal3(edge) cannot touch GV2 via (Mosis #15.3)" via2 + + spacing sb,pres,anres,apres sb,pres,anres,apres 4 touching_ok \ + "Silicide-Block spacing < 4 (Mosis #20.2)" + + spacing sb,pres,anres,apres,pres,anres,apres pc/a,pm12c/a,ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 1 touching_illegal \ + "Silicide-Block spacing to Diffusion contact,Poly contact < 1 (Mosis #20.3)" + + spacing sb,pres,anres,apres,pres,anres,apres gc 2 touching_illegal \ + "Silicide-Block spacing to GC contact < 2 (Mosis #20.3)" + + edge4way sb,pres,anres,apres space 2 ~(diff,ndiff,anres,rnd,nfet,nsd,nwsd,pdiff,apres,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a)/active 0 2 \ + "Silicide-Block space to Diffusion < 2 (Mosis #20.4)" active + + spacing sb,pres,anres,apres,pres poly,fp,pres,rp,pc/a,pm12c/a 2 touching_ok \ + "Silicide-Block spacing to other Poly < 2 (Mosis #20.5)" + + edge4way sb,pres,anres,apres space 2 ~(poly,fp,pres,rp,pc/a,pm12c/a)/contact sb,pres,anres,apres 2 \ + "Silicide-Block space to Poly < 2 (Mosis #20.5x)" contact + + spacing sb,pres,anres,apres,pres nfet,pfet,fet 2 touching_ok \ + "Silicide-Block spacing to other Transistor < 2 (Mosis #20.5)" + + edge4way sb,pres,anres,apres space 2 ~(nfet,pfet,fet)/contact sb,pres,anres,apres 2 \ + "Silicide-Block space to Transistor < 2 (Mosis #20.5x)" contact + + spacing pres pres 7 touching_ok \ + "Silicide-Block polyR spacing < 7 (Mosis #20.13)" + + edge4way pres,anres,apres space/active,sb 2 sb sb 2 \ + "Silicide-Block overlap of Silicide-Block polyR/activeR < 2 (Mosis #20.15)" + + edge4way sb,pres,anres,apres diff,ndiff,rnd,nfet,nsd,nwsd,pdiff,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a 3 diff,ndiff,rnd,nfet,nsd,nwsd,pdiff,rpd,pfet,psd,ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a 0 0 \ + "Diffusion overhang of Silicide-Block < 3 (Mosis #20.17) + + spacing gv3 gv3 3 touching_ok \ + "GV3 via spacing < 3 (Mosis #21.2)" + + spacing gv3 m4c/m3,m234c/m3 2 touching_illegal \ + "GV3 via spacing to Metal4 contact < 2 (Mosis #21.2)" + + edge4way gv3 space 1 m3,fm3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 space 1 \ + "Metal3 must overlap GV3 via by 1 (Mosis #21.3)" metal3 + + edge4way ~(m3,fm3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3)/metal3 m3,fm3,rm3,m3c/m3,m123c/m3,m234c/m3,m4c/m3 1 ~(gv3)/via3 0 0 \ + "Metal3(edge) cannot touch GV3 via (Mosis #21.3)" via3 + + spacing m4,rm4,m4c/m4,m234c/m4,pad m4,rm4,m4c/m4,m234c/m4,pad 3 touching_ok \ + "Metal4 spacing < 3 (Mosis #22.2)" + + spacing m4,rm4,m4c/m4,m234c/m4,pad fm4,fapm 3 touching_illegal \ + "Metal4 spacing to fill layer (fm4) < 3 (Mosis #22.2)" + + spacing fm4 fm4 4 touching_ok \ + "Metal4 fill layer (fm4) spacing < 4 (Mosis #0)" + + edge4way gv3 space 1 m4,fm4,rm4,m4c/m4,m234c/m4,pad space 1 \ + "Metal4 must overlap GV3 via by 1 (Mosis #22.3)" metal4 + + edge4way ~(m4,fm4,rm4,m4c/m4,m234c/m4,pad)/metal4 m4,fm4,rm4,m4c/m4,m234c/m4,pad 1 ~(gv3)/via3 0 0 \ + "Metal4(edge) cannot touch GV3 via (Mosis #22.3)" via3 + + spacing nfi nfi 4 touching_ok \ + "N_field-implant spacing < 4 (Mosis #35.2)" + + spacing pfi pfi 4 touching_ok \ + "P_field-implant spacing < 4 (Mosis #35.2)" + + spacing nfi pfi 4 touching_illegal \ + "N_field-implant spacing to P_field-implant < 4 (Mosis #35.2)" + + spacing nwell,pdiff,apres,rpd,pfet,pdc/a,pdm12c/a pfi 4 touching_illegal \ + "N-well,P-Diffusion spacing to P_field-implant < 4 (Mosis #2.1)" + + spacing pwell,ndiff,anres,rnd,nfet,ndc/a,ndm12c/a nfi 4 touching_illegal \ + "P-well,N-Diffusion spacing to N_field-implant < 4 (Mosis #2.1)" + + edge4way ~(nwell)/well nwell 4 ~(nfi)/implant nwell 4 \ + "N-well overlap of N_field-implant < 4 (Mosis #21.2)" implant + + edge4way ~(pwell)/well pwell 4 ~(pfi)/implant pwell 4 \ + "P-well overlap of P_field-implant < 4 (Mosis #21.2)" implant + + spacing fa fapm 4 touching_illegal \ + "fill layer fa spacing to fill layer fapm < 4 (Mosis #0)" + + width fa 10 \ + "filla width < 10 (Mosis #0)" + + width fapm 10 \ + "fillapm width < 10 (Mosis #0)" + + width fp 10 \ + "fillp width < 10 (Mosis #0)" + + width fm1 10 \ + "fillm1 width < 10 (Mosis #0)" + + width fm2 10 \ + "fillm2 width < 10 (Mosis #0)" + + width fm3 10 \ + "fillm3 width < 10 (Mosis #0)" + + width fm4 10 \ + "fillm4 width < 10 (Mosis #0)" + + edge4way fa ~(fa)/fill 1 ~(fa)/fill (~(fa),fa)/fill 1 \ + "Contact not rectangular (Magic rule)" + + edge4way fb ~(fb)/fill 1 ~(fb)/fill (~(fb),fb)/fill 1 \ + "Contact not rectangular (Magic rule)" + + edge4way fapm ~(fapm)/active 1 ~(fapm)/active (~(fapm),fapm)/active 1 \ + "Contact not rectangular (Magic rule)" + + edge4way fp ~(fp)/active 1 ~(fp)/active (~(fp),fp)/active 1 \ + "Contact not rectangular (Magic rule)" + + edge4way fm1 ~(fm1)/metal1 1 ~(fm1)/metal1 (~(fm1),fm1)/metal1 1 \ + "Contact not rectangular (Magic rule)" + + edge4way fm2 ~(fm2)/metal2 1 ~(fm2)/metal2 (~(fm2),fm2)/metal2 1 \ + "Contact not rectangular (Magic rule)" + + edge4way fm3 ~(fm3)/metal3 1 ~(fm3)/metal3 (~(fm3),fm3)/metal3 1 \ + "Contact not rectangular (Magic rule)" + + edge4way fm4 ~(fm4)/metal4 1 ~(fm4)/metal4 (~(fm4),fm4)/metal4 1 \ + "Contact not rectangular (Magic rule)" + + edge4way rp space/active 1 prp 0 0 \ + "prp overhang of rpoly (for resistor L/W extraction) < 1 (Mosis #0)" active + + edge4way rnw space/active 1 prnw 0 0 \ + "prnw overhang of rnwell (for resistor L/W extraction) < 1 (Mosis #0)" active + + edge4way nwr space/active 1 pnwr 0 0 \ + "pnwr overhang of nwr (for Fig1b resistor L/W extraction) < 1 (Mosis #0)" active + + edge4way rpd space/active 1 prpd 0 0 \ + "prpd overhang of rpdiff (for resistor L/W extraction) < 1 (Mosis #0)" active + + edge4way rnd space/active 1 prnd 0 0 \ + "prnd overhang of rndiff (for resistor L/W extraction) < 1 (Mosis #0)" active + + edge4way rm1 space/metal1 1 prm1 0 0 \ + "prm1 overhang of rmetal1 (for resistor L/W extraction) < 1 (Mosis #0)" metal1 + + edge4way rm2 space/metal2 1 prm2 0 0 \ + "prm2 overhang of rmetal2 (for resistor L/W extraction) < 1 (Mosis #0)" metal2 + + edge4way rm3 space/metal3 1 prm3 0 0 \ + "prm3 overhang of rmetal3 (for resistor L/W extraction) < 1 (Mosis #0)" metal3 + + edge4way rm4 space/metal4 1 prm4 0 0 \ + "prm4 overhang of rmetal4 (for resistor L/W extraction) < 1 (Mosis #0)" metal4 + + edge4way ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a ~(ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a)/active 1 ~(ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a)/active (~(ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a),ndc/a,ndm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a)/active 1 \ + "Contact not rectangular (Magic rule)" + + edge4way pdc/a,pdm12c/a,psc/a,psm12c/a ~(pdc/a,pdm12c/a,psc/a,psm12c/a)/active 1 ~(pdc/a,pdm12c/a,psc/a,psm12c/a)/active (~(pdc/a,pdm12c/a,psc/a,psm12c/a),pdc/a,pdm12c/a,psc/a,psm12c/a)/active 1 \ + "Contact not rectangular (Magic rule)" + + edge4way pc/a,pm12c/a ~(pc/a,pm12c/a)/active 1 ~(pc/a,pm12c/a)/active (~(pc/a,pm12c/a),pc/a,pm12c/a)/active 1 \ + "Contact not rectangular (Magic rule)" + + edge4way gc ~(gc)/contact 1 ~(gc)/contact (~(gc),gc)/contact 1 \ + "Contact not rectangular (Magic rule)" + + edge4way gv1 ~(gv1)/via1 1 ~(gv1)/via1 (~(gv1),gv1)/via1 1 \ + "Contact not rectangular (Magic rule)" + + edge4way m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 ~(m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1)/metal1 1 ~(m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1)/metal1 (~(m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1),m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1)/metal1 1 \ + "Contact not rectangular (Magic rule)" + + edge4way gv2 ~(gv2)/via2 1 ~(gv2)/via2 (~(gv2),gv2)/via2 1 \ + "Contact not rectangular (Magic rule)" + + edge4way m3c/m2,m123c/m2,m234c/m2 ~(m3c/m2,m123c/m2,m234c/m2)/metal2 1 ~(m3c/m2,m123c/m2,m234c/m2)/metal2 (~(m3c/m2,m123c/m2,m234c/m2),m3c/m2,m123c/m2,m234c/m2)/metal2 1 \ + "Contact not rectangular (Magic rule)" + + edge4way gv3 ~(gv3)/via3 1 ~(gv3)/via3 (~(gv3),gv3)/via3 1 \ + "Contact not rectangular (Magic rule)" + + edge4way m4c/m3,m234c/m3 ~(m4c/m3,m234c/m3)/metal3 1 ~(m4c/m3,m234c/m3)/metal3 (~(m4c/m3,m234c/m3),m4c/m3,m234c/m3)/metal3 1 \ + "Contact not rectangular (Magic rule)" + + exact_overlap gc,ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,gc,pc/a,pm12c/a,gc + + edge4way pad ~(pad)/m4 1 ~(pad)/m4 (~(pad),pad)/m4 1 \ + "Contact not rectangular (Magic rule)" + + exact_overlap ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1 + + exact_overlap m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2 + + exact_overlap m3c/m3,m123c/m3,m234c/m3 + + exact_overlap m4c/m4,m234c/m4 + + exact_overlap gv1 + + exact_overlap gv2 + + exact_overlap gv3 + + edge4way nfet,pfet,fet ~(nfet,pfet,fet)/active 1 ~(nfet,pfet,fet)/active nfet,pfet,fet 1 \ + "Transistor cannot bend in this process (Mosis #?.?)" + + width m1p 4 \ + "Metal1 PIN width < 4 (do_pins)" + + spacing m1p m1p 4 touching_ok \ + "Metal1 PIN spacing < 4 (do_pins)" + + width m2p 4 \ + "Metal2 PIN width < 4 (do_pins)" + + spacing m2p m2p 4 touching_ok \ + "Metal2 PIN spacing < 4 (do_pins)" + + width m3p 4 \ + "Metal3 PIN width < 4 (do_pins)" + + spacing m3p m3p 4 touching_ok \ + "Metal3 PIN spacing < 4 (do_pins)" + + width m4p 4 \ + "Metal4 PIN width < 4 (do_pins)" + + spacing m4p m4p 4 touching_ok \ + "Metal4 PIN spacing < 4 (do_pins)" + +#CC cifstyle lambda=0.20(p) +#CC cifwidth CWN 240 \ +#CC "generated CIF layer CWN width will be < 12 (';cif see CWN')" +#CC cifspacing CWN CWN 120 touching_ok \ +#CC "generated CIF layer CWN spacing will be < 6 (';cif see CWN')" +#CC cifwidth CWP 240 \ +#CC "generated CIF layer CWP width will be < 12 (';cif see CWP')" +#CC cifspacing CWP CWP 120 touching_ok \ +#CC "generated CIF layer CWP spacing will be < 6 (';cif see CWP')" +#CC cifwidth CSN 60 \ +#CC "generated CIF layer CSN width will be < 3 (';cif see CSN')" +#CC cifspacing CSN CSN 60 touching_ok \ +#CC "generated CIF layer CSN spacing will be < 3 (';cif see CSN')" +#CC cifwidth CSP 60 \ +#CC "generated CIF layer CSP width will be < 3 (';cif see CSP')" +#CC cifspacing CSP CSP 60 touching_ok \ +#CC "generated CIF layer CSP spacing will be < 3 (';cif see CSP')" + + stepsize 400 + +end + +#--------------------------------------------------- +# LEF format definitions +#--------------------------------------------------- + +lef + + ignore PC + ignore CA + + routing m1 M1 m1 met1 + routing m2 M2 m2 met2 + routing m3 M3 m3 met3 + routing m4 M4 m4 met4 + + contact m2c via1 V1 v1 + contact m3c via2 V2 v2 + contact m4c via3 V3 v3 + +end + +#--------------------------------------------------- + +extract + style TSMC0.35um(tsmc35)from:t11c + cscale 1 + lambda 20 + step 100 + sidehalo 8 + planeorder well 0 + planeorder implant 1 + planeorder select 2 + planeorder active 3 + planeorder metal1 4 + planeorder metal2 5 + planeorder metal3 6 + planeorder metal4 7 + planeorder oxide 8 + planeorder xp 9 + planeorder comment 10 + planeorder contact 11 + planeorder via1 12 + planeorder via2 13 + planeorder via3 14 + planeorder fill 15 + + resist (ndiff,anres,rnd,ndc,ndm12c,nsd,nwsd,nsc,nwsc,nsm12c,nwsm12c)/active 3700 + resist (pdiff,apres,rpd,pdc,pdm12c,psd,psc,psm12c)/active 2800 + resist (nwell)/well 1018000 + resist (rnw,nwr)/active 1018000 + resist (pwell)/well 1 + resist (poly,fp,rp,pc,pm12c,pc,pm12c,nfet,pfet,fet)/active 6000 + resist (pres)/active 6000 + resist (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c)/metal1 80 + resist (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c,m3c,m123c,m234c)/metal2 70 + resist (m3,fm3,rm3,m3c,m123c,m234c,m4c,m4c,m234c)/metal3 80 + resist (m4,fm4,rm4,m4c,m234c,pad)/metal4 40 + + contact ndc 4 4100 + contact pdc 4 3400 + contact pc 4 4600 + contact m2c 4 1300 + contact m3c 4 1170 + contact m4c 4 1110 + + +#nwell,cwell,pwell + areacap (nwell)/well 2.360 + +#rnw + areacap (rnw,nwr)/active 2.360 + +#ndiff +# MODEL HANDLES THIS: areacap (ndiff,ndc,ndm12c)/active 43.160 +# MODEL HANDLES THIS: overlap (ndiff,ndc,ndm12c)/active ~space/w 43.160 +# MODEL HANDLES THIS: perimc (ndiff,ndc,ndm12c)/active ~(ndiff,ndc,ndm12c,nfet,pfet,fet)/active 64.200 +# MODEL HANDLES THIS: sideoverlap (ndiff,ndc,ndm12c)/active ~(ndiff,ndc,ndm12c,nfet,pfet,fet)/active ~space/w 64.200 + + areacap (rnd,anres)/active 43.160 + overlap (rnd,anres)/active ~space/w 43.160 + perimc (rnd,anres)/active ~(rnd,anres)/active 64.200 + sideoverlap (rnd,anres)/active ~(rnd,anres)/active ~space/w 64.200 + +#pdiff +# MODEL HANDLES THIS: areacap (pdiff,pdc,pdm12c)/active 55.880 +# MODEL HANDLES THIS: overlap (pdiff,pdc,pdm12c)/active ~space/w 55.880 +# MODEL HANDLES THIS: perimc (pdiff,pdc,pdm12c)/active ~(pdiff,pdc,pdm12c,nfet,pfet,fet)/active 81.800 +# MODEL HANDLES THIS: sideoverlap (pdiff,pdc,pdm12c)/active ~(pdiff,pdc,pdm12c,nfet,pfet,fet)/active ~space/w 81.800 + + areacap (rpd,apres)/active 55.880 + overlap (rpd,apres)/active ~space/w 55.880 + perimc (rpd,apres)/active ~(rpd,apres)/active 81.800 + sideoverlap (rpd,apres)/active ~(rpd,apres)/active ~space/w 81.800 + +#rnw + +#poly +# MODEL HANDLES THIS: overlap (nfet)/active (ndiff,anres,rnd,ndc,ndm12c)/active 181.800 +# MODEL HANDLES THIS: sideoverlap (nfet)/active ~(nfet)/active (ndiff,anres,rnd,ndc,ndm12c)/active 55.400 +# MODEL HANDLES THIS: overlap (pfet)/active (pdiff,apres,rpd,pdc,pdm12c)/active 181.160 +# MODEL HANDLES THIS: sideoverlap (pfet)/active ~(pfet)/active (pdiff,apres,rpd,pdc,pdm12c)/active 52.200 + + sidewall (poly,fp,pres,rp,pc,pm12c)/active ~(poly,fp,pres,rp,pc,pm12c)/active ~(poly,fp,pres,rp,pc,pm12c)/active (poly,fp,pres,rp,pc,pm12c)/active 11.331 + areacap (poly,fp,pres,rp,pc,pm12c)/active 4.074 + overlap (poly,fp,pres,rp,pc,pm12c)/active ~space/w 4.074 + perimc (poly,fp,pres,rp,pc,pm12c)/active ~(poly,fp,pres,rp,pc,pm12c)/active 4.622 + sideoverlap (poly,fp,pres,rp,pc,pm12c)/active ~(poly,fp,pres,rp,pc,pm12c)/active ~space/w 4.622 + +#poly2 + +#rnw + +#metal1 + sidewall (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 20.619 + areacap (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 1.666 + +#metal1-sub blocked by ~space/a + overlap (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 ~space/w 1.666 ~space/a + perimc (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 2.226 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 ~space/w 2.226 ~space/a + +#rnw + overlap (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 rnw,nwr/active 1.666 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,pdc,pdm12c,pc,pm12c,m2c,m123c)/metal1 rnw,nwr/active 2.226 + +#metal1-diff blocked by + overlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (ndiff,anres,rnd,ndc,ndm12c)/active 1.640 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (ndiff,anres,rnd,ndc,ndm12c)/active 2.226 + overlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (pdiff,apres,rpd,pdc,pdm12c)/active 1.640 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (pdiff,apres,rpd,pdc,pdm12c)/active 2.226 + +#metal1-poly blocked by + overlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 1.687 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 2.250 + sideoverlap (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active ~(poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 2.250 + +#metal2 + sidewall (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 23.532 + areacap (m2,fm2,rm2,m3c,m123c,m234c)/metal2 0.581 + +#metal2-sub blocked by + overlap (m2,fm2,rm2,m3c,m123c,m234c)/metal2 ~space/w 0.581 ~space/a,~space/m1 + perimc (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 0.836 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~space/w 0.836 ~space/a,~space/m1 + overlap (m2,fm2,rm2,m3c,m123c,m234c)/metal2 rnw,nwr/active 0.581 ~space/m1 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 rnw,nwr/active 0.836 ~space/m1 + +#metal2-*diff blocked by ~space/m1 + overlap (m2,fm2,rm2,m3c,m123c,m234c)/metal2 (ndiff,anres,rnd,ndc,ndm12c)/active 0.720 ~space/m1 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (ndiff,anres,rnd,ndc,ndm12c)/active 0.836 ~space/m1 + overlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (pdiff,apres,rpd,pdc,pdm12c)/active 0.720 ~space/m1 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (pdiff,apres,rpd,pdc,pdm12c)/active 0.836 ~space/m1 + +#metal2-poly blocked by ~space/m1 + overlap (m2,fm2,rm2,m3c,m123c,m234c)/metal2 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 0.583 ~space/m1 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 0.840 ~space/m1 + sideoverlap (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active ~(poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 0.840 ~space/m1 + +#M2->M1 + overlap (m2,fm2,rm2,m3c,m123c,m234c)/metal2 (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 1.844 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 2.432 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 2.432 + +#metal3 + sidewall (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 24.216 + areacap (m3,fm3,rm3,m4c,m234c)/metal3 0.352 + +#metal3-sub blocked by ~space/a,~space/m1,~space/m2 + overlap (m3,fm3,rm3,m4c,m234c)/metal3 ~space/w 0.352 ~space/a,~space/m1,~space/m2 + perimc (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 0.514 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~space/w 0.514 ~space/a,~space/m1,~space/m2 + +#rnw + overlap (m3,fm3,rm3,m4c,m234c)/metal3 rnw,nwr/active 0.352 ~space/m1,~space/m2 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 rnw,nwr/active 0.514 ~space/m1,~space/m2 + +#metal3-*diff blocked by ~space/m1,~space/m2 + overlap (m3,fm3,rm3,m4c,m234c)/metal3 (ndiff,anres,rnd,ndc,ndm12c)/active 0.520 ~space/m1,~space/m2 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 (ndiff,anres,rnd,ndc,ndm12c)/active 0.514 ~space/m1,~space/m2 + overlap (m3,fm3,rm3,m4c,m234c)/metal3 (pdiff,apres,rpd,pdc,pdm12c)/active 0.520 ~space/m1,~space/m2 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 (pdiff,apres,rpd,pdc,pdm12c)/active 0.514 ~space/m1,~space/m2 + +#metal3-poly blocked by ~space/m1,~space/m2 + overlap (m3,fm3,rm3,m4c,m234c)/metal3 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 0.352 ~space/m1,~space/m2 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 0.516 ~space/m1,~space/m2 + sideoverlap (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active ~(poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 0.516 ~space/m1,~space/m2 + +#M3->M1 + +#metal3-metal1 blocked by ~space/m2 + overlap (m3,fm3,rm3,m4c,m234c)/metal3 (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 0.601 ~space/m2 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 0.864 ~space/m2 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 0.864 ~space/m2 + +#M3->M2 + overlap (m3,fm3,rm3,m4c,m234c)/metal3 (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 1.844 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 2.430 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 2.430 + +#metal4 + sidewall (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 (m4,fm4,rm4,m4c,m234c,pad)/metal4 64.860 + areacap (m4,fm4,rm4,pad)/metal4 0.235 + +#metal4-sub blocked by ~space/a,~space/m1,~space/m2,~space/m3 + overlap (m4,fm4,rm4,pad)/metal4 ~space/w 0.235 ~space/a,~space/m1,~space/m2,~space/m3 + perimc (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 0.802 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 ~space/w 0.802 ~space/a,~space/m1,~space/m2,~space/m3 + +#rnw + overlap (m4,fm4,rm4,pad)/metal4 rnw,nwr/active 0.235 ~space/m1,~space/m2,~space/m3 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 rnw,nwr/active 0.802 ~space/m1,~space/m2,~space/m3 + +#metal4-*diff blocked by ~space/m1,~space/m2,~space/m3 + overlap (m4,fm4,rm4,pad)/metal4 (ndiff,anres,rnd,ndc,ndm12c)/active 0.400 ~space/m1,~space/m2,~space/m3 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 (ndiff,anres,rnd,ndc,ndm12c)/active 0.802 ~space/m1,~space/m2,~space/m3 + overlap (m4,fm4,rm4,pad)/metal4 (pdiff,apres,rpd,pdc,pdm12c)/active 0.400 ~space/m1,~space/m2,~space/m3 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 (pdiff,apres,rpd,pdc,pdm12c)/active 0.802 ~space/m1,~space/m2,~space/m3 + +#metal4-poly blocked by ~space/m1,~space/m2,~space/m3 + overlap (m4,fm4,rm4,pad)/metal4 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 0.271 ~space/m1,~space/m2,~space/m3 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active 0.666 ~space/m1,~space/m2,~space/m3 + sideoverlap (poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active ~(poly,fp,pres,rp,pc,pm12c,nfet,pfet,fet)/active (m4,fm4,rm4,m4c,m234c,pad)/metal4 0.666 ~space/m1,~space/m2,~space/m3 + +#M4->M1 + +#metal4-metal1 blocked by ~space/m2,~space/m3 + overlap (m4,fm4,rm4,pad)/metal4 (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 0.359 ~space/m2,~space/m3 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 1.038 ~space/m2,~space/m3 + sideoverlap (m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 ~(m1,fm1,rm1,ndc,ndm12c,nsc,nwsc,nsm12c,nwsm12c,pdc,pdm12c,psc,psm12c,pc,pm12c,m2c,m123c)/metal1 (m4,fm4,rm4,m4c,m234c,pad)/metal4 1.038 ~space/m2,~space/m3 + +#M4->M2 + +#metal4-metal2 blocked by ~space/m3 + overlap (m4,fm4,rm4,pad)/metal4 (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 0.601 ~space/m3 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 1.698 ~space/m3 + sideoverlap (m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 ~(m2,fm2,rm2,m2c,pdm12c,ndm12c,psm12c,nsm12c,pm12c,m123c,nwsm12c,m3c,m234c)/metal2 (m4,fm4,rm4,m4c,m234c,pad)/metal4 1.698 ~space/m3 + +#M4->M3 + overlap (m4,fm4,rm4,pad)/metal4 (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 1.844 + sideoverlap (m4,fm4,rm4,m4c,m234c,pad)/metal4 ~(m4,fm4,rm4,m4c,m234c,pad)/metal4 (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 4.604 + sideoverlap (m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 ~(m3,fm3,rm3,m3c,m123c,m234c,m4c)/metal3 (m4,fm4,rm4,m4c,m234c,pad)/metal4 4.604 + +#metal5 + +#metal6 + +#metal7 + +#metali + +#fets + +# fet pfet pdiff,pdc 2 pfet Vdd! nwell 52 181 +# fet pfet pdiff,pdc 1 pfet Vdd! nwell 52 181 + + device mosfet pfet pfet pdiff,pdc nwell $VDD 52 181 + +# fet nfet ndiff,ndc 2 nfet Gnd! pwell 55 182 +# fet nfet ndiff,ndc 1 nfet Gnd! pwell 55 182 + + device mosfet nfet nfet ndiff,ndc pwell $GND 55 182 + + fetresis pfet linear 12182 + fetresis pfet saturation 12182 + fetresis nfet linear 3961 + fetresis nfet saturation 3961 + +# fet rnwell nsd,nsc 2 nwellResistor Gnd! nwell,pwell 0 0 +# fet rpoly poly,pc 2 polyResistor Gnd! nwell,pwell 0 0 +# fet nwr nwsd 2 nwellFig1bResistor Gnd! nwell,pwell 0 0 +# fet rndiff ndiff,ndc 2 ndiffResistor Gnd! nwell,pwell 0 0 +# fet rpdiff pdiff,pdc 2 pdiffResistor Gnd! nwell,pwell 0 0 + + device resistor None rnwell nsd,nsc + device resistor None rpoly poly,pc + device resistor None nwr nwsd + device resistor None rndiff ndiff,ndc + device resistor None rpdiff pdiff,pdc + +# fet rmetal1 metal1 2 metal1Resistor Gnd! nwell,pwell 0 0 +# fet rmetal2 metal2 2 metal2Resistor Gnd! nwell,pwell 0 0 +# fet rmetal3 metal3 2 metal3Resistor Gnd! nwell,pwell 0 0 +# fet rmetal4 metal4 2 metal4Resistor Gnd! nwell,pwell 0 0 + + device resistor None rmetal1 *metal1 + device resistor None rmetal2 *metal2 + device resistor None rmetal3 *metal3 + device resistor None rmetal4 *metal4 + +# fet pres poly,pc 2 presResistor Gnd! nwell,pwell 0 0 +# fet anres ndiff,ndc 2 anresResistor Gnd! nwell,pwell 0 0 +# fet apres pdiff,pdc 2 apresResistor Gnd! nwell,pwell 0 0 + + device resistor None pres poly,pc + device resistor None anres ndiff,ndc + device resistor None apres pdiff,pdc + +end + +wiring + contact pdcontact 4 metal1 0 pdiff 0 + contact ndcontact 4 metal1 0 ndiff 0 + contact pcontact 4 metal1 0 poly 0 + contact m2contact 4 metal1 0 metal2 0 + contact m3contact 5 metal2 0 metal3 1 + contact m4contact 4 metal3 0 metal4 0 + +end + +router + layer2 metal2 3 m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m123c/m2,m234c/m2,m3c/m2,m123c/m2,m234c/m2 4 poly,fp,pres,rp,ndiff,anres,rnd,nsd,nwsd,pdiff,apres,rpd,psd,m1,fm1,rm1 1 + layer1 metal1 3 m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1 3 + contacts m2contact 4 + gridspacing 8 + +end + +plowing + fixed nfet,pfet,glass,pad + covered nfet,pfet + drag nfet,pfet + +end + +plot +style colorversatec + ndiff,anres,rnd,ndc/a,ndm12c/a yellow \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA + ndiff,anres,rnd,ndc/a,ndm12c/a cyan \ + 0000 5555 0000 5555 \ + 0000 5555 0000 5555 \ + 0000 5555 0000 5555 \ + 0000 5555 0000 5555 + nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a yellow \ + 1515 2A2A 5151 A2A2 \ + 1515 2A2A 5151 A2A2 \ + 1515 2A2A 5151 A2A2 \ + 1515 2A2A 5151 A2A2 + nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a cyan \ + 0000 1515 0000 5151 \ + 0000 1515 0000 5151 \ + 0000 1515 0000 5151 \ + 0000 1515 0000 5151 + pdiff,apres,rpd,pdc/a,pdm12c/a yellow \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA + pdiff,apres,rpd,pdc/a,pdm12c/a cyan \ + 0000 5555 0000 5555 \ + 0000 5555 0000 5555 \ + 0000 5555 0000 5555 \ + 0000 5555 0000 5555 + pdiff,apres,rpd,pdc/a,pdm12c/a magenta \ + AAAA 0000 AAAA 0000 \ + AAAA 0000 AAAA 0000 \ + AAAA 0000 AAAA 0000 \ + AAAA 0000 AAAA 0000 + psd,psc/a,psm12c/a yellow \ + 1515 2A2A 5151 A2A2 \ + 1515 2A2A 5151 A2A2 \ + 1515 2A2A 5151 A2A2 \ + 1515 2A2A 5151 A2A2 + psd,psc/a,psm12c/a cyan \ + 0000 1515 0000 5151 \ + 0000 1515 0000 5151 \ + 0000 1515 0000 5151 \ + 0000 1515 0000 5151 + psd,psc/a,psm12c/a magenta \ + 2A2A 0000 A2A2 0000 \ + 2A2A 0000 A2A2 0000 \ + 2A2A 0000 A2A2 0000 \ + 2A2A 0000 A2A2 0000 + poly,fp,pres,rp,pc/a,pm12c/a magenta \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA \ + 5555 AAAA 5555 AAAA + nfet yellow \ + 0505 8282 1414 0A0A \ + 5050 2828 4141 A0A0 \ + 0505 8282 1414 0A0A \ + 5050 2828 4141 A0A0 + nfet cyan \ + 0000 0505 0000 1414 \ + 0000 5050 0000 4141 \ + 0000 0505 0000 1414 \ + 0000 5050 0000 4141 + nfet magenta \ + 5050 2828 4141 A0A0 \ + 0505 8282 1414 0A0A \ + 5050 2828 4141 A0A0 \ + 0505 8282 1414 0A0A + pfet yellow \ + 6363 A0A0 5050 2828 \ + 3636 0A0A 0505 8282 \ + 6363 A0A0 5050 2828 \ + 3636 0A0A 0505 8282 + pfet cyan \ + 0000 5151 0000 5454 \ + 0000 1515 0000 1515 \ + 0000 5151 0000 5454 \ + 0000 1515 0000 1515 + pfet magenta \ + 9494 0A0A 2525 8282 \ + 4949 A0A0 5252 2828 \ + 9494 0A0A 2525 8282 \ + 4949 A0A0 5252 2828 + m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 cyan \ + AAAA 0000 AAAA 0000 \ + AAAA 0000 AAAA 0000 \ + AAAA 0000 AAAA 0000 \ + AAAA 0000 AAAA 0000 + m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 cyan \ + 0000 1111 0000 4444 \ + 0000 1111 0000 4444 \ + 0000 1111 0000 4444 \ + 0000 1111 0000 4444 + m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 magenta \ + 0000 4444 0000 1111 \ + 0000 4444 0000 1111 \ + 0000 4444 0000 1111 \ + 0000 4444 0000 1111 + m2c/m1,pdm12c/m1,ndm12c/m1,psm12c/m1,nsm12c/m1,pm12c/m1,m123c/m1,nwsm12c/m1,gv1 black \ + 0000 6666 6666 0000 \ + 0000 9999 9999 0000 \ + 0000 6666 6666 0000 \ + 0000 9999 9999 0000 + pad,glass black \ + 0300 0700 0E00 1C00 \ + 3800 7000 E000 C000 \ + 00C0 00E0 0070 0038 \ + 001C 000E 0007 0003 + nwell yellow \ + 0800 1000 2000 4000 \ + 8000 0001 0002 0004 \ + 0008 0010 0020 0040 \ + 0080 0010 0200 0400 + nwell cyan \ + 1000 2000 4000 8000 \ + 0001 0002 0004 0008 \ + 0010 0020 0040 0080 \ + 0100 0200 0400 0800 + pwell yellow \ + 1000 0400 0400 0100 \ + 0100 0040 0040 0010 \ + 0010 0004 0004 0001 \ + 0001 4000 4000 1000 + pwell cyan \ + 0000 0800 0000 0200 \ + 0000 0080 0000 0020 \ + 0000 0008 0000 0002 \ + 0000 8000 0000 2000 + pwell magenta \ + 0800 0000 0200 0000 \ + 0080 0000 0020 0000 \ + 0008 0000 0002 0000 \ + 8000 0000 2000 0000 + m3c/m2,m123c/m2,m234c/m2,gv2 black \ + 0100 0000 0000 0000 \ + 1010 0000 0000 0000 \ + 0001 0000 0000 0000 \ + 1010 0000 0000 0000 + m3c/m2,m123c/m2,m234c/m2,gv2 cyan \ + 0280 0000 0820 0000 \ + 2008 0000 8002 0000 \ + 8002 0000 2008 0000 \ + 0820 0000 0280 0000 + m3c/m2,m123c/m2,m234c/m2,gv2 magenta \ + 0100 06C0 0440 1830 \ + 1010 600C 4004 8003 \ + 0001 C006 4004 3018 \ + 1010 0C60 0440 0380 + m3c/m2,m123c/m2,m234c/m2,gv2 black \ + 0820 0820 0820 0FE0 \ + E00F 2008 2008 2008 \ + 2008 2008 2008 E00F \ + 0000 0FE0 0820 0820 + error_p,error_s,error_ps black \ + 0000 3C3C 4646 4A4A \ + 5252 6262 3C3C 0000 \ + 0000 3C3C 4646 4A4A \ + 5252 6262 3C3C 0000 + magnet yellow \ + AAAA 0000 5555 0000 \ + AAAA 0000 5555 0000 \ + AAAA 0000 5555 0000 \ + AAAA 0000 5555 0000 + fence magenta \ + FFFF 0000 0000 0000 \ + 0000 0000 0000 0000 \ + FFFF 0000 0000 0000 \ + 0000 0000 0000 0000 + rotate cyan \ + 0000 E0E0 E0E0 E0E0 \ + 0000 0000 0000 0000 \ + 0000 E0E0 E0E0 E0E0 \ + 0000 0000 0000 0000 + pc/a,pm12c/a,ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,gc,gc,gc X + +style versatec + pfet \ + 07c0 0f80 1f00 3e00 \ + 7c00 f800 f001 e003 \ + c007 800f 001f 003e \ + 00c7 00f8 01f0 03e0 + nfet \ + 1f00 0f80 07c0 03e0 \ + 01f0 00f8 007c 003e \ + 001f 800f c007 e003 \ + f001 f800 7c00 3e00 + gv1 \ + c3c3 c3c3 0000 0000 \ + 0000 0000 c3c3 c3c3 \ + c3c3 c3c3 0000 0000 \ + 0000 0000 c3c3 c3c3 + pwell \ + 2020 2020 2020 2020 \ + 2020 2020 2020 2020 \ + 0000 0000 0000 0000 \ + 0000 0000 0000 0000 + nwell \ + 0808 0404 0202 0101 \ + 0000 0000 0000 0000 \ + 0808 0404 0202 0101 \ + 0000 0000 0000 0000 + poly,fp,pres,rp,pc/a,pm12c/a,nfet,pfet \ + 0808 0400 0202 0101 \ + 8080 4000 2020 1010 \ + 0808 0004 0202 0101 \ + 8080 0040 2020 1010 + m1,fm1,rm1,ndc/m1,ndm12c/m1,nsc/m1,nwsc/m1,nsm12c/m1,nwsm12c/m1,pdc/m1,pdm12c/m1,psc/m1,psm12c/m1,pc/m1,pm12c/m1,m2c/m1,m123c/m1 \ + 8080 0000 0000 0000 \ + 0808 0000 0000 0000 \ + 8080 0000 0000 0000 \ + 0808 0000 0000 0000 + pad,glass \ + 0000 0000 1c1c 3e3e \ + 3636 3e3e 1c1c 0000 \ + 0000 0000 1c1c 3e3e \ + 3636 3e3e 1c1c 0000 + nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a \ + 0808 1414 2222 4141 \ + 8080 4040 2020 1010 \ + 0808 1414 2222 4141 \ + 8080 4040 2020 1010 + m2,fm2,rm2,m2c/m2,pdm12c/m2,ndm12c/m2,psm12c/m2,nsm12c/m2,pm12c/m2,m123c/m2,nwsm12c/m2,m3c/m2,m234c/m2 \ + 0000 1111 0000 0000 \ + 0000 1111 0000 0000 \ + 0000 1111 0000 0000 \ + 0000 1111 0000 0000 + pdiff,apres,rpd,pdc/a,pdm12c/a,pfet \ + 0000 0808 5555 8080 \ + 0000 8080 5555 0808 \ + 0000 0808 5555 8080 \ + 0000 8080 5555 0808 + psd,psc/a,psm12c/a \ + 1414 2222 0000 2222 \ + 4141 2222 0000 2222 \ + 1414 2222 0000 2222 \ + 4141 2222 0000 2222 + ndiff,anres,rnd,ndc/a,ndm12c/a,nfet \ + 0808 1010 2020 4040 \ + 8080 4141 2222 1414 \ + 0808 1010 2020 4040 \ + 8080 4141 2222 1414 + pc/a,pm12c/a,ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,gc,gc,gc X + +style gremlin + pfet 9 + nfet 10 + gv1 11 + pwell 15 + nwell 16 + poly,fp,pres,rp,pc/a,pm12c/a,nfet,pfet 19 + pc/a,pm12c/a,ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,gc,gc,gc 22 + pad,glass 23 + nsd,nwsd,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a 24 + gv1 28 + pdiff,apres,rpd,pdc/a,pdm12c/a,pfet 29 + psd,psc/a,psm12c/a 30 + ndiff,anres,rnd,ndc/a,ndm12c/a,nfet 31 + pc/a,pm12c/a,ndc/a,ndm12c/a,pdc/a,pdm12c/a,psc/a,psm12c/a,nsc/a,nwsc/a,nsm12c/a,nwsm12c/a,gc,gc,gc,gv1 X + +end + diff --git a/technology/scn4me_subm/tech/__init__.py b/technology/scn4me_subm/tech/__init__.py new file mode 100755 index 00000000..6b2d03b3 --- /dev/null +++ b/technology/scn4me_subm/tech/__init__.py @@ -0,0 +1,6 @@ +""" +Import tech specific modules. +""" + +from tech import * + diff --git a/technology/scn4me_subm/tech/tech.py b/technology/scn4me_subm/tech/tech.py new file mode 100755 index 00000000..565d73bc --- /dev/null +++ b/technology/scn4me_subm/tech/tech.py @@ -0,0 +1,295 @@ +import os + +""" +File containing the process technology parameters for SCMOS 3me, subm, 180nm. +""" + +info={} +info["name"]="scn3me_subm" +info["body_tie_down"] = 0 +info["has_pwell"] = True +info["has_nwell"] = True + +#GDS file info +GDS={} +# gds units +GDS["unit"]=(0.001,1e-6) +# default label zoom +GDS["zoom"] = 0.5 + + +################################################### +##GDS Layer Map +################################################### + +# create the GDS layer map +layer={} +layer["vtg"] = -1 +layer["vth"] = -1 +layer["contact"] = 47 +layer["pwell"] = 41 +layer["nwell"] = 42 +layer["active"] = 43 +layer["pimplant"] = 44 +layer["nimplant"] = 45 +layer["poly"] = 46 +layer["active_contact"] = 48 +layer["metal1"] = 49 +layer["via1"] = 50 +layer["metal2"] = 51 +layer["via2"] = 61 +layer["metal3"] = 62 +layer["via3"] = 30 +layer["metal4"] = 31 +layer["text"] = 63 +layer["boundary"] = 63 +layer["blockage"] = 83 + +################################################### +##END GDS Layer Map +################################################### + +################################################### +##DRC/LVS Rules Setup +################################################### +_lambda_ = 0.2 + +#technology parameter +parameter={} +parameter["min_tx_size"] = 4*_lambda_ +parameter["beta"] = 2 + +drclvs_home=os.environ.get("DRCLVS_HOME") + +drc={} +#grid size is 1/2 a lambda +drc["grid"]=0.5*_lambda_ +#DRC/LVS test set_up +drc["drc_rules"]=drclvs_home+"/calibreDRC_scn3me_subm.rul" +drc["lvs_rules"]=drclvs_home+"/calibreLVS_scn3me_subm.rul" +drc["layer_map"]=os.environ.get("OPENRAM_TECH")+"/scn3me_subm/layers.map" + + +# minwidth_tx with contact (no dog bone transistors) +drc["minwidth_tx"] = 4*_lambda_ +drc["minlength_channel"] = 2*_lambda_ + +# 1.3 Minimum spacing between wells of same type (if both are drawn) +drc["well_to_well"] = 6*_lambda_ +# 1.4 Minimum spacing between wells of different type (if both are drawn) +drc["pwell_to_nwell"] = 0 +# 1.1 Minimum width +drc["minwidth_well"] = 12*_lambda_ + +# 3.1 Minimum width +drc["minwidth_poly"] = 2*_lambda_ +# 3.2 Minimum spacing over active +drc["poly_to_poly"] = 3*_lambda_ +# 3.3 Minimum gate extension of active +drc["poly_extend_active"] = 2*_lambda_ +# 5.5.b Minimum spacing between poly contact and other poly (alternative rules) +drc["poly_to_polycontact"] = 4*_lambda_ +# ?? +drc["active_enclosure_gate"] = 0.0 +# 3.5 Minimum field poly to active +drc["poly_to_active"] = _lambda_ +# 3.2.a Minimum spacing over field poly +drc["poly_to_field_poly"] = 3*_lambda_ +# Not a rule +drc["minarea_poly"] = 0.0 + +# ?? +drc["active_to_body_active"] = 4*_lambda_ # Fix me +# 2.1 Minimum width +drc["minwidth_active"] = 3*_lambda_ +# 2.2 Minimum spacing +drc["active_to_active"] = 3*_lambda_ +# 2.3 Source/drain active to well edge +drc["well_enclosure_active"] = 6*_lambda_ +# Reserved for asymmetric enclosures +drc["well_extend_active"] = 6*_lambda_ +# Not a rule +drc["minarea_active"] = 0.0 + +# 4.1 Minimum select spacing to channel of transistor to ensure adequate source/drain width +drc["implant_to_channel"] = 3*_lambda_ +# 4.2 Minimum select overlap of active +drc["implant_enclosure_active"] = 2*_lambda_ +# 4.3 Minimum select overlap of contact +drc["implant_enclosure_contact"] = _lambda_ +# Not a rule +drc["implant_to_contact"] = 0 +# Not a rule +drc["implant_to_implant"] = 0 +# Not a rule +drc["minwidth_implant"] = 0 + +# 6.1 Exact contact size +drc["minwidth_contact"] = 2*_lambda_ +# 5.3 Minimum contact spacing +drc["contact_to_contact"] = 3*_lambda_ +# 6.2.b Minimum active overlap +drc["active_enclosure_contact"] = _lambda_ +# Reserved for asymmetric enclosure +drc["active_extend_contact"] = _lambda_ +# 5.2.b Minimum poly overlap +drc["poly_enclosure_contact"] = _lambda_ +# Reserved for asymmetric enclosures +drc["poly_extend_contact"] = _lambda_ +# Reserved for other technologies +drc["contact_to_gate"] = 2*_lambda_ +# 5.4 Minimum spacing to gate of transistor +drc["contact_to_poly"] = 2*_lambda_ + +# 7.1 Minimum width +drc["minwidth_metal1"] = 3*_lambda_ +# 7.2 Minimum spacing +drc["metal1_to_metal1"] = 3*_lambda_ +# 7.3 Minimum overlap of any contact +drc["metal1_enclosure_contact"] = _lambda_ +# Reserved for asymmetric enclosure +drc["metal1_extend_contact"] = _lambda_ +# 8.3 Minimum overlap by metal1 +drc["metal1_enclosure_via1"] = _lambda_ +# Reserve for asymmetric enclosures +drc["metal1_extend_via1"] = _lambda_ +# Not a rule +drc["minarea_metal1"] = 0 + +# 8.1 Exact size +drc["minwidth_via1"] = 2*_lambda_ +# 8.2 Minimum via1 spacing +drc["via1_to_via1"] = 2*_lambda_ + +# 9.1 Minimum width +drc["minwidth_metal2"] = 3*_lambda_ +# 9.2 Minimum spacing +drc["metal2_to_metal2"] = 3*_lambda_ +# 9.3 Minimum overlap of via1 +drc["metal2_extend_via1"] = _lambda_ +# Reserved for asymmetric enclosures +drc["metal2_enclosure_via1"] = _lambda_ +# 14.3 Minimum overlap by metal2 +drc["metal2_extend_via2"] = _lambda_ +# Reserved for asymmetric enclosures +drc["metal2_enclosure_via2"] = _lambda_ +# Not a rule +drc["minarea_metal2"] = 0 + +# 14.2 Exact size +drc["minwidth_via2"] = 2*_lambda_ +# 14.2 Minimum spacing +drc["via2_to_via2"] = 3*_lambda_ + +# 15.1 Minimum width +drc["minwidth_metal3"] = 3*_lambda_ +# 15.2 Minimum spacing to metal3 +drc["metal3_to_metal3"] = 3*_lamda_ +# 15.3 Minimum overlap of via 2 +drc["metal3_extend_via2"] = _lambda_ +# Reserved for asymmetric enclosures +drc["metal3_enclosure_via2"] = 2*_lambda_ +# Reserved for asymmetric enclosures +drc["metal2_enclosure_via1"] = _lambda_ +# 21.3 Minimum overlap by metal3 +drc["metal3_extend_via2"] = _lambda_ +# Reserved for asymmetric enclosures +drc["metal3_enclosure_via2"] = _lambda_ +# Not a rule +drc["minarea_metal3"] = 0 + +# 21.1 Exact size +drc["minwidth_via3"] = 2*_lambda_ +# 21.2 Minimum spacing +drc["via3_to_via3"] = 3*_lambda_ + +# 22.1 Minimum width +drc["minwidth_metal3"] = 6*_lambda_ +# 22.2 Minimum spacing to metal3 +drc["metal3_to_metal3"] = 6*_lamda_ +# 22.3 Minimum overlap of via 2 +drc["metal3_extend_via2"] = 2_lambda_ +# Reserved for asymmetric enclosures +drc["metal3_enclosure_via2"] = 2*_lambda_ +# Not a rule +drc["minarea_metal3"] = 0 + +################################################### +##END DRC/LVS Rules +################################################### + +################################################### +##Spice Simulation Parameters +################################################### + +# spice model info +spice={} +spice["nmos"]="n" +spice["pmos"]="p" +# This is a map of corners to model files +SPICE_MODEL_DIR=os.environ.get("SPICE_MODEL_DIR") +# FIXME: Uncomment when we have the new spice models +#spice["fet_models"] = { "TT" : [SPICE_MODEL_DIR+"/nom/pmos.sp",SPICE_MODEL_DIR+"/nom/nmos.sp"] } +spice["fet_models"] = { "TT" : [SPICE_MODEL_DIR+"/nom/pmos.sp",SPICE_MODEL_DIR+"/nom/nmos.sp"], + "FF" : [SPICE_MODEL_DIR+"/ff/pmos.sp",SPICE_MODEL_DIR+"/ff/nmos.sp"], + "FS" : [SPICE_MODEL_DIR+"/ff/pmos.sp",SPICE_MODEL_DIR+"/ss/nmos.sp"], + "SF" : [SPICE_MODEL_DIR+"/ss/pmos.sp",SPICE_MODEL_DIR+"/ff/nmos.sp"], + "SS" : [SPICE_MODEL_DIR+"/ss/pmos.sp",SPICE_MODEL_DIR+"/ss/nmos.sp"] } + + +#spice stimulus related variables +spice["feasible_period"] = 5 # estimated feasible period in ns +spice["supply_voltages"] = [4.5, 5.0, 5.5] # Supply voltage corners in [Volts] +spice["nom_supply_voltage"] = 5.0 # Nominal supply voltage in [Volts] +spice["rise_time"] = 0.05 # rise time in [Nano-seconds] +spice["fall_time"] = 0.05 # fall time in [Nano-seconds] +spice["temperatures"] = [0, 25, 100] # Temperature corners (celcius) +spice["nom_temperature"] = 25 # Nominal temperature (celcius) + +#sram signal names +#FIXME: We don't use these everywhere... +spice["vdd_name"] = "vdd" +spice["gnd_name"] = "gnd" +spice["control_signals"] = ["CSB", "WEB"] +spice["data_name"] = "DATA" +spice["addr_name"] = "ADDR" +spice["minwidth_tx"] = drc["minwidth_tx"] +spice["channel"] = drc["minlength_channel"] +spice["clk"] = "clk" + +# analytical delay parameters +# FIXME: These need to be updated for SCMOS, they are copied from FreePDK45. +spice["wire_unit_r"] = 0.075 # Unit wire resistance in ohms/square +spice["wire_unit_c"] = 0.64 # Unit wire capacitance ff/um^2 +spice["min_tx_r"] = 9250.0 # Minimum transistor on resistance in ohms +spice["min_tx_drain_c"] = 0.7 # Minimum transistor drain capacitance in ff +spice["min_tx_gate_c"] = 0.1 # Minimum transistor gate capacitance in ff +spice["msflop_setup"] = 9 # DFF setup time in ps +spice["msflop_hold"] = 1 # DFF hold time in ps +spice["msflop_delay"] = 20.5 # DFF Clk-to-q delay in ps +spice["msflop_slew"] = 13.1 # DFF output slew in ps w/ no load +spice["msflop_in_cap"] = 9.8242 # Input capacitance of ms_flop (Din) [Femto-farad] +spice["dff_setup"] = 9 # DFF setup time in ps +spice["dff_hold"] = 1 # DFF hold time in ps +spice["dff_delay"] = 20.5 # DFF Clk-to-q delay in ps +spice["dff_slew"] = 13.1 # DFF output slew in ps w/ no load +spice["dff_in_cap"] = 9.8242 # Input capacitance of ms_flop (Din) [Femto-farad] + +# analytical power parameters, many values are temporary +spice["bitcell_leakage"] = 1 # Leakage power of a single bitcell in nW +spice["inv_leakage"] = 1 # Leakage power of inverter in nW +spice["nand2_leakage"] = 1 # Leakage power of 2-input nand in nW +spice["nand3_leakage"] = 1 # Leakage power of 3-input nand in nW +spice["nor2_leakage"] = 1 # Leakage power of 2-input nor in nW +spice["msflop_leakage"] = 1 # Leakage power of flop in nW +spice["flop_para_cap"] = 2 # Parasitic Output capacitance in fF + +spice["default_event_rate"] = 100 # Default event activity of every gate. MHz +spice["flop_transition_prob"] = .5 # Transition probability of inverter. +spice["inv_transition_prob"] = .5 # Transition probability of inverter. +spice["nand2_transition_prob"] = .1875 # Transition probability of 2-input nand. +spice["nand3_transition_prob"] = .1094 # Transition probability of 3-input nand. +spice["nor2_transition_prob"] = .1875 # Transition probability of 2-input nor. +################################################### +##END Spice Simulation Parameters +################################################### diff --git a/technology/scn4me_subm/tf/LICENSE b/technology/scn4me_subm/tf/LICENSE new file mode 100644 index 00000000..8d22c4be --- /dev/null +++ b/technology/scn4me_subm/tf/LICENSE @@ -0,0 +1,4 @@ +The NCSU CDK is Copyright (C) NC State University, 1998, 1999, 2004, +2006. Users are free to use or modify the NCSU CDK as appropriate as long +as this notice appears in the modified package. The NCSU CDK is +provided with NO WARRANTY. diff --git a/technology/scn4me_subm/tf/README b/technology/scn4me_subm/tf/README new file mode 100644 index 00000000..d2531fe1 --- /dev/null +++ b/technology/scn4me_subm/tf/README @@ -0,0 +1,21 @@ +;; NCSU CDK v. 1.6.0.beta +;; Last Modified: 2007-07-12 + +The NCSU CDK is Copyright (C) NC State University, 1998, 1999, 2004, +2006, 2007. Users are free to use or modify the NCSU CDK as appropriate as long +as this notice appears in the modified package. The NCSU CDK is +provided with NO WARRANTY. + +As of version 1.5.1, all documentation for the NCSU CDK is provided +by the NCSU EDA Wiki which can be found at: + + http://www.eda.ncsu.edu/ + +This beta release of the kit is to be used in migrating to Cadence Virtuoso 6.1 +for OpenAccess. Details of the conversion of the CDK from the CDB version can +be found in the file cdb2oa/OA_Conversion.txt. + +This kit is not yet fully supported. Please post problems and solutions at +http://www.chiptalk.org -> Forums -> NCSU CDK -> NCSU CDK 1.6.0.beta for Virtuoso 6.1 + +Modified 2018 by MRG to contain SCN4ME Via3/Metal4 layers. \ No newline at end of file diff --git a/technology/scn4me_subm/tf/display.drf b/technology/scn4me_subm/tf/display.drf new file mode 100644 index 00000000..aeeefe2c --- /dev/null +++ b/technology/scn4me_subm/tf/display.drf @@ -0,0 +1,717 @@ +drDefineDisplay( +;( DisplayName ) + ( display ) +) +drDefineColor( +;( DisplayName ColorsName Red Green Blue ) + ( display white 255 255 255 ) + ( display yellow 255 255 0 ) + ( display silver 217 230 255 ) + ( display cream 255 255 204 ) + ( display pink 255 191 242 ) + ( display magenta 255 0 255 ) + ( display lime 0 255 0 ) + ( display tan 255 230 191 ) + ( display cyan 0 255 255 ) + ( display cadetBlue 57 191 255 ) + ( display orange 255 128 0 ) + ( display red 255 51 51 ) + ( display purple 153 0 230 ) + ( display green 0 204 102 ) + ( display brown 191 64 38 ) + ( display blue 51 77 255 ) + ( display slate 140 140 166 ) + ( display gold 217 204 0 ) + ( display maroon 230 31 13 ) + ( display violet 94 0 230 ) + ( display forest 38 140 107 ) + ( display chocolate 128 38 38 ) + ( display navy 51 51 153 ) + ( display black 0 0 0 ) + ( display gray 204 204 217 ) + ( display winColor1 166 166 166 ) + ( display winColor2 115 115 115 ) + ( display winColor3 189 204 204 ) + ( display winColor4 204 204 204 ) + ( display winColor5 199 199 199 ) + ( display blinkRed 255 0 0 t ) + ( display blinkYellow 255 255 0 t ) + ( display blinkWhite 255 255 255 t ) + ( display winBack 224 224 224 ) + ( display winFore 128 0 0 ) + ( display winText 51 51 51 ) +) +drDefineStipple( +;( DisplayName StippleName Bitmap ) + ( display dots ( ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) + ( display dots1 ( ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) + ( display hLine ( ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) ) ) + ( display vLine ( ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) ) ) + ( display cross ( ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) ) ) + ( display grid ( ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) ) ) + ( display slash ( ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) ) ) + ( display backSlash ( ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) ) ) + ( display hZigZag ( ( 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 0 1 1 0 0 0 0 0 0 1 1 0 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 ) + ( 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ) + ( 0 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 ) + ( 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 0 ) + ( 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 ) + ( 0 0 1 1 0 0 0 0 0 0 1 1 0 0 0 0 ) + ( 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 ) + ( 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 ) + ( 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ) ) ) + ( display vZigZag ( ( 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 ) + ( 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ) + ( 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 ) + ( 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 ) + ( 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 ) + ( 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 ) + ( 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 ) + ( 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 ) + ( 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 ) + ( 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ) + ( 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 ) + ( 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 ) + ( 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 ) + ( 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 ) + ( 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 ) + ( 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 ) ) ) + ( display hCurb ( ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 1 1 1 0 0 0 1 1 1 1 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 1 1 1 0 0 0 1 1 1 1 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) + ( display vCurb ( ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) ) ) + ( display brick ( ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 ) + ( 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 ) + ( 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 ) + ( 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 ) + ( 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 ) ) ) + ( display dagger ( ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 1 1 1 1 1 0 0 0 1 1 1 1 1 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) + ( 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 ) ) ) + ( display triangle ( ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 ) + ( 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) + ( display x ( ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ) ) ) + ( display stipple0 ( ( 1 ) ) ) + ( display stipple1 ( ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) + ( display stipple2 ( ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) + ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) + ( 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 ) ) ) + ( display stipple3 ( ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) ) ) + ( display stipple4 ( ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ) ) ) + ( display stipple5 ( ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) ) ) + ( display stipple6 ( ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) ) ) + ( display stipple7 ( ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) + ( 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 ) + ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) + ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) + ( 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 ) + ( 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 ) + ( 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 ) ) ) + ( display stipple8 ( ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 ) ) ) + ( display stipple9 ( ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) + ( 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 ) ) ) + ( display stipple10 ( ( 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) + ( display stipple11 ( ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) ) ) + ( display dots2 ( ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) + ( display dots4 ( ( 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 ) ) ) + ( display dats5 ( ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) ) ) +) +drDefineLineStyle( +;( DisplayName LineStyle Size Pattern ) + ( display solid 1 (1 ) ) + ( display dashed 1 (1 1 1 0 0 1 1 1 ) ) + ( display dots 1 (1 0 0 ) ) + ( display dashDot 1 (1 1 1 0 0 1 0 0 ) ) + ( display shortDash 1 (1 1 0 0 ) ) + ( display doubleDash 1 (1 1 1 1 0 0 1 1 0 0 ) ) + ( display hidden 1 (1 0 0 0 ) ) + ( display thickLine 3 (1 1 1 ) ) + ( display lineStyle0 1 (1 ) ) + ( display lineStyle1 1 (1 1 1 0 1 1 1 0 1 1 1 0 1 1 0 1 ) ) +) +drDefinePacket( +;( DisplayName PacketName Stipple LineStyle Fill Outline [FillStyle]) + ( display NwellNet dots4 thickLine slate slate outlineStipple) + ( display border stipple0 solid tan tan solid ) + ( display y8 stipple0 solid gold gold solid ) + ( display background stipple1 lineStyle0 black black outlineStipple) + ( display y9 stipple0 solid silver silver solid ) + ( display Metal3Net dots4 solid navy navy outlineStipple) + ( display Metal3Net dots4 solid tan tan outlineStipple) + ( display A1 stipple0 lineStyle0 winBack winBack solid ) + ( display pin solid lineStyle0 red red solid ) + ( display XPNet blank solid yellow yellow outline ) + ( display hardFence stipple0 solid red red solid ) + ( display PbaseNet dots4 solid yellow yellow outlineStipple) + ( display designFlow3 stipple1 lineStyle0 pink pink outlineStipple) + ( display A2 stipple0 lineStyle0 winBack winBack solid ) + ( display Unrouted1 stipple0 lineStyle1 brown brown solid ) + ( display RowLbl blank solid cyan cyan outline ) + ( display edgeLayerPin stipple0 solid yellow yellow solid ) + ( display instance blank solid winBack red outline ) + ( display Nselect dots4 solid green green outlineStipple) + ( display snap stipple0 solid yellow yellow solid ) + ( display pinAnt stipple0 solid red red solid ) + ( display winAttentionText solid solid winText winText solid ) + ( display designFlow2 stipple1 lineStyle0 purple purple outlineStipple) + ( display Unrouted2 stipple0 lineStyle1 red red solid ) + ( display hilite blank solid white white outline ) + ( display P2Con solid lineStyle0 orange orange solid ) + ( display designFlow1 stipple1 lineStyle0 red red outlineStipple) + ( display grid1 stipple0 solid gray gray solid ) + ( display Unrouted3 stipple0 lineStyle1 pink pink solid ) + ( display ViaNet x solid magenta magenta outlineStipple) + ( display select stipple0 solid tan tan solid ) + ( display Poly2Net dots4 lineStyle0 orange orange outlineStipple) + ( display winText solid solid winText winText solid ) + ( display Unrouted4 stipple0 lineStyle1 orange orange solid ) + ( display wireLbl solid lineStyle0 cyan cyan solid ) + ( display designFlow7 stipple1 lineStyle0 cyan cyan outlineStipple) + ( display align stipple0 solid tan tan solid ) + ( display Poly2Pin blank solid yellow yellow outline ) + ( display Unrouted5 stipple0 lineStyle1 green green solid ) + ( display unset stipple0 solid forest forest solid ) + ( display Poly1Net dots4 lineStyle0 red red outlineStipple) + ( display Resistor dots2 lineStyle0 cyan cyan outlineStipple) + ( display DiodeNet dots4 lineStyle0 cream cream outlineStipple) + ( display designFlow6 stipple1 lineStyle0 tan tan outlineStipple) + ( display Unrouted6 stipple0 lineStyle1 blue blue solid ) + ( display resist stipple0 solid cyan cyan solid ) + ( display designFlow5 stipple1 lineStyle0 silver silver outlineStipple) + ( display CapWellNet brick solid slate slate outlineStipple) + ( display Unrouted7 stipple0 lineStyle1 purple purple solid ) + ( display CannotoccupyBnd blank solid red red outline ) + ( display winTopShadow solid solid white white solid ) + ( display designFlow4 stipple1 lineStyle0 black black outlineStipple) + ( display softFence stipple0 solid yellow yellow solid ) + ( display ResistorNet dots4 solid cyan cyan outlineStipple) + ( display winError solid solid winColor5 winColor5 solid ) + ( display changedLayerTl1 stipple0 solid yellow yellow solid ) + ( display prBoundaryLbl stipple0 solid purple purple solid ) + ( display ActXNet x solid yellow yellow outlineStipple) + ( display Pbase stipple10 lineStyle0 yellow yellow outlineStipple) + ( display Active dots2 lineStyle0 yellow yellow outlineStipple) + ( display changedLayerTl0 stipple0 solid red red solid ) + ( display spike stipple0 solid purple purple solid ) + ( display Metal3 grid solid navy violet outlineStipple) + ( display Metal4 grid solid tan tan outlineStipple) + ( display text blank solid white white outline ) + ( display Poly1Pin stipple0 lineStyle0 red red solid ) + ( display Row blank solid cyan cyan outline ) + ( display Pwell stipple9 lineStyle0 slate slate outlineStipple) + ( display Metal2 stipple5 lineStyle0 magenta magenta outlineStipple) + ( display wire solid lineStyle0 cyan cyan solid ) + ( display ActX solid solid yellow yellow solid ) + ( display Metal1 stipple6 lineStyle0 cadetBlue cadetBlue outlineStipple) + ( display Cannotoccupy blank solid red red outline ) + ( display GroupLbl stipple0 solid green green solid ) + ( display axis stipple0 solid slate slate solid ) + ( display SiBlockNet x dashed tan tan outlineStipple) + ( display edgeLayer stipple0 solid gray gray solid ) + ( display annotate2 stipple0 solid lime lime solid ) + ( display Metal1Pin stipple0 lineStyle0 blue blue solid ) + ( display Diode stipple7 lineStyle0 cream cream outlineStipple) + ( display Glass X lineStyle0 white white X ) + ( display ViaXNet x solid magenta magenta outlineStipple) + ( display annotate3 stipple0 solid cyan cyan solid ) + ( display Poly2 dots1 lineStyle0 orange orange outlineStipple) + ( display deviceAnt stipple0 solid yellow yellow solid ) + ( display winBottomShadow solid solid winColor1 winColor1 solid ) + ( display PselectNet dots4 solid brown brown outlineStipple) + ( display comment stipple0 lineStyle0 winBack winBack outline ) + ( display Poly1 dots lineStyle0 red red outlineStipple) + ( display Unrouted stipple0 lineStyle1 winColor5 winColor5 solid ) + ( display stretch stipple0 solid yellow yellow solid ) + ( display XP blank lineStyle0 winBack gold outline ) + ( display annotate1 stipple0 solid pink pink solid ) + ( display Group stipple2 solid green green outlineStipple) + ( display deviceLbl stipple0 solid green green solid ) + ( display annotate6 stipple0 solid silver silver solid ) + ( display GlassNet blank solid yellow yellow outline ) + ( display Canplace blank solid cyan cyan outline ) + ( display annotate7 stipple0 solid red red solid ) + ( display Via2 solid solid navy navy solid ) + ( display Metal2Pin stipple0 lineStyle0 magenta magenta solid ) + ( display annotate4 stipple0 solid yellow yellow solid ) + ( display device1 stipple1 lineStyle0 green green outlineStipple) + ( display "90" blank solid white white outline ) + ( display markerWarn x solid yellow yellow outlineStipple) + ( display text2 stipple1 lineStyle0 white white outlineStipple) + ( display CapacitorNet dots4 lineStyle0 tan tan outlineStipple) + ( display designFlow stipple1 lineStyle0 green green outlineStipple) + ( display hilite1 stipple0 solid silver silver solid ) + ( display device blank solid green green outline ) + ( display prBoundary stipple0 solid purple purple solid ) + ( display annotate5 stipple0 solid white white solid ) + ( display text1 stipple0 dashed white white solid ) + ( display Via solid solid magenta magenta solid ) + ( display Capacitor stipple7 lineStyle0 tan tan outlineStipple) + ( display markerErr x solid white white outlineStipple) + ( display unknown stipple0 solid yellow yellow solid ) + ( display annotate stipple0 solid orange orange solid ) + ( display P1ConNet x solid red red outlineStipple) + ( display hilite3 stipple0 solid cyan cyan solid ) + ( display winActiveBanner solid solid winColor3 winColor3 solid ) + ( display pinLbl stipple0 solid red red solid ) + ( display device2 stipple0 lineStyle1 green green solid ) + ( display grid stipple0 solid slate slate solid ) + ( display winBackground solid solid winBack winBack solid ) + ( display Metal1Net dots4 lineStyle0 blue blue outlineStipple) + ( display hilite2 stipple0 solid tan tan solid ) + ( display annotate8 stipple0 solid tan tan solid ) + ( display hilite5 stipple0 solid lime lime solid ) + ( display annotate9 stipple0 solid green green solid ) + ( display Metal2Net dots4 lineStyle0 magenta magenta outlineStipple) + ( display Metal3Pin stipple0 solid navy navy solid ) + ( display Metal4Pin stipple0 solid tan tan solid ) + ( display hilite4 stipple0 solid gray gray solid ) + ( display y0 stipple0 solid gray gray solid ) + ( display supply stipple0 solid lime lime solid ) + ( display ActiveNet dots4 lineStyle0 yellow yellow outlineStipple) + ( display hilite7 stipple0 solid cream cream solid ) + ( display y1 stipple0 solid brown brown solid ) + ( display defaultPacket x solid chocolate winColor2 outlineStipple) + ( display Via2Net cross solid navy navy outlineStipple) + ( display NselectNet dots4 solid green green outlineStipple) + ( display Unrouted8 stipple0 lineStyle1 gold gold solid ) + ( display hilite6 stipple0 solid orange orange solid ) + ( display y2 stipple0 solid red red solid ) + ( display winBorder solid solid winColor2 winColor2 solid ) + ( display Nwell dats5 thickLine slate slate outlineStipple) + ( display Unrouted9 stipple0 lineStyle1 silver silver solid ) + ( display hilite9 stipple0 solid pink pink solid ) + ( display SiBlock blank dashed tan tan outline ) + ( display y3 stipple0 solid orange orange solid ) + ( display prBoundaryBnd stipple0 solid cyan cyan solid ) + ( display winForeground solid solid winFore winFore solid ) + ( display hilite8 stipple0 solid magenta magenta solid ) + ( display y4 stipple0 solid yellow yellow solid ) + ( display Pselect dots1 solid brown brown outlineStipple) + ( display winInactiveBanner solid solid winColor4 winColor4 solid ) + ( display designFlow9 stipple1 lineStyle0 orange orange outlineStipple) + ( display winButton solid solid winFore winFore solid ) + ( display y5 stipple0 solid green green solid ) + ( display hiz stipple0 solid orange orange solid ) + ( display drive stipple0 solid blue blue solid ) + ( display wireFlt stipple0 dashed red red solid ) + ( display instanceLbl stipple0 solid gold gold solid ) + ( display P2ConNet x lineStyle0 orange orange outlineStipple) + ( display designFlow8 stipple1 lineStyle0 navy navy outlineStipple) + ( display y6 stipple0 solid blue blue solid ) + ( display PwellNet dots4 lineStyle0 slate slate outlineStipple) + ( display P1Con solid solid red red solid ) + ( display CapWell dagger solid slate slate outlineStipple) + ( display y7 stipple0 solid purple purple solid ) + ( display ViaX solid solid magenta magenta solid ) + ( display HR x solid chocolate winColor2 outlineStipple) + ( display HRnet x solid chocolate winColor2 outlineStipple) +) diff --git a/technology/scn4me_subm/tf/glade_scn4me_subm.py b/technology/scn4me_subm/tf/glade_scn4me_subm.py new file mode 100644 index 00000000..d2f9aa7e --- /dev/null +++ b/technology/scn4me_subm/tf/glade_scn4me_subm.py @@ -0,0 +1,7 @@ +import os +CWD = os.environ.get("OPENRAM_TECH") + "/scn3me_subm/tf" +ui().importCds("default", CWD+"/display.drf", CWD+"/mosis.tf", 1000, 1, CWD+"/layers.map") + + + + diff --git a/technology/scn4me_subm/tf/layers.map b/technology/scn4me_subm/tf/layers.map new file mode 100644 index 00000000..80b659d9 --- /dev/null +++ b/technology/scn4me_subm/tf/layers.map @@ -0,0 +1,18 @@ +Pwell drawing 41 0 +Nwell drawing 42 0 +Active drawing 43 0 +Poly1 drawing 46 0 +Pselect drawing 45 0 +Nselect drawing 44 0 +contact drawing 25 0 +P1Con drawing 47 0 +ActX drawing 48 0 +Metal1 drawing 49 0 +Via drawing 50 0 +Metal2 drawing 51 0 +Via2 drawing 61 0 +Metal3 drawing 62 0 +Via3 drawing 30 0 +Metal4 drawing 31 0 +Glass drawing 52 0 +comment drawing 63 0 diff --git a/technology/scn4me_subm/tf/mosis.tf b/technology/scn4me_subm/tf/mosis.tf new file mode 100644 index 00000000..e48d76a0 --- /dev/null +++ b/technology/scn4me_subm/tf/mosis.tf @@ -0,0 +1,850 @@ +; Generated on Sep 28 16:05:23 1998 +; with @(#)$CDS: icfb.exe version 4.4.1 06/17/98 23:40 (cds10067) $ +; +; Matt Clapp fixed: October 10, 2002 +; added via devices, deleted useless app-specific crap, +; added lxExtractRules so undo in layout editor doesn't +; complain. + + +;******************************** +; LAYER DEFINITION +;******************************** + +layerDefinitions( + techLayers( + ;( LayerName Layer# Abbreviation ) + ;( --------- ------ ------------ ) + ;User-Defined Layers: + ( P2Con 3 P2Con ) + ( Poly2 7 Poly2 ) + ( Pbase 10 Pbase ) + ( Resistor 16 Resisto ) + ( Capacitor 17 Capacit ) + ( Diode 18 Diode ) + ( SiBlock 29 SiBlock ) + ( HR 34 HR ) + ( Pwell 41 Pwell ) + ( Nwell 42 Nwell ) + ( Active 43 Active ) + ( Pselect 44 Pselect ) + ( Nselect 45 Nselect ) + ( Poly1 46 Poly1 ) + ( P1Con 47 P1Con ) + ( ActX 48 ActX ) + ( Metal1 49 Metal1 ) + ( Via 50 Via ) + ( Metal2 51 Metal2 ) + ( Glass 52 Glass ) + ( CapWell 59 CapWell ) + ( XP 60 XP ) + ( Via2 61 Via2 ) + ( Metal3 62 Metal3 ) + ( Via3 30 Via3 ) + ( Metal4 31 Metal4 ) + ( A1 80 A1 ) + ( A2 81 A2 ) + ( comment 117 comment ) + ;System-Reserved Layers: + ( Unrouted 200 Unroute ) + ( Row 201 Row ) + ( Group 202 Group ) + ( Cannotoccupy 203 Cannoto ) + ( Canplace 204 Canplac ) + ( hardFence 205 hardFen ) + ( softFence 206 softFen ) + ( y0 207 y0 ) + ( y1 208 y1 ) + ( y2 209 y2 ) + ( y3 210 y3 ) + ( y4 211 y4 ) + ( y5 212 y5 ) + ( y6 213 y6 ) + ( y7 214 y7 ) + ( y8 215 y8 ) + ( y9 216 y9 ) + ( designFlow 217 designF ) + ( stretch 218 stretch ) + ( edgeLayer 219 edgeLay ) + ( changedLayer 220 changed ) + ( unset 221 unset ) + ( unknown 222 unknown ) + ( spike 223 spike ) + ( hiz 224 hiz ) + ( resist 225 resist ) + ( drive 226 drive ) + ( supply 227 supply ) + ( wire 228 wire ) + ( pin 229 pin ) + ( text 230 text ) + ( device 231 device ) + ( border 232 border ) + ( snap 233 snap ) + ( align 234 align ) + ( prBoundary 235 prBound ) + ( instance 236 instanc ) + ( annotate 237 annotat ) + ( marker 238 marker ) + ( select 239 select ) + ( grid 251 grid ) + ( axis 252 axis ) + ( hilite 253 hilite ) + ( background 254 backgro ) + ) ;techLayers + + techPurposes( + ;( PurposeName Purpose# Abbreviation ) + ;( ----------- -------- ------------ ) + ;User-Defined Purposes: + ;System-Reserved Purposes: + ( warning 234 wng ) + ( tool1 235 tl1 ) + ( tool0 236 tl0 ) + ( label 237 lbl ) + ( flight 238 flt ) + ( error 239 err ) + ( annotate 240 ant ) + ( drawing1 241 dr1 ) + ( drawing2 242 dr2 ) + ( drawing3 243 dr3 ) + ( drawing4 244 dr4 ) + ( drawing5 245 dr5 ) + ( drawing6 246 dr6 ) + ( drawing7 247 dr7 ) + ( drawing8 248 dr8 ) + ( drawing9 249 dr9 ) + ( boundary 250 bnd ) + ( pin 251 pin ) + ( drawing 252 drw ) + ( net 253 net ) + ( cell 254 cel ) + ( all 255 all ) + ) ;techPurposes + + techLayerPurposePriorities( + ;layers are ordered from lowest to highest priority + ; (higher priority is drawn on top of lower priority) + ;( LayerName Purpose ) + ;( --------- ------- ) + ( background drawing ) + ( grid drawing ) + ( grid drawing1 ) + ( Nwell drawing ) + ( Pwell drawing ) + ( CapWell drawing ) + ( Pselect drawing ) + ( Nselect drawing ) + ( Active drawing ) + ( ActX drawing ) + ( SiBlock drawing ) + ( HR drawing ) + ( Poly1 drawing ) + ( P1Con drawing ) + ( Poly2 drawing ) + ( P2Con drawing ) + ( Metal1 drawing ) + ( Via drawing ) + ( Metal2 drawing ) + ( Via2 drawing ) + ( Metal3 drawing ) + ( annotate drawing ) + ( annotate drawing1 ) + ( annotate drawing2 ) + ( annotate drawing3 ) + ( annotate drawing4 ) + ( annotate drawing5 ) + ( annotate drawing6 ) + ( annotate drawing7 ) + ( annotate drawing8 ) + ( annotate drawing9 ) + ( Poly1 pin ) + ( Metal1 pin ) + ( Metal2 pin ) + ( Metal3 pin ) + ( Glass drawing ) + ( XP drawing ) + ( prBoundary drawing ) + ( prBoundary boundary ) + ( instance drawing ) + ( prBoundary label ) + ( instance label ) + ( Row drawing ) + ( Nwell net ) + ( align drawing ) + ( Pwell net ) + ( CapWell net ) + ( hardFence drawing ) + ( Active net ) + ( softFence drawing ) + ( Row label ) + ( Group drawing ) + ( Group label ) + ( Cannotoccupy drawing ) + ( Cannotoccupy boundary ) + ( Canplace drawing ) + ( ActX net ) + ( A2 drawing ) + ( A1 drawing ) + ( comment drawing ) + ( border drawing ) + ( Pselect net ) + ( Nselect net ) + ( SiBlock net ) + ( HR net ) + ( wire drawing ) + ( Poly1 net ) + ( wire label ) + ( P1Con net ) + ( wire flight ) + ( Metal1 net ) + ( device annotate ) + ( Metal2 net ) + ( device label ) + ( Via net ) + ( Metal3 net ) + ( Via2 net ) + ( pin label ) + ( text drawing ) + ( pin drawing ) + ( text drawing1 ) + ( pin annotate ) + ( device drawing ) + ( axis drawing ) + ( edgeLayer drawing ) + ( edgeLayer pin ) + ( snap drawing ) + ( stretch drawing ) + ( y0 drawing ) + ( y1 drawing ) + ( y2 drawing ) + ( y3 drawing ) + ( y4 drawing ) + ( y5 drawing ) + ( y6 drawing ) + ( y7 drawing ) + ( y8 drawing ) + ( y9 drawing ) + ( hilite drawing ) + ( hilite drawing1 ) + ( hilite drawing2 ) + ( hilite drawing3 ) + ( hilite drawing4 ) + ( hilite drawing5 ) + ( hilite drawing6 ) + ( hilite drawing7 ) + ( hilite drawing8 ) + ( hilite drawing9 ) + ( select drawing ) + ( drive drawing ) + ( hiz drawing ) + ( resist drawing ) + ( spike drawing ) + ( supply drawing ) + ( unknown drawing ) + ( unset drawing ) + ( designFlow drawing ) + ( designFlow drawing1 ) + ( designFlow drawing2 ) + ( designFlow drawing3 ) + ( designFlow drawing4 ) + ( designFlow drawing5 ) + ( designFlow drawing6 ) + ( designFlow drawing7 ) + ( designFlow drawing8 ) + ( designFlow drawing9 ) + ( changedLayer tool0 ) + ( changedLayer tool1 ) + ( marker warning ) + ( marker error ) + ( device drawing1 ) + ( Pbase drawing ) + ( Pbase net ) + ( Resistor net ) + ( Resistor drawing ) + ( Capacitor net ) + ( Capacitor drawing ) + ( Diode net ) + ( Diode drawing ) + ( Poly2 net ) + ( P2Con net ) + ( device drawing2 ) + ( Unrouted drawing ) + ( text drawing2 ) + ( Unrouted drawing1 ) + ( Unrouted drawing2 ) + ( Unrouted drawing3 ) + ( Unrouted drawing4 ) + ( Unrouted drawing5 ) + ( Unrouted drawing6 ) + ( Unrouted drawing7 ) + ( Unrouted drawing8 ) + ( Unrouted drawing9 ) + ) ;techLayerPurposePriorities + + techDisplays( + ;( LayerName Purpose Packet Vis Sel Con2ChgLy DrgEnbl Valid ) + ;( --------- ------- ------ --- --- --------- ------- ----- ) + ( background drawing background t nil nil nil nil ) + ( grid drawing grid t nil nil nil nil ) + ( grid drawing1 grid1 t nil nil nil nil ) + ( Nwell drawing Nwell t t t t t ) + ( Pwell drawing Pwell t t t t nil ) + ( Active drawing Active t t t t t ) + ( ActX drawing ActX t t t t t ) + ( Pselect drawing Pselect t t t t t ) + ( Nselect drawing Nselect t t t t t ) + ( SiBlock drawing SiBlock t t t t t ) + ( HR drawing HR t t t t t ) + ( CapWell drawing CapWell t t t t t ) + ( Poly1 drawing Poly1 t t t t t ) + ( P1Con drawing P1Con t t t t t ) + ( Metal1 drawing Metal1 t t t t t ) + ( Via drawing Via t t t t t ) + ( Metal2 drawing Metal2 t t t t t ) + ( annotate drawing annotate t t nil t nil ) + ( annotate drawing1 annotate1 t t nil t nil ) + ( annotate drawing2 annotate2 t t nil t nil ) + ( annotate drawing3 annotate3 t t nil t nil ) + ( annotate drawing4 annotate4 t t nil t nil ) + ( annotate drawing5 annotate5 t t nil t nil ) + ( annotate drawing6 annotate6 t t nil t nil ) + ( annotate drawing7 annotate7 t t nil t nil ) + ( annotate drawing8 annotate8 t t nil t nil ) + ( annotate drawing9 annotate9 t t nil t nil ) + ( Via2 drawing Via2 t t t t t ) + ( Metal3 drawing Metal3 t t t t t ) + ( Glass drawing Glass t t t nil t ) + ( XP drawing XP t t t nil t ) + ( Metal1 pin Metal1Pin t t t nil t ) + ( Metal2 pin Metal2Pin t t t nil t ) + ( Metal3 pin Metal3Pin t t t nil t ) + ( Poly1 pin Poly1Pin t t t nil t ) + ( prBoundary drawing prBoundary t t nil t nil ) + ( prBoundary boundary prBoundaryBnd t t nil t nil ) + ( instance drawing instance t t nil t t ) + ( prBoundary label prBoundaryLbl t t t t nil ) + ( instance label instanceLbl t t t t nil ) + ( Row drawing Row t t t t nil ) + ( Nwell net NwellNet t t t nil nil ) + ( align drawing align t t nil t nil ) + ( Pwell net PwellNet t t t nil nil ) + ( CapWell net CapWellNet t t t nil nil ) + ( SiBlock net SiBlockNet t t t nil nil ) + ( HR net HRnet t t t nil nil ) + ( hardFence drawing hardFence t t t t nil ) + ( Active net ActiveNet t t t nil nil ) + ( softFence drawing softFence t t t t nil ) + ( Row label RowLbl t t t t nil ) + ( Group drawing Group t t t t nil ) + ( Group label GroupLbl t t t t nil ) + ( Cannotoccupy drawing Cannotoccupy t t t t nil ) + ( Cannotoccupy boundary CannotoccupyBnd t t t t nil ) + ( Canplace drawing Canplace t t t t nil ) + ( ActX net ActXNet t t t nil nil ) + ( A2 drawing A2 t t t t nil ) + ( A1 drawing A1 t t t t nil ) + ( comment drawing comment t t t t nil ) + ( border drawing border t t t t nil ) + ( Pselect net PselectNet t t t nil nil ) + ( Nselect net NselectNet t t t nil nil ) + ( wire drawing wire t t t t nil ) + ( Poly1 net Poly1Net t t t nil nil ) + ( wire label wireLbl t t t t nil ) + ( P1Con net P1ConNet t t t nil nil ) + ( wire flight wireFlt t t t t nil ) + ( Metal1 net Metal1Net t t t nil nil ) + ( device annotate deviceAnt t t t t nil ) + ( Metal2 net Metal2Net t t t nil nil ) + ( Metal3 net Metal3Net t t t nil nil ) + ( device label deviceLbl t t t t nil ) + ( Via net ViaNet t t t nil nil ) + ( Via2 net Via2Net t t t nil nil ) + ( pin label pinLbl t t t t nil ) + ( text drawing text t t t t t ) + ( pin drawing pin t t t t nil ) + ( text drawing1 text1 t t t t nil ) + ( pin annotate pinAnt t t t t nil ) + ( device drawing device t t t t nil ) + ( axis drawing axis t t t t nil ) + ( edgeLayer drawing edgeLayer t t nil t nil ) + ( edgeLayer pin edgeLayerPin t t nil t nil ) + ( snap drawing snap t t nil t nil ) + ( stretch drawing stretch t t nil t nil ) + ( y0 drawing y0 t t nil t nil ) + ( y1 drawing y1 t t nil t nil ) + ( y2 drawing y2 t t nil t nil ) + ( y3 drawing y3 t t nil t nil ) + ( y4 drawing y4 t t nil t nil ) + ( y5 drawing y5 t t nil t nil ) + ( y6 drawing y6 t t nil t nil ) + ( y7 drawing y7 t t nil t nil ) + ( y8 drawing y8 t t nil t nil ) + ( y9 drawing y9 t t nil t nil ) + ( hilite drawing hilite t t nil t nil ) + ( hilite drawing1 hilite1 t t t t nil ) + ( hilite drawing2 hilite2 t t nil t nil ) + ( hilite drawing3 hilite3 t t t t nil ) + ( hilite drawing4 hilite4 t t t t nil ) + ( hilite drawing5 hilite5 t t t t nil ) + ( hilite drawing6 hilite6 t t t t nil ) + ( hilite drawing7 hilite7 t t t t nil ) + ( hilite drawing8 hilite8 t t t t nil ) + ( hilite drawing9 hilite9 t t t t nil ) + ( select drawing select t t nil t nil ) + ( drive drawing drive t t t t nil ) + ( hiz drawing hiz t t t t nil ) + ( resist drawing resist t t t t nil ) + ( spike drawing spike t t t t nil ) + ( supply drawing supply t t t t nil ) + ( unknown drawing unknown t t t t nil ) + ( unset drawing unset t t t t nil ) + ( designFlow drawing designFlow t t t nil nil ) + ( designFlow drawing1 designFlow1 t t t nil nil ) + ( designFlow drawing2 designFlow2 t t t nil nil ) + ( designFlow drawing3 designFlow3 t t t nil nil ) + ( designFlow drawing4 designFlow4 t t t nil nil ) + ( designFlow drawing5 designFlow5 t t t nil nil ) + ( designFlow drawing6 designFlow6 t t t nil nil ) + ( designFlow drawing7 designFlow7 t t t nil nil ) + ( designFlow drawing8 designFlow8 t t t nil nil ) + ( designFlow drawing9 designFlow9 t t t nil nil ) + ( changedLayer tool0 changedLayerTl0 nil nil nil nil nil ) + ( changedLayer tool1 changedLayerTl1 nil nil t nil nil ) + ( marker warning markerWarn t t t t nil ) + ( marker error markerErr t t t t nil ) + ( device drawing1 device1 t t t t nil ) + ( Poly2 net Poly2Net t t t nil nil ) + ( Poly2 drawing Poly2 t t t t t ) + ( P2Con net P2ConNet t t t nil nil ) + ( P2Con drawing P2Con t t t t t ) + ( Pbase net PbaseNet t t t nil nil ) + ( Pbase drawing Pbase t t t t t ) + ( Resistor net ResistorNet t t t nil nil ) + ( Resistor drawing Resistor t t t t t ) + ( Capacitor net CapacitorNet t t t nil nil ) + ( Capacitor drawing Capacitor t t t t t ) + ( Diode net DiodeNet t t t nil nil ) + ( Diode drawing Diode t t t t t ) + ( device drawing2 device2 t t t t nil ) + ( Unrouted drawing Unrouted t t t t nil ) + ( text drawing2 text2 t t t t nil ) + ( Unrouted drawing1 Unrouted1 t t t t nil ) + ( Unrouted drawing2 Unrouted2 t t t t nil ) + ( Unrouted drawing3 Unrouted3 t t t t nil ) + ( Unrouted drawing4 Unrouted4 t t t t nil ) + ( Unrouted drawing5 Unrouted5 t t t t nil ) + ( Unrouted drawing6 Unrouted6 t t t t nil ) + ( Unrouted drawing7 Unrouted7 t t t t nil ) + ( Unrouted drawing8 Unrouted8 t t t t nil ) + ( Unrouted drawing9 Unrouted9 t t t t nil ) + ) ;techDisplays + +; I don't think the following is necessary (or used!) +techLayerProperties( +;( PropName Layer1 [ Layer2 ] PropValue ) + ( contactLimit P2Con 10000 ) + ( eqPinLimit P2Con 10000 ) + ( horizontalJogLength P2Con 2147483648.000000 ) + ( routingGrid P2Con 1.000000 ) + ( verticalJogLength P2Con 2147483648.000000 ) + ( routingGrid Poly2 1.000000 ) + ( contactLimit Active 10000 ) + ( eqPinLimit Active 10000 ) + ( horizontalJogLength Active 2147483648.000000 ) + ( routingGrid Active 1.000000 ) + ( verticalJogLength Active 2147483648.000000 ) + ( routingGrid Poly1 1.000000 ) + ( contactLimit P1Con 10000 ) + ( eqPinLimit P1Con 10000 ) + ( horizontalJogLength P1Con 2147483648.000000 ) + ( routingGrid P1Con 1.000000 ) + ( verticalJogLength P1Con 2147483648.000000 ) + ( contactLimit ActX 10000 ) + ( eqPinLimit ActX 10000 ) + ( horizontalJogLength ActX 2147483648.000000 ) + ( routingGrid ActX 1.000000 ) + ( verticalJogLength ActX 2147483648.000000 ) + ( routingGrid Metal1 1.000000 ) + ( contactLimit Via 10000 ) + ( eqPinLimit Via 10000 ) + ( horizontalJogLength Via 2147483648.000000 ) + ( routingGrid Via 1.000000 ) + ( verticalJogLength Via 2147483648.000000 ) + ( routingGrid Metal2 1.000000 ) +) + +) ;layerDefinitions + + +;******************************** +; DEVICE RULES +;******************************** + +devices( + tcCreateCDSDeviceClass() + + symContactDevice( + ;( deviceName viaLayer viaPurpose + ( VIA Via drawing + + ; layer1 purpose1 [implant1] + Metal1 drawing + + ; layer2 purpose2 [implant2] + Metal2 drawing + + ; width length [( row column xPitch yPitch xBias yBias )] + ; 2 2 ( 1 1 _NA_ _NA_ _NA_ _NA_ ) + 2 2 + + ; encLayer1 encLayer2 legalRegion ) + 1 1 _NA_) + ) ;symContactDevice + + symContactDevice( + ;( deviceName viaLayer viaPurpose + ( VIA2 Via2 drawing + + ; layer1 purpose1 [implant1] + Metal2 drawing + + ; layer2 purpose2 [implant2] + Metal3 drawing + + ; width length [( row column xPitch yPitch xBias yBias )] + ; 2 2 ( 1 1 _NA_ _NA_ _NA_ _NA_ ) + 2 2 + + ; encLayer1 encLayer2 legalRegion ) + 1 2 _NA_) + ) ;symContactDevice + +) ;devices + + +;******************************** +; LAYER RULES +;******************************** + +layerRules( + streamLayers( + ;( layer streamNumber dataType translate ) + ;( ----- ------------ -------- --------- ) + ( ("background" "drawing") 0 0 nil ) + ( ("grid" "drawing") 0 0 nil ) + ( ("grid" "drawing1") 0 0 nil ) + ( ("Nwell" "drawing") 42 0 t ) + ( ("Pwell" "drawing") 41 0 t ) + ( ("Active" "drawing") 43 0 t ) + ( ("ActX" "drawing") 48 0 t ) + ( ("Pselect" "drawing") 44 0 t ) + ( ("Nselect" "drawing") 45 0 t ) + ( ("Poly1" "drawing") 46 0 t ) + ( ("P1Con" "drawing") 47 0 t ) + ( ("Metal1" "drawing") 49 0 t ) + ( ("Metal2" "drawing") 51 0 t ) + ( ("annotate" "drawing") 0 0 nil ) + ( ("annotate" "drawing1") 0 0 nil ) + ( ("annotate" "drawing2") 0 0 nil ) + ( ("annotate" "drawing3") 0 0 nil ) + ( ("annotate" "drawing4") 0 0 nil ) + ( ("annotate" "drawing5") 0 0 nil ) + ( ("annotate" "drawing6") 0 0 nil ) + ( ("annotate" "drawing7") 0 0 nil ) + ( ("annotate" "drawing8") 0 0 nil ) + ( ("annotate" "drawing9") 0 0 nil ) + ( ("Via" "drawing") 50 0 t ) + ( ("Glass" "drawing") 52 0 t ) + ( ("XP" "drawing") 60 0 t ) + ( ("Metal2" "pin") 0 0 nil ) + ( ("Poly1" "pin") 0 0 nil ) + ( ("prBoundary" "drawing") 0 0 nil ) + ( ("Metal1" "pin") 0 0 nil ) + ( ("prBoundary" "boundary") 0 0 nil ) + ( ("instance" "drawing") 246 0 nil ) + ( ("instance" "label") 0 0 nil ) + ( ("Nwell" "net") 0 0 nil ) + ( ("align" "drawing") 0 0 nil ) + ( ("Pwell" "net") 0 0 nil ) + ( ("hardFence" "drawing") 0 0 nil ) + ( ("Active" "net") 0 0 nil ) + ( ("softFence" "drawing") 0 0 nil ) + ( ("ActX" "net") 0 0 nil ) + ( ("A2" "drawing") 5 0 nil ) + ( ("A1" "drawing") 2 0 nil ) + ( ("comment" "drawing") 0 0 nil ) + ( ("border" "drawing") 0 0 nil ) + ( ("Pselect" "net") 0 0 nil ) + ( ("Nselect" "net") 0 0 nil ) + ( ("wire" "drawing") 0 0 nil ) + ( ("Poly1" "net") 0 0 nil ) + ( ("P1Con" "net") 0 0 nil ) + ( ("Metal1" "net") 0 0 nil ) + ( ("Metal2" "net") 0 0 nil ) + ( ("device" "label") 0 0 nil ) + ( ("Via" "net") 0 0 nil ) + ( ("pin" "label") 0 0 nil ) + ( ("text" "drawing") 63 0 t ) + ( ("pin" "drawing") 0 0 nil ) + ( ("device" "drawing") 0 0 nil ) + ( ("axis" "drawing") 0 0 nil ) + ( ("edgeLayer" "drawing") 0 0 nil ) + ( ("edgeLayer" "pin") 0 0 nil ) + ( ("snap" "drawing") 0 0 nil ) + ( ("stretch" "drawing") 0 0 nil ) + ( ("y0" "drawing") 0 0 nil ) + ( ("y1" "drawing") 0 0 nil ) + ( ("y2" "drawing") 0 0 nil ) + ( ("y3" "drawing") 0 0 nil ) + ( ("y4" "drawing") 0 0 nil ) + ( ("y5" "drawing") 0 0 nil ) + ( ("y6" "drawing") 0 0 nil ) + ( ("y7" "drawing") 0 0 nil ) + ( ("y8" "drawing") 0 0 nil ) + ( ("y9" "drawing") 0 0 nil ) + ( ("hilite" "drawing") 0 0 nil ) + ( ("hilite" "drawing2") 0 0 nil ) + ( ("select" "drawing") 0 0 nil ) + ( ("drive" "drawing") 0 0 nil ) + ( ("hiz" "drawing") 0 0 nil ) + ( ("resist" "drawing") 0 0 nil ) + ( ("spike" "drawing") 0 0 nil ) + ( ("supply" "drawing") 0 0 nil ) + ( ("unknown" "drawing") 0 0 nil ) + ( ("unset" "drawing") 0 0 nil ) + ( ("changedLayer" "tool0") 0 0 nil ) + ( ("Resistor" "net") 0 0 nil ) + ( ("Resistor" "drawing") 0 0 nil ) + ( ("Capacitor" "net") 0 0 nil ) + ( ("Capacitor" "drawing") 0 0 nil ) + ( ("Diode" "net") 0 0 nil ) + ( ("Diode" "drawing") 0 0 nil ) + ( ("Poly2" "net") 0 0 nil ) + ( ("Poly2" "drawing") 0 0 nil ) + ( ("P2Con" "net") 0 0 nil ) + ( ("P2Con" "drawing") 0 0 nil ) + ( ("Pbase" "drawing") 0 0 nil ) + ( ("Pbase" "net") 0 0 nil ) + ( P2Con 0 0 nil ) + ( Poly2 0 0 nil ) + ( Pwell 0 0 nil ) + ( Nwell 0 0 nil ) + ( Active 0 0 nil ) + ( Pselect 0 0 nil ) + ( Nselect 0 0 nil ) + ( Poly1 0 0 nil ) + ( P1Con 0 0 nil ) + ( ActX 0 0 nil ) + ( Metal1 0 0 nil ) + ( Via 0 0 nil ) + ( Metal2 0 0 nil ) + ( Glass 0 0 nil ) + ( XP 0 0 nil ) + ( ("Via2" "drawing") 50 0 t ) + ( ("Via2" "net") 0 0 nil ) + ( ("Metal3" "drawing") 50 0 t ) + ( ("Metal3" "net") 0 0 nil ) + ( ("Metal3" "pin") 0 0 nil ) + ( ("CapWell" "drawing") 0 0 nil ) + ( ("CapWell" "net") 0 0 nil ) + ( ("SiBlock" "drawing") 0 0 nil ) + ( ("SiBlock" "net") 0 0 nil ) + ( ("HR" "drawing") 0 0 nil ) + ( ("HR" "net") 0 0 nil ) + ) ;streamLayers + + viaLayers( + ;( layer1 viaLayer layer2 ) + ;( ------ -------- ------ ) + ( Metal2 Via2 Metal3 ) + ( Metal1 Via Metal2 ) + ( Active ActX Poly1 ) + ( Poly1 P1Con Metal1 ) + ( Poly2 P2Con Metal1 ) + ) ;viaLayers + +) ;layerRules + + +;******************************** +; PHYSICAL RULES +;******************************** + +physicalRules( + orderedSpacingRules( + ;( rule layer1 layer2 value ) + ;( ---- ------ ------ ----- ) + ( minEnclosure "prBoundary" "Metal1" 0.0 ) + ( minEnclosure "Metal2" "Via" 1.0 ) + ( minEnclosure "Metal1" "Via" 1.0 ) + ( minEnclosure "Metal1" "P1Con" 1.0 ) + ( minEnclosure "Metal1" "ActX" 1.0 ) + ( minEnclosure "Nselect" "Active" 2.0 ) + ( minEnclosure "Pselect" "Active" 2.0 ) + ( minEnclosure "Active" "ActX" 1.0 ) + ( minEnclosure "Pwell" "Active" 5.0 ) + ( minEnclosure "Nwell" "Active" 5.0 ) + ) ;orderedSpacingRules + + spacingRules( + ;( rule layer1 layer2 value ) + ;( ---- ------ ------ ----- ) + ( minSpacing "P2Con" 2.0 ) + ( minSpacing "Poly2" 3.0 ) + ( minSpacing "Pwell" 9.0 ) + ( minSpacing "Nwell" 9.0 ) + ( minSpacing "Active" 3.0 ) + ( minSpacing "Pselect" 2.0 ) + ( minSpacing "Nselect" 2.0 ) + ( minSpacing "Poly1" 2.0 ) + ( minSpacing "P1Con" 2.0 ) + ( minSpacing "ActX" 2.0 ) + ( minSpacing "Metal1" 3.0 ) + ( minSpacing "Via" 3.0 ) + ( minSpacing "Via2" 3.0 ) + ( minSpacing "Metal2" 3.0 ) + ( minSpacing "Metal3" 4.0 ) + ( minSpacing "Glass" 75.0 ) + ( minSpacing "XP" 100.0 ) + ( minSpacing "Metal2" 4.0 ) + ( minSpacing "P1Con" "Via" 2.0 ) + ( minSpacing "ActX" "Via" 2.0 ) + ( minSpacing "ActX" "P2Con" 2.0 ) + ( minSpacing "Poly2" "P2Con" 4.0 ) + ( minSpacing "Poly1" "P1Con" 4.0 ) + ( minSpacing "ActX" "P1Con" 2.0 ) + ( minSpacing "Active" "P1Con" 2.0 ) + ( minSpacing "Active" "Poly2" 2.0 ) + ( minSpacing "Poly1" "Poly2" 2.0 ) + ( minSpacing "Active" "Poly1" 2.0 ) + ( minSpacing "ActX" "Poly1" 2.0 ) + ( minSpacing "Pselect" "Nselect" 0.0 ) + ( minSpacing "Nwell" "Pwell" 9.0 ) + ( minWidth "P2Con" 2.0 ) + ( minWidth "Poly2" 3.0 ) + ( minWidth "Pwell" 10.0 ) + ( minWidth "Nwell" 10.0 ) + ( minWidth "Active" 3.0 ) + ( minWidth "Pselect" 2.0 ) + ( minWidth "Nselect" 2.0 ) + ( minWidth "Poly1" 2.0 ) + ( minWidth "P1Con" 2.0 ) + ( minWidth "ActX" 2.0 ) + ( minWidth "Metal1" 4.0 ) + ( minWidth "Via" 2.0 ) + ( minWidth "Metal2" 4.0 ) + ( minWidth "Glass" 75.0 ) + ( minWidth "XP" 100.0 ) + ( minWidth "Metal3" 6.0 ) + ) ;spacingRules + + mfgGridResolution( + ( 1.000000 ) + ) ;mfgGridResolution + +) ;physicalRules + + +;******************************** +; ELECTRICAL RULES +;******************************** + +electricalRules( + characterizationRules( + ;( rule layer1 layer2 value ) + ;( ---- ------ ------ ----- ) + ( areaCap "P2Con" 0.0 ) + ( areaCap "Poly2" 0.0 ) + ( areaCap "Active" 0.0 ) + ( areaCap "Poly1" 6e-05 ) + ( areaCap "P1Con" 0.0 ) + ( areaCap "ActX" 0.0 ) + ( areaCap "Metal1" 2.6e-05 ) + ( areaCap "Via" 0.0 ) + ( areaCap "Metal2" 1.6e-05 ) + ( edgeCapacitance "P2Con" 0.0 ) + ( edgeCapacitance "Poly2" 0.0 ) + ( edgeCapacitance "Active" 0.0 ) + ( edgeCapacitance "Poly1" 0.0 ) + ( edgeCapacitance "P1Con" 0.0 ) + ( edgeCapacitance "ActX" 0.0 ) + ( edgeCapacitance "Metal1" 0.0 ) + ( edgeCapacitance "Via" 0.0 ) + ( edgeCapacitance "Metal2" 0.0 ) + ( sheetRes "P2Con" 0.0 ) + ( sheetRes "Poly2" 0.0 ) + ( sheetRes "Active" 0.0 ) + ( sheetRes "Poly1" 23.0 ) + ( sheetRes "P1Con" 0.0 ) + ( sheetRes "ActX" 0.0 ) + ( sheetRes "Metal1" 0.04 ) + ( sheetRes "Via" 0.0 ) + ( sheetRes "Metal2" 0.07 ) + ( currentDensity "P2Con" 1.0 ) + ( currentDensity "Poly2" 1.0 ) + ( currentDensity "Active" 1.0 ) + ( currentDensity "Poly1" 1.0 ) + ( currentDensity "P1Con" 1.0 ) + ( currentDensity "ActX" 1.0 ) + ( currentDensity "Metal1" 1.0 ) + ( currentDensity "Via" 1.0 ) + ( currentDensity "Metal2" 1.0 ) + ) ;characterizationRules + +) ;electricalRules + + +;******************************** +; LAYOUT EDITOR RULES +;******************************** +; specifies the ordering of the layers in the LSW + +leRules( + leLswLayers( + ;( layer purpose ) + ; ----- ------- ) + ( Nwell drawing ) + ( Pselect drawing ) + ( Nselect drawing ) + ( Active drawing ) + ( ActX drawing ) + ( Poly1 drawing ) + ( P1Con drawing ) + ( Metal1 drawing ) + ( Via drawing ) + ( Metal2 drawing ) + ( Via2 drawing ) + ( Metal3 drawing ) + ( Poly1 pin ) + ( Metal1 pin ) + ( Metal2 pin ) + ( Metal3 pin ) + ( Poly2 drawing ) + ( P2Con drawing ) + ( instance drawing ) + ( text drawing ) + ( CapWell drawing ) + ( SiBlock drawing ) + ( HR drawing ) + ( Pbase drawing ) + ( Resistor drawing ) + ( Capacitor drawing ) + ( Diode drawing ) + ( Glass drawing ) + ( XP drawing ) + + ) ;leLswLayers +) ;leRules + + +;******************************** +; VIRTUOSO XL RULES +;******************************** +; specifies the ordering of the layers in the LSW + +lxRules( + lxExtractLayers( + (Metal1 Metal2 Metal3) + ) ;lxExtractLayers +) ;lxRules +