diff --git a/compiler/characterizer/delay.py b/compiler/characterizer/delay.py
index 24db899c..ca51f358 100644
--- a/compiler/characterizer/delay.py
+++ b/compiler/characterizer/delay.py
@@ -716,6 +716,7 @@ class delay():
             for load in loads:
                 self.set_load_slew(load,slew)
                 bank_delay = sram.analytical_delay(self.slew,self.load)
+                # Convert from ps to ns
                 delay_lh.append(bank_delay.delay/1e3)
                 delay_hl.append(bank_delay.delay/1e3)
                 slew_lh.append(bank_delay.slew/1e3)
diff --git a/compiler/pgates/pnor2.py b/compiler/pgates/pnor2.py
index e9a71bb4..b59f8733 100644
--- a/compiler/pgates/pnor2.py
+++ b/compiler/pgates/pnor2.py
@@ -219,7 +219,7 @@ class pnor2(pgate.pgate):
     def input_load(self):
         return ((self.nmos_size+self.pmos_size)/parameter["min_tx_size"])*spice["min_tx_gate_c"]
 
-    def analytical_delay(self, vdd, temp, load):
+    def analytical_delay(self, slew, load=0.0):
         r = spice["min_tx_r"]/(self.nmos_size/parameter["min_tx_size"])
         c_para = spice["min_tx_drain_c"]*(self.nmos_size/parameter["min_tx_size"])#ff
         return self.cal_delay_with_rc(r = r, c =  c_para+load, slew = slew)