diff --git a/compiler/modules/sense_amp.py b/compiler/modules/sense_amp.py
index eb624111..0318d7bc 100644
--- a/compiler/modules/sense_amp.py
+++ b/compiler/modules/sense_amp.py
@@ -35,6 +35,14 @@ class sense_amp(design.design):
     def get_br_names(self):
         return "br"
 
+    @property
+    def dout_name(self):
+        return "dout"
+
+    @property
+    def en_name(self):
+        return "en"
+
     def __init__(self, name):
         design.design.__init__(self, name)
         debug.info(2, "Create sense_amp")
@@ -79,11 +87,10 @@ class sense_amp(design.design):
     def get_enable_name(self):
         """Returns name used for enable net"""
         #FIXME: A better programmatic solution to designate pins
-        enable_name = "en"
+        enable_name = self.en_name
         debug.check(enable_name in self.pin_names, "Enable name {} not found in pin list".format(enable_name))
         return enable_name
     
     def build_graph(self, graph, inst_name, port_nets):        
         """Adds edges based on inputs/outputs. Overrides base class function."""
         self.add_graph_edges(graph, port_nets) 
-        
\ No newline at end of file
diff --git a/compiler/modules/sense_amp_array.py b/compiler/modules/sense_amp_array.py
index f62b7a1d..452c0767 100644
--- a/compiler/modules/sense_amp_array.py
+++ b/compiler/modules/sense_amp_array.py
@@ -41,6 +41,14 @@ class sense_amp_array(design.design):
         br_name = self.amp.get_br_names()
         return br_name
 
+    @property
+    def data_name(self):
+        return "data"
+
+    @property
+    def en_name(self):
+        return "en"
+
     def create_netlist(self):
         self.add_modules()
         self.add_pins()
@@ -62,10 +70,10 @@ class sense_amp_array(design.design):
 
     def add_pins(self):
         for i in range(0,self.word_size):
-            self.add_pin("data_{0}".format(i), "OUTPUT")
-            self.add_pin("bl_{0}".format(i), "INPUT")
-            self.add_pin("br_{0}".format(i), "INPUT")
-        self.add_pin("en", "INPUT")
+            self.add_pin(self.data_name + "_{0}".format(i), "OUTPUT")
+            self.add_pin(self.get_bl_name() + "_{0}".format(i), "INPUT")
+            self.add_pin(self.get_br_name() + "_{0}".format(i), "INPUT")
+        self.add_pin(self.en_name, "INPUT")
         self.add_pin("vdd", "POWER")
         self.add_pin("gnd", "GROUND")
         
@@ -85,10 +93,10 @@ class sense_amp_array(design.design):
             name = "sa_d{0}".format(i)
             self.local_insts.append(self.add_inst(name=name,
                                                   mod=self.amp))
-            self.connect_inst(["bl_{0}".format(i),
-                               "br_{0}".format(i), 
-                               "data_{0}".format(i), 
-                               "en", "vdd", "gnd"])
+            self.connect_inst([self.get_bl_name() + "_{0}".format(i),
+                               self.get_br_name() + "_{0}".format(i),
+                               self.data_name + "_{0}".format(i),
+                               self.en_name, "vdd", "gnd"])
 
     def place_sense_amp_array(self):
         from tech import cell_properties
@@ -128,22 +136,22 @@ class sense_amp_array(design.design):
                                start_layer="m2",
                                vertical=True)
 
-            bl_pin = inst.get_pin("bl")            
-            br_pin = inst.get_pin("br")
-            dout_pin = inst.get_pin("dout")
-            
-            self.add_layout_pin(text="bl_{0}".format(i),
+            bl_pin = inst.get_pin(inst.mod.get_bl_names())
+            br_pin = inst.get_pin(inst.mod.get_br_names())
+            dout_pin = inst.get_pin(inst.mod.dout_name)
+
+            self.add_layout_pin(text=self.get_bl_name() + "_{0}".format(i),
                                 layer="m2",
                                 offset=bl_pin.ll(),
                                 width=bl_pin.width(),
                                 height=bl_pin.height())
-            self.add_layout_pin(text="br_{0}".format(i),
+            self.add_layout_pin(text=self.get_br_name() + "_{0}".format(i),
                                 layer="m2",
                                 offset=br_pin.ll(),
                                 width=br_pin.width(),
                                 height=br_pin.height())
-                           
-            self.add_layout_pin(text="data_{0}".format(i),
+
+            self.add_layout_pin(text=self.data_name + "_{0}".format(i),
                                 layer="m2",
                                 offset=dout_pin.ll(),
                                 width=dout_pin.width(),
@@ -152,8 +160,8 @@ class sense_amp_array(design.design):
             
     def route_rails(self):
         # add sclk rail across entire array
-        sclk_offset = self.amp.get_pin("en").ll().scale(0,1)
-        self.add_layout_pin(text="en",
+        sclk_offset = self.amp.get_pin(self.amp.en_name).ll().scale(0,1)
+        self.add_layout_pin(text=self.en_name,
                       layer="m1",
                       offset=sclk_offset,
                       width=self.width,