From 66ff1fe990e29d44cb2bd5a4917abec414a3d49a Mon Sep 17 00:00:00 2001
From: mrg <mrg@ucsc.edu>
Date: Wed, 6 Jan 2021 15:14:56 -0800
Subject: [PATCH] Only unblock source/target instead of all components for
 cleaner routes

---
 compiler/router/grid.py               | 4 +++-
 compiler/router/router.py             | 7 ++++---
 compiler/router/supply_tree_router.py | 4 +---
 3 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/compiler/router/grid.py b/compiler/router/grid.py
index bd4a118f..ae6e04ee 100644
--- a/compiler/router/grid.py
+++ b/compiler/router/grid.py
@@ -90,6 +90,7 @@ class grid:
         else:
             self.add_map(n)
             self.map[n].source=True
+            self.map[n].blocked=False
             self.source.add(n)
 
     def clear_target(self):
@@ -104,8 +105,9 @@ class grid:
         else:
             self.add_map(n)
             self.map[n].target=True
+            self.map[n].blocked=False
             self.target.add(n)
-
+            
     def add_source(self, track_list):
         debug.info(3, "Adding source list={0}".format(str(track_list)))
         for n in track_list:
diff --git a/compiler/router/router.py b/compiler/router/router.py
index 8eca50d4..d666fcb5 100644
--- a/compiler/router/router.py
+++ b/compiler/router/router.py
@@ -355,7 +355,7 @@ class router(router_tech):
         # Start fresh. Not the best for run-time, but simpler.
         self.clear_blockages()
         # This adds the initial blockges of the design
-        #print("BLOCKING:", self.blocked_grids)
+        # print("BLOCKING:", self.blocked_grids)
         self.set_blockages(self.blocked_grids, True)
 
         # Block all of the supply rails
@@ -382,8 +382,9 @@ class router(router_tech):
         # Don't mark the other components as targets since we want to route
         # directly to a rail, but unblock all the source components so we can
         # route over them
-        blockage_grids = {y for x in self.pin_groups[pin_name] for y in x.grids}
-        self.set_blockages(blockage_grids, False)
+        # 1/6/21: This would cause things that looked like loops in the supply tree router
+        # blockage_grids = {y for x in self.pin_groups[pin_name] for y in x.grids}
+        # self.set_blockages(blockage_grids, False)
 
     def convert_shape_to_units(self, shape):
         """
diff --git a/compiler/router/supply_tree_router.py b/compiler/router/supply_tree_router.py
index b4149211..d2db1e29 100644
--- a/compiler/router/supply_tree_router.py
+++ b/compiler/router/supply_tree_router.py
@@ -144,15 +144,13 @@ class supply_tree_router(router):
 
             # Marks all pin components except index as target
             self.add_pin_component_target(pin_name, dest_idx)
-            
+
             # Actually run the A* router
             if self.run_router(detour_scale=detour_scale):
                 return
 
         self.write_debug_gds("debug_route.gds", True)
 
-
-
     def add_io_pin(self, instance, pin_name, new_name=""):
         """
         Add a signle input or output pin up to metal 3.