diff --git a/compiler/modules/hierarchical_decoder.py b/compiler/modules/hierarchical_decoder.py
index 141387b4..3233bdc8 100644
--- a/compiler/modules/hierarchical_decoder.py
+++ b/compiler/modules/hierarchical_decoder.py
@@ -78,10 +78,12 @@ class hierarchical_decoder(design.design):
 
     def add_decoders(self):
         """ Create the decoders based on the number of pre-decodes """
-        self.pre2_4 = factory.create(module_type="hierarchical_predecode2x4")
+        self.pre2_4 = factory.create(module_type="hierarchical_predecode2x4",
+                                     height=self.cell_height)
         self.add_mod(self.pre2_4)
         
-        self.pre3_8 = factory.create(module_type="hierarchical_predecode3x8")
+        self.pre3_8 = factory.create(module_type="hierarchical_predecode3x8",
+                                     height=self.cell_height)
         self.add_mod(self.pre3_8)
 
     def determine_predecodes(self, num_inputs):
diff --git a/compiler/modules/hierarchical_predecode.py b/compiler/modules/hierarchical_predecode.py
index d4cb51ce..a89f5fa6 100644
--- a/compiler/modules/hierarchical_predecode.py
+++ b/compiler/modules/hierarchical_predecode.py
@@ -24,12 +24,11 @@ class hierarchical_predecode(design.design):
         if not height:
             self.cell_height = b.height
             self.column_decoder = False
-        elif height != b.height:
-            self.cell_height = height
-            self.column_decoder = True
         else:
-            self.cell_height = b.height
-            self.column_decoder = False
+            self.cell_height = height
+        # If we are pitch matched to the bitcell, it's a predecoder
+        # otherwise it's a column decoder (out of pgates)
+        self.column_decoder = (height != b.height)
             
         self.number_of_outputs = int(math.pow(2, self.number_of_inputs))
         design.design.__init__(self, name)
@@ -311,7 +310,7 @@ class hierarchical_predecode(design.design):
         """ Add a pin for each row of vdd/gnd which are must-connects next level up. """
 
         # In sky130, we use hand-made decoder cells with vertical power
-        if not self.column_decoder:
+        if OPTS.tech_name == "sky130" and not self.column_decoder:
             for n in ["vdd", "gnd"]:
                 # This makes a wire from top to bottom for both inv and and gates
                 for i in [self.inv_inst, self.and_inst]: