diff --git a/compiler/modules/sram_1bank.py b/compiler/modules/sram_1bank.py
index 9062b421..3670438b 100644
--- a/compiler/modules/sram_1bank.py
+++ b/compiler/modules/sram_1bank.py
@@ -257,10 +257,10 @@ class sram_1bank(design, verilog, lef):
             return
         elif OPTS.route_supplies == "grid":
             from openram.router import supply_grid_router as router
-        elif OPTS.route_supplies == "graph":
-            from openram.router import graph_router as router
-        else:
+        elif OPTS.route_supplies == "tree":
             from openram.router import supply_tree_router as router
+        else:
+            from openram.router import graph_router as router
         rtr=router(layers=self.supply_stack,
                    design=self,
                    bbox=bbox,
diff --git a/compiler/options.py b/compiler/options.py
index 3a9bb3a8..2b578783 100644
--- a/compiler/options.py
+++ b/compiler/options.py
@@ -113,7 +113,7 @@ class options(optparse.Values):
     # When enabled, layout is not generated (and no DRC or LVS are performed)
     netlist_only = False
     # Whether we should do the final power routing
-    route_supplies = "tree"
+    route_supplies = "graph"
     supply_pin_type = "ring"
     # This determines whether LVS and DRC is checked at all.
     check_lvsdrc = False